Add patch for better VRR timing on OLED displays

4 files changed, 91 insertions, 2 deletions

diff --git a/.SRCINFO b/.SRCINFO
index 979028fa69dc..cf431a480a0b 100644
--- a/.SRCINFO
+++ b/.SRCINFO
@@ -1,7 +1,7 @@
 pkgbase = linux-amd-color
 	pkgdesc = Linux with experimental AMD color management enabled
 	pkgver = 6.8rc6
-	pkgrel = 1
+	pkgrel = 2
 	url = https://github.com/archlinux/linux
 	arch = x86_64
 	license = GPL2
@@ -21,13 +21,16 @@ pkgbase = linux-amd-color
 	options = !strip
 	source = https://git.kernel.org/torvalds/t/linux-6.8-rc6.tar.gz
 	source = config
+	source = oled_vrr.patch
 	validpgpkeys = ABAF11C65A2970B130ABE3C479BE3E4300411886
 	validpgpkeys = 647F28654894E3BD457199BE38DBBDC86092693E
 	validpgpkeys = 83BC8889351B5DEBBB68416EB8AC08600F108CDF
 	sha256sums = 1a1baf80be207cc07a38d2fc348e3c59624900f0584feeaf152f0ec0690acfbe
 	sha256sums = d0e840aa2ae6d9552e741b195b8bb3c1830cc227e8e2a601419f9530c65ff3ba
+	sha256sums = 8bc4397bf114c5a2b17b36eb11f3ceda338fe7cbd2310c8e22ac02a79ebe730d
 	b2sums = 41ed01e847c7a58fa38c315adcf6a5fdf51d7a98feb73eb7351b3c22a79813e43d47f8a088d75f7b69deb0057958b581dc7feab77d015536b7ee58195da82336
 	b2sums = 6a247b934eb2c177ea1d7f62d5e882c9820cfb9988a2d7a14d9efba44fd2182d800e681325ed07a21277f208f3678a9ff91f5b9252af2da39528311fe550d772
+	b2sums = cd6b48d1d4b228fbbe5d9e7dca077e5447e19e748d69d05d060d69238bc67362e212a66cfae3621b327b771dc37591fb07963e744bf72a25ef0e068effc1b464
 
 pkgname = linux-amd-color
 	pkgdesc = The Linux with experimental AMD color management enabled kernel and modules
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 000000000000..73469bd96b7e
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,3 @@
+linux-*
+src
+
diff --git a/PKGBUILD b/PKGBUILD
index f6bc4519a468..d39d640dfed1 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -3,7 +3,7 @@
 
 pkgbase=linux-amd-color
 pkgver=6.8rc6
-pkgrel=1
+pkgrel=2
 pkgdesc='Linux with experimental AMD color management enabled'
 url='https://github.com/archlinux/linux'
 arch=(x86_64)
@@ -30,6 +30,7 @@ _srcname=linux-${pkgver/rc/-rc}
 source=(
   https://git.kernel.org/torvalds/t/${_srcname}.tar.gz
   config  # the main kernel config file
+  oled_vrr.patch
 )
 validpgpkeys=(
   ABAF11C65A2970B130ABE3C479BE3E4300411886  # Linus Torvalds
@@ -40,10 +41,12 @@ validpgpkeys=(
 sha256sums=(
   '1a1baf80be207cc07a38d2fc348e3c59624900f0584feeaf152f0ec0690acfbe'
   'd0e840aa2ae6d9552e741b195b8bb3c1830cc227e8e2a601419f9530c65ff3ba'
+  '8bc4397bf114c5a2b17b36eb11f3ceda338fe7cbd2310c8e22ac02a79ebe730d'
 )
 b2sums=(
   '41ed01e847c7a58fa38c315adcf6a5fdf51d7a98feb73eb7351b3c22a79813e43d47f8a088d75f7b69deb0057958b581dc7feab77d015536b7ee58195da82336'
   '6a247b934eb2c177ea1d7f62d5e882c9820cfb9988a2d7a14d9efba44fd2182d800e681325ed07a21277f208f3678a9ff91f5b9252af2da39528311fe550d772'
+  'cd6b48d1d4b228fbbe5d9e7dca077e5447e19e748d69d05d060d69238bc67362e212a66cfae3621b327b771dc37591fb07963e744bf72a25ef0e068effc1b464'
 )
 
 
diff --git a/oled_vrr.patch b/oled_vrr.patch
new file mode 100644
index 000000000000..920b68039501
--- /dev/null
+++ b/oled_vrr.patch
@@ -0,0 +1,80 @@
+From 0d4253cf37d601a6c09340bd7d56422e6e8a1f06 Mon Sep 17 00:00:00 2001
+From: Joshua Ashton <joshua@froggi.es>
+Date: Wed, 6 Sep 2023 22:00:26 +0100
+Subject: [PATCH] drm/amd/display: Don't consider vblank passed if currently in
+ vertical front porch time
+
+Changing refresh rates on OLED displays works differently to typical
+LCD panels in that instead of changing the clock, the vertical porch
+is extended significantly for lower rates.
+
+This can mean that the vertical porch can be incredibly large for
+non-base refresh rates eg. 60Hz on a 90Hz display.
+
+This isn't an issue for X11/typical compositors as their present slop
+is 1/2th of the refresh interval so the issue never manifests.
+
+However in Gamescope, the present slop very small and tuned to be
+optimal in real-time to try and reduce display latency significantly.
+This results in us queueing up the atomic commit inside the vertical
+porch region which, due to legacy X11/sync control reasons, means that
+AMDGPU must target the next vblank.
+
+This patch changes that behaviour to make FRR displays match what occurs
+on VRR/Freesync displays where the vertical porch time is not included
+in determining what vblank to target and solves the issue.
+
+This means that smarter compositors can get large input latency
+reductions when using OLED displays at lower than base refresh rates.
+
+For upstreaming this patch, it will need to be considered what the best
+solution is to enable this behaviour from the userspace side.
+Obviously the X11/legacy stuff probably cannot change here -- so we
+either need to enable this new behaviour globally for all DRM atomic
+clients (ie. basically Wayland compositors) or have a
+new DRM_MODE_ATOMIC flag.
+
+Signed-off-by: Joshua Ashton <joshua@froggi.es>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+index a0d98cee521ca..1693286654058 100644
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -449,7 +449,7 @@ static void dm_pflip_high_irq(void *interrupt_params)
+ 
+ 	WARN_ON(!e);
+ 
+-	vrr_active = amdgpu_dm_crtc_vrr_active_irq(amdgpu_crtc);
++	vrr_active = true;//amdgpu_dm_crtc_vrr_active_irq(amdgpu_crtc);
+ 
+ 	/* Fixed refresh rate, or VRR scanout position outside front-porch? */
+ 	if (!vrr_active ||
+@@ -546,11 +546,11 @@ static void dm_vupdate_high_irq(void *interrupt_params)
+ 		 * page-flip completion events that have been queued to us
+ 		 * if a pageflip happened inside front-porch.
+ 		 */
+-		if (vrr_active) {
++		if (true) {
+ 			amdgpu_dm_crtc_handle_vblank(acrtc);
+ 
+ 			/* BTR processing for pre-DCE12 ASICs */
+-			if (acrtc->dm_irq_params.stream &&
++			if (vrr_active && acrtc->dm_irq_params.stream &&
+ 			    adev->family < AMDGPU_FAMILY_AI) {
+ 				spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags);
+ 				mod_freesync_handle_v_update(
+@@ -8226,7 +8226,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
+ 	int planes_count = 0, vpos, hpos;
+ 	unsigned long flags;
+ 	u32 target_vblank, last_flip_vblank;
+-	bool vrr_active = amdgpu_dm_crtc_vrr_active(acrtc_state);
++	bool vrr_active = true;//amdgpu_dm_crtc_vrr_active(acrtc_state);
+ 	bool cursor_update = false;
+ 	bool pflip_present = false;
+ 	bool dirty_rects_changed = false;
+-- 
+GitLab
+