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| author | Cayetano Santos | 2020-04-29 19:19:17 +0200 |
|---|---|---|
| committer | Cayetano Santos | 2020-04-29 19:19:17 +0200 |
| commit | a50386a3fd1731a6c543e162e0e10f29136a085d (patch) | |
| tree | fcd0e03b6b280684b489c088cc7bccf70b11f40b /.SRCINFO | |
| parent | 81c288304d876e7d3c4eae2f849491b120bc5d09 (diff) | |
| download | aur-a50386a3fd1731a6c543e162e0e10f29136a085d.tar.gz | |
jsonschema and jinja dependencies
Diffstat (limited to '.SRCINFO')
| -rw-r--r-- | .SRCINFO | 3 |
1 files changed, 2 insertions, 1 deletions
@@ -11,6 +11,8 @@ pkgbase = python-fusesoc depends = python-edalize depends = python-setuptools depends = python-pyaml + depends = python-jsonschema + depends = python-jinja optdepends = iverilog: for simulating verilog designs optdepends = ghdl: for simulating VHDL designs optdepends = gtkwave: for visualizing waveforms @@ -21,4 +23,3 @@ pkgbase = python-fusesoc md5sums = SKIP pkgname = python-fusesoc - |