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| author | Doron Behar | 2018-04-23 18:45:08 +0300 |
|---|---|---|
| committer | Doron Behar | 2018-04-23 18:45:08 +0300 |
| commit | bc36a27fb8aa74a74ded1945e59b3ecedd5c5724 (patch) | |
| tree | eef7df09a718a4ba97aacd44b74334846a3c9e46 /.SRCINFO | |
| parent | 5d1149588b79dc693ee0eee74fc5a25944f7dd6f (diff) | |
| download | aur-bc36a27fb8aa74a74ded1945e59b3ecedd5c5724.tar.gz | |
Update version.
Diffstat (limited to '.SRCINFO')
| -rw-r--r-- | .SRCINFO | 6 |
1 files changed, 3 insertions, 3 deletions
@@ -1,14 +1,14 @@ pkgbase = python-vunit_hdl pkgdesc = Unit Testing Framework for VHDL/SystemVerilog - pkgver = 3.0.2 + pkgver = 3.0.3 pkgrel = 1 url = https://vunit.github.io/ arch = any license = MPL depends = python options = !emptydirs - source = https://files.pythonhosted.org/packages/source/v/vunit_hdl/vunit_hdl-3.0.2.tar.gz - md5sums = 65d97c0bffd4e51e998c3d2d2374197b + source = https://files.pythonhosted.org/packages/source/v/vunit_hdl/vunit_hdl-3.0.3.tar.gz + md5sums = e286c326e61eac9b6c9658d289d38738 pkgname = python-vunit_hdl |