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| author | Xiretza | 2020-11-28 13:21:14 +0100 |
|---|---|---|
| committer | Xiretza | 2020-11-28 13:22:51 +0100 |
| commit | 9f5783e04dabc7da2c43d4c4d5e38e4a781f1804 (patch) | |
| tree | 86d034027d497136a5ad434b755fba3bc0323a59 /.SRCINFO | |
| parent | 76e907f609573768374a1c3250f23f9eac4296ad (diff) | |
| download | aur-9f5783e04dabc7da2c43d4c4d5e38e4a781f1804.tar.gz | |
Update to 2020.2
Diffstat (limited to '.SRCINFO')
| -rw-r--r-- | .SRCINFO | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -1,7 +1,7 @@ pkgbase = vivado pkgdesc = FPGA/CPLD design suite for Xilinx devices - pkgver = 2020.1 - pkgrel = 2 + pkgver = 2020.2 + pkgrel = 1 url = https://www.xilinx.com/products/design-tools/vivado.html arch = x86_64 license = custom @@ -13,9 +13,9 @@ pkgbase = vivado optdepends = digilent.adept.runtime optdepends = digilent.adept.utilities options = !strip - source = file:///Xilinx_Unified_2020.1_0602_1208.tar.gz + source = file:///Xilinx_Unified_2020.2_1118_1232.tar.gz source = spoof_homedir.c - md5sums = b018f7b331ab0446137756156ff944d9 + md5sums = 523e8596f114ab5e389c14df50ecb1d8 md5sums = 69d14ad64f6ec44e041eaa8ffcb6f87c pkgname = vivado |