diff options
| author | Björn Bidar | 2022-06-24 20:03:01 +0300 |
|---|---|---|
| committer | Björn Bidar | 2022-06-25 16:46:45 +0300 |
| commit | 657059c03d46120dea746abb196d9d622e21fe5f (patch) | |
| tree | 2ae07d28cd858ef0cda12e3c8af27932d06c0fbb /0003-arm64-dts-imx8mn-beacon-Enable-RTS-CTS-on-UART3.patch | |
| parent | 034adcf2fd3311bba3f58b8575b0be699ab3bd70 (diff) | |
| download | aur-657059c03d46120dea746abb196d9d622e21fe5f.tar.gz | |
Update to 5.18.6.p2-1
- New upstream release based on 5.18.5
- Add MGLRU Zen patch
- Add linux-5.18.6 patches
- Move System.map from -headers into the base package to avoid
external modules having wrong bpf symbols when running optimized
builds. Fixes #5
- Remove M/m from CPUSUFFIXES_KBUILD and LCPU, fixes build failing
when selecting an optimized build architecture that is not genering.
Fixes #6.
Signed-off-by: Björn Bidar <bjorn.bidar@thaodan.de>
Diffstat (limited to '0003-arm64-dts-imx8mn-beacon-Enable-RTS-CTS-on-UART3.patch')
| -rw-r--r-- | 0003-arm64-dts-imx8mn-beacon-Enable-RTS-CTS-on-UART3.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/0003-arm64-dts-imx8mn-beacon-Enable-RTS-CTS-on-UART3.patch b/0003-arm64-dts-imx8mn-beacon-Enable-RTS-CTS-on-UART3.patch new file mode 100644 index 000000000000..4bce11ba77d3 --- /dev/null +++ b/0003-arm64-dts-imx8mn-beacon-Enable-RTS-CTS-on-UART3.patch @@ -0,0 +1,39 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Adam Ford <aford173@gmail.com> +Date: Tue, 26 Apr 2022 15:51:44 -0500 +Subject: [PATCH] arm64: dts: imx8mn-beacon: Enable RTS-CTS on UART3 + +commit 5446ff1a67160ad92d9aae9530846aa54750be36 upstream. + +There is a header for a DB9 serial port, but any attempts to use +hardware handshaking fail. Enable RTS and CTS pin muxing and enable +handshaking in the uart node. + +Signed-off-by: Adam Ford <aford173@gmail.com> +Signed-off-by: Shawn Guo <shawnguo@kernel.org> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi +index 0f40b43ac091c0f96a23e75a9ba244f0570ffb62..02f37dcda7eda4b062174321e08e4ba0e6e4e1cb 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi +@@ -175,6 +175,7 @@ &uart3 { + pinctrl-0 = <&pinctrl_uart3>; + assigned-clocks = <&clk IMX8MN_CLK_UART3>; + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>; ++ uart-has-rtscts; + status = "okay"; + }; + +@@ -258,6 +259,8 @@ pinctrl_uart3: uart3grp { + fsl,pins = < + MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40 + MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40 ++ MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x40 ++ MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40 + >; + }; + |