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author | Björn Bidar | 2022-09-06 03:05:45 +0300 |
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committer | Björn Bidar | 2022-09-06 15:55:49 +0300 |
commit | dafa8d62d3f6493d66afc5d568273f5a7e7b8924 (patch) | |
tree | e41709bc271bbf6671ce34c491a455ff08547e34 /0056-drm-amdgpu-Increase-tlb-flush-timeout-for-sriov.patch | |
parent | 0c2ed81feac01240fdc5ed571ed3b563ec0dbec2 (diff) | |
download | aur-dafa8d62d3f6493d66afc5d568273f5a7e7b8924.tar.gz |
Update to 5.19.7.pf3-1
- New upstream release based on 5.19.6
- Add linux-5.19.7 stable patches
- Sync kernel config with Arch and Arch32
- Always package objtool, fixes #9.
- Remove patch for kernel#211005 as it commited upstream
Signed-off-by: Björn Bidar <bjorn.bidar@thaodan.de>
Diffstat (limited to '0056-drm-amdgpu-Increase-tlb-flush-timeout-for-sriov.patch')
-rw-r--r-- | 0056-drm-amdgpu-Increase-tlb-flush-timeout-for-sriov.patch | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/0056-drm-amdgpu-Increase-tlb-flush-timeout-for-sriov.patch b/0056-drm-amdgpu-Increase-tlb-flush-timeout-for-sriov.patch new file mode 100644 index 000000000000..d32af93acff5 --- /dev/null +++ b/0056-drm-amdgpu-Increase-tlb-flush-timeout-for-sriov.patch @@ -0,0 +1,85 @@ +From db1d9deb84d7870486688a5d13602962443a5500 Mon Sep 17 00:00:00 2001 +From: Dusica Milinkovic <Dusica.Milinkovic@amd.com> +Date: Wed, 10 Aug 2022 09:43:15 +0200 +Subject: [PATCH 56/73] drm/amdgpu: Increase tlb flush timeout for sriov + +[ Upstream commit 373008bfc9cdb0f050258947fa5a095f0657e1bc ] + +[Why] +During multi-vf executing benchmark (Luxmark) observed kiq error timeout. +It happenes because all of VFs do the tlb invalidation at the same time. +Although each VF has the invalidate register set, from hardware side +the invalidate requests are queue to execute. + +[How] +In case of 12 VF increase timeout on 12*100ms + +Signed-off-by: Dusica Milinkovic <Dusica.Milinkovic@amd.com> +Acked-by: Shaoyun Liu <shaoyun.liu@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Sasha Levin <sashal@kernel.org> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +- + drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 ++- + 3 files changed, 5 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index 30ce6bb6fa77..310754b1f670 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -313,7 +313,7 @@ enum amdgpu_kiq_irq { + AMDGPU_CP_KIQ_IRQ_DRIVER0 = 0, + AMDGPU_CP_KIQ_IRQ_LAST + }; +- ++#define SRIOV_USEC_TIMEOUT 1200000 /* wait 12 * 100ms for SRIOV */ + #define MAX_KIQ_REG_WAIT 5000 /* in usecs, 5ms */ + #define MAX_KIQ_REG_BAILOUT_INTERVAL 5 /* in msecs, 5ms */ + #define MAX_KIQ_REG_TRY 1000 +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +index 9077dfccaf3c..809408c8c79a 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +@@ -416,6 +416,7 @@ static int gmc_v10_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev, + uint32_t seq; + uint16_t queried_pasid; + bool ret; ++ u32 usec_timeout = amdgpu_sriov_vf(adev) ? SRIOV_USEC_TIMEOUT : adev->usec_timeout; + struct amdgpu_ring *ring = &adev->gfx.kiq.ring; + struct amdgpu_kiq *kiq = &adev->gfx.kiq; + +@@ -434,7 +435,7 @@ static int gmc_v10_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev, + + amdgpu_ring_commit(ring); + spin_unlock(&adev->gfx.kiq.ring_lock); +- r = amdgpu_fence_wait_polling(ring, seq, adev->usec_timeout); ++ r = amdgpu_fence_wait_polling(ring, seq, usec_timeout); + if (r < 1) { + dev_err(adev->dev, "wait for kiq fence error: %ld.\n", r); + return -ETIME; +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index 22761a3bb818..566c1243c051 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -896,6 +896,7 @@ static int gmc_v9_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev, + uint32_t seq; + uint16_t queried_pasid; + bool ret; ++ u32 usec_timeout = amdgpu_sriov_vf(adev) ? SRIOV_USEC_TIMEOUT : adev->usec_timeout; + struct amdgpu_ring *ring = &adev->gfx.kiq.ring; + struct amdgpu_kiq *kiq = &adev->gfx.kiq; + +@@ -935,7 +936,7 @@ static int gmc_v9_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev, + + amdgpu_ring_commit(ring); + spin_unlock(&adev->gfx.kiq.ring_lock); +- r = amdgpu_fence_wait_polling(ring, seq, adev->usec_timeout); ++ r = amdgpu_fence_wait_polling(ring, seq, usec_timeout); + if (r < 1) { + dev_err(adev->dev, "wait for kiq fence error: %ld.\n", r); + up_read(&adev->reset_domain->sem); +-- +2.37.3 + |