diff options
| author | Tavian Barnes | 2017-04-06 19:24:12 -0400 |
|---|---|---|
| committer | Tavian Barnes | 2017-04-06 19:24:12 -0400 |
| commit | 025ea9296fa97cb91204f81b76efd90045ca2b0d (patch) | |
| tree | 445e2e7bec6b8927fd37039ebdf71a8d63133f59 | |
| parent | 95fe5ca0a5f41e92c659800b95df8b45390ea574 (diff) | |
| download | aur-025ea9296fa97cb91204f81b76efd90045ca2b0d.tar.gz | |
Bump to 2.28.0-2
| -rw-r--r-- | .SRCINFO | 14 | ||||
| -rw-r--r-- | PKGBUILD | 39 | ||||
| -rw-r--r-- | binutils-a7b47925683a22c9819c23cb18b99bd74014d066.patch | 1673 |
3 files changed, 1706 insertions, 20 deletions
@@ -1,20 +1,22 @@ # Generated by mksrcinfo v8 -# Fri Feb 3 00:34:10 UTC 2017 +# Thu Apr 6 23:23:36 UTC 2017 pkgbase = arm-linux-gnueabihf-binutils pkgdesc = A set of programs to assemble and manipulate binary and object files (arm-linux-gnueabihf) - pkgver = 2.27 - pkgrel = 1 + pkgver = 2.28.0 + pkgrel = 2 url = http://www.gnu.org/software/binutils/ arch = i686 arch = x86_64 license = GPL - depends = glibc>=2.24 + depends = glibc>=2.25 depends = zlib options = staticlibs options = !distcc options = !ccache - source = http://ftp.gnu.org/gnu/binutils/binutils-2.27.tar.bz2 - md5sums = 2869c9bf3e60ee97c74ac2a6bf4e9d68 + source = http://ftp.gnu.org/gnu/binutils/binutils-2.28.tar.bz2 + source = binutils-a7b47925683a22c9819c23cb18b99bd74014d066.patch + md5sums = 9e8340c96626b469a603c15c9d843727 + md5sums = e548dc836b57a95945db57876e6e8b3f pkgname = arm-linux-gnueabihf-binutils @@ -6,23 +6,26 @@ _target="arm-linux-gnueabihf" pkgname=${_target}-binutils -pkgver=2.27 -pkgrel=1 -_commit=2870b1ba +pkgver=2.28.0 +_basever=2.28 +pkgrel=2 +_commit=a7b47925683a22c9819c23cb18b99bd74014d066 pkgdesc="A set of programs to assemble and manipulate binary and object files (${_target})" arch=('i686' 'x86_64') url="http://www.gnu.org/software/binutils/" license=('GPL') -depends=('glibc>=2.24' 'zlib') +depends=('glibc>=2.25' 'zlib') options=('staticlibs' '!distcc' '!ccache') source=(#git://sourceware.org/git/binutils-gdb.git#commit=${_commit} - http://ftp.gnu.org/gnu/binutils/binutils-${pkgver}.tar.bz2) -md5sums=('2869c9bf3e60ee97c74ac2a6bf4e9d68') + http://ftp.gnu.org/gnu/binutils/binutils-${_basever}.tar.bz2 + binutils-${_commit}.patch) +md5sums=('9e8340c96626b469a603c15c9d843727' + 'e548dc836b57a95945db57876e6e8b3f') prepare() { - cd binutils-${pkgver} + cd binutils-${_basever} - #patch -p1 -i ${srcdir}/binutils-${_commit}.patch + patch -p1 -i ${srcdir}/binutils-${_commit}.patch # hack! - libiberty configure tests for header files using "$CPP $CPPFLAGS" sed -i "/ac_cpp=/s/\$CPPFLAGS/\$CPPFLAGS -O2/" libiberty/configure @@ -33,17 +36,25 @@ prepare() { build() { cd binutils-build - ../binutils-${pkgver}/configure --prefix=/usr \ + ../binutils-${_basever}/configure \ + --prefix=/usr \ --program-prefix=${_target}- \ --with-lib-path=/usr/lib/binutils/${_target} \ --with-local-prefix=/usr/lib/${_target} \ --with-sysroot=/usr/${_target} \ - --target=${_target} --host=${CHOST} --build=${CHOST} \ - --disable-nls \ - --enable-threads --enable-shared --with-pic \ - --enable-ld=default --enable-gold --enable-plugins \ + --enable-threads \ + --enable-shared \ + --enable-ld=default \ + --enable-gold \ + --enable-plugins \ --enable-deterministic-archives \ - --disable-werror --disable-gdb --disable-sim + --with-pic \ + --disable-werror \ + --disable-gdb \ + --disable-sim \ + --target=${_target} \ + --host=${CHOST} \ + --build=${CHOST} make configure-host diff --git a/binutils-a7b47925683a22c9819c23cb18b99bd74014d066.patch b/binutils-a7b47925683a22c9819c23cb18b99bd74014d066.patch new file mode 100644 index 000000000000..def0671b4d35 --- /dev/null +++ b/binutils-a7b47925683a22c9819c23cb18b99bd74014d066.patch @@ -0,0 +1,1673 @@ +diff --git a/bfd/ChangeLog b/bfd/ChangeLog +index 85c6a817e5..17e7e3b9bf 100644 +--- a/bfd/ChangeLog ++++ b/bfd/ChangeLog +@@ -1,3 +1,25 @@ ++2017-03-07 Alan Modra <amodra@gmail.com> ++ ++ PR 21224 ++ PR 20519 ++ * elf64-ppc.c (ppc64_elf_relocate_section): Add missing ++ dyn_relocs check. ++ ++2017-03-07 Alan Modra <amodra@gmail.com> ++ ++ Apply from master ++ 2017-03-02 Alan Modra <amodra@gmail.com> ++ * elf32-ppc.c (ppc_elf_vle_split16): Correct insn mask typo. ++ ++2017-03-02 Tristan Gingold <gingold@adacore.com> ++ ++ * version.m4: Bump version to 2.28.0 ++ * configure: Regenerate. ++ ++2017-03-02 Tristan Gingold <gingold@adacore.com> ++ ++ * development.sh: Set development to true. ++ + 2017-03-02 Tristan Gingold <gingold@adacore.com> + + * version.m4: Bump version to 2.28 +diff --git a/bfd/configure b/bfd/configure +index 97693870c4..f30bfabef3 100755 +--- a/bfd/configure ++++ b/bfd/configure +@@ -1,6 +1,6 @@ + #! /bin/sh + # Guess values for system-dependent variables and create Makefiles. +-# Generated by GNU Autoconf 2.64 for bfd 2.28. ++# Generated by GNU Autoconf 2.64 for bfd 2.28.0. + # + # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, + # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software +@@ -556,8 +556,8 @@ MAKEFLAGS= + # Identity of this package. + PACKAGE_NAME='bfd' + PACKAGE_TARNAME='bfd' +-PACKAGE_VERSION='2.28' +-PACKAGE_STRING='bfd 2.28' ++PACKAGE_VERSION='2.28.0' ++PACKAGE_STRING='bfd 2.28.0' + PACKAGE_BUGREPORT='' + PACKAGE_URL='' + +@@ -1354,7 +1354,7 @@ if test "$ac_init_help" = "long"; then + # Omit some internal or obsolete options to make the list less imposing. + # This message is too long to be a string in the A/UX 3.1 sh. + cat <<_ACEOF +-\`configure' configures bfd 2.28 to adapt to many kinds of systems. ++\`configure' configures bfd 2.28.0 to adapt to many kinds of systems. + + Usage: $0 [OPTION]... [VAR=VALUE]... + +@@ -1425,7 +1425,7 @@ fi + + if test -n "$ac_init_help"; then + case $ac_init_help in +- short | recursive ) echo "Configuration of bfd 2.28:";; ++ short | recursive ) echo "Configuration of bfd 2.28.0:";; + esac + cat <<\_ACEOF + +@@ -1546,7 +1546,7 @@ fi + test -n "$ac_init_help" && exit $ac_status + if $ac_init_version; then + cat <<\_ACEOF +-bfd configure 2.28 ++bfd configure 2.28.0 + generated by GNU Autoconf 2.64 + + Copyright (C) 2009 Free Software Foundation, Inc. +@@ -2188,7 +2188,7 @@ cat >config.log <<_ACEOF + This file contains any messages produced by compilers while + running configure, to aid debugging if configure makes a mistake. + +-It was created by bfd $as_me 2.28, which was ++It was created by bfd $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + $ $0 $@ +@@ -3997,7 +3997,7 @@ fi + + # Define the identity of the package. + PACKAGE='bfd' +- VERSION='2.28' ++ VERSION='2.28.0' + + + cat >>confdefs.h <<_ACEOF +@@ -16613,7 +16613,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 + # report actual input values of CONFIG_FILES etc. instead of their + # values after options handling. + ac_log=" +-This file was extended by bfd $as_me 2.28, which was ++This file was extended by bfd $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + CONFIG_FILES = $CONFIG_FILES +@@ -16677,7 +16677,7 @@ Report bugs to the package provider." + _ACEOF + cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 + ac_cs_version="\\ +-bfd config.status 2.28 ++bfd config.status 2.28.0 + configured by $0, generated by GNU Autoconf 2.64, + with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" + +diff --git a/bfd/development.sh b/bfd/development.sh +index b001a888ea..cd31410a8e 100644 +--- a/bfd/development.sh ++++ b/bfd/development.sh +@@ -16,4 +16,4 @@ + # along with this program. If not, see <http://www.gnu.org/licenses/>. + + # Controls whether to enable development-mode features by default. +-development=false ++development=true +diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c +index 0f3eb68d35..10caa8a95b 100644 +--- a/bfd/elf32-ppc.c ++++ b/bfd/elf32-ppc.c +@@ -4921,7 +4921,7 @@ ppc_elf_vle_split16 (bfd *input_bfd, + unsigned int insn, opcode, top5; + + insn = bfd_get_32 (input_bfd, loc); +- opcode = insn & 0xf300f800; ++ opcode = insn & 0xfc00f800; + if (opcode == E_OR2I_INSN + || opcode == E_AND2I_DOT_INSN + || opcode == E_OR2IS_INSN +diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c +index e7d4792245..3381647c46 100644 +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -14798,8 +14798,10 @@ ppc64_elf_relocate_section (bfd *output_bfd, + break; + + if (bfd_link_pic (info) +- ? ((h != NULL && pc_dynrelocs (h)) +- || must_be_dyn_reloc (info, r_type)) ++ ? ((h == NULL ++ || h->dyn_relocs != NULL) ++ && ((h != NULL && pc_dynrelocs (h)) ++ || must_be_dyn_reloc (info, r_type))) + : (h != NULL + ? h->dyn_relocs != NULL + : ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC)) +diff --git a/bfd/version.h b/bfd/version.h +index eda06e4ac6..3b637b569c 100644 +--- a/bfd/version.h ++++ b/bfd/version.h +@@ -1,4 +1,4 @@ +-#define BFD_VERSION_DATE 20170302 ++#define BFD_VERSION_DATE 20170322 + #define BFD_VERSION @bfd_version@ + #define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@ + #define REPORT_BUGS_TO @report_bugs_to@ +diff --git a/bfd/version.m4 b/bfd/version.m4 +index 0cfca2dda8..8bde21ee1c 100644 +--- a/bfd/version.m4 ++++ b/bfd/version.m4 +@@ -1 +1 @@ +-m4_define([BFD_VERSION], [2.28]) ++m4_define([BFD_VERSION], [2.28.0]) +diff --git a/binutils/ChangeLog b/binutils/ChangeLog +index aa17468ffb..f21867f98c 100644 +--- a/binutils/ChangeLog ++++ b/binutils/ChangeLog +@@ -2,6 +2,10 @@ + + * configure: Regenerate. + ++2017-03-02 Tristan Gingold <gingold@adacore.com> ++ ++ * configure: Regenerate. ++ + 2017-01-18 Bernhard Rosenkranzer <bero@lindev.ch> + + PR 21059 +diff --git a/binutils/configure b/binutils/configure +index baddf348d0..82119efe72 100755 +--- a/binutils/configure ++++ b/binutils/configure +@@ -1,6 +1,6 @@ + #! /bin/sh + # Guess values for system-dependent variables and create Makefiles. +-# Generated by GNU Autoconf 2.64 for binutils 2.28. ++# Generated by GNU Autoconf 2.64 for binutils 2.28.0. + # + # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, + # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software +@@ -556,8 +556,8 @@ MAKEFLAGS= + # Identity of this package. + PACKAGE_NAME='binutils' + PACKAGE_TARNAME='binutils' +-PACKAGE_VERSION='2.28' +-PACKAGE_STRING='binutils 2.28' ++PACKAGE_VERSION='2.28.0' ++PACKAGE_STRING='binutils 2.28.0' + PACKAGE_BUGREPORT='' + PACKAGE_URL='' + +@@ -1338,7 +1338,7 @@ if test "$ac_init_help" = "long"; then + # Omit some internal or obsolete options to make the list less imposing. + # This message is too long to be a string in the A/UX 3.1 sh. + cat <<_ACEOF +-\`configure' configures binutils 2.28 to adapt to many kinds of systems. ++\`configure' configures binutils 2.28.0 to adapt to many kinds of systems. + + Usage: $0 [OPTION]... [VAR=VALUE]... + +@@ -1409,7 +1409,7 @@ fi + + if test -n "$ac_init_help"; then + case $ac_init_help in +- short | recursive ) echo "Configuration of binutils 2.28:";; ++ short | recursive ) echo "Configuration of binutils 2.28.0:";; + esac + cat <<\_ACEOF + +@@ -1530,7 +1530,7 @@ fi + test -n "$ac_init_help" && exit $ac_status + if $ac_init_version; then + cat <<\_ACEOF +-binutils configure 2.28 ++binutils configure 2.28.0 + generated by GNU Autoconf 2.64 + + Copyright (C) 2009 Free Software Foundation, Inc. +@@ -2172,7 +2172,7 @@ cat >config.log <<_ACEOF + This file contains any messages produced by compilers while + running configure, to aid debugging if configure makes a mistake. + +-It was created by binutils $as_me 2.28, which was ++It was created by binutils $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + $ $0 $@ +@@ -3981,7 +3981,7 @@ fi + + # Define the identity of the package. + PACKAGE='binutils' +- VERSION='2.28' ++ VERSION='2.28.0' + + + cat >>confdefs.h <<_ACEOF +@@ -15223,7 +15223,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 + # report actual input values of CONFIG_FILES etc. instead of their + # values after options handling. + ac_log=" +-This file was extended by binutils $as_me 2.28, which was ++This file was extended by binutils $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + CONFIG_FILES = $CONFIG_FILES +@@ -15287,7 +15287,7 @@ Report bugs to the package provider." + _ACEOF + cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 + ac_cs_version="\\ +-binutils config.status 2.28 ++binutils config.status 2.28.0 + configured by $0, generated by GNU Autoconf 2.64, + with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" + +diff --git a/gas/ChangeLog b/gas/ChangeLog +index 8a586ad7a0..d59472a737 100644 +--- a/gas/ChangeLog ++++ b/gas/ChangeLog +@@ -1,3 +1,27 @@ ++2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> ++ ++ Backport from mainline ++ 2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> ++ ++ * config/tc-s390.c (s390_parse_cpu): Remove S390_INSTR_FLAG_VX2 ++ from cpu_table. Remove vx2, and novx2 from cpu_flags. ++ ++2017-03-08 Peter Bergner <bergner@vnet.ibm.com> ++ ++ * testsuite/gas/ppc/altivec2.d (as): Use the -mpower8 option. ++ (objdump): Use the -Mpower8 option. ++ ++2017-03-08 Peter Bergner <bergner@vnet.ibm.com> ++ ++ Apply from master. ++ 2017-03-08 Peter Bergner <bergner@vnet.ibm.com> ++ * testsuite/gas/ppc/power9.d <lnia> New test. ++ * testsuite/gas/ppc/power9.s: Likewise. ++ ++2017-03-02 Tristan Gingold <gingold@adacore.com> ++ ++ * configure: Regenerate. ++ + 2017-03-02 Tristan Gingold <gingold@adacore.com> + + * configure: Regenerate. +diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c +index 7c8087e009..dccbe2c945 100644 +--- a/gas/config/tc-s390.c ++++ b/gas/config/tc-s390.c +@@ -291,7 +291,7 @@ s390_parse_cpu (const char * arg, + { STRING_COMMA_LEN ("z13"), STRING_COMMA_LEN ("arch11"), + S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }, + { STRING_COMMA_LEN ("arch12"), STRING_COMMA_LEN (""), +- S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX | S390_INSTR_FLAG_VX2 } ++ S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX } + }; + static struct + { +@@ -303,9 +303,7 @@ s390_parse_cpu (const char * arg, + { "htm", S390_INSTR_FLAG_HTM, TRUE }, + { "nohtm", S390_INSTR_FLAG_HTM, FALSE }, + { "vx", S390_INSTR_FLAG_VX, TRUE }, +- { "novx", S390_INSTR_FLAG_VX, FALSE }, +- { "vx2", S390_INSTR_FLAG_VX2, TRUE }, +- { "novx2", S390_INSTR_FLAG_VX2, FALSE } ++ { "novx", S390_INSTR_FLAG_VX, FALSE } + }; + unsigned int icpu; + char *ilp_bak; +diff --git a/gas/configure b/gas/configure +index ce7091e33b..e574cb8514 100755 +--- a/gas/configure ++++ b/gas/configure +@@ -1,6 +1,6 @@ + #! /bin/sh + # Guess values for system-dependent variables and create Makefiles. +-# Generated by GNU Autoconf 2.64 for gas 2.28. ++# Generated by GNU Autoconf 2.64 for gas 2.28.0. + # + # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, + # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software +@@ -556,8 +556,8 @@ MAKEFLAGS= + # Identity of this package. + PACKAGE_NAME='gas' + PACKAGE_TARNAME='gas' +-PACKAGE_VERSION='2.28' +-PACKAGE_STRING='gas 2.28' ++PACKAGE_VERSION='2.28.0' ++PACKAGE_STRING='gas 2.28.0' + PACKAGE_BUGREPORT='' + PACKAGE_URL='' + +@@ -1330,7 +1330,7 @@ if test "$ac_init_help" = "long"; then + # Omit some internal or obsolete options to make the list less imposing. + # This message is too long to be a string in the A/UX 3.1 sh. + cat <<_ACEOF +-\`configure' configures gas 2.28 to adapt to many kinds of systems. ++\`configure' configures gas 2.28.0 to adapt to many kinds of systems. + + Usage: $0 [OPTION]... [VAR=VALUE]... + +@@ -1401,7 +1401,7 @@ fi + + if test -n "$ac_init_help"; then + case $ac_init_help in +- short | recursive ) echo "Configuration of gas 2.28:";; ++ short | recursive ) echo "Configuration of gas 2.28.0:";; + esac + cat <<\_ACEOF + +@@ -1523,7 +1523,7 @@ fi + test -n "$ac_init_help" && exit $ac_status + if $ac_init_version; then + cat <<\_ACEOF +-gas configure 2.28 ++gas configure 2.28.0 + generated by GNU Autoconf 2.64 + + Copyright (C) 2009 Free Software Foundation, Inc. +@@ -1933,7 +1933,7 @@ cat >config.log <<_ACEOF + This file contains any messages produced by compilers while + running configure, to aid debugging if configure makes a mistake. + +-It was created by gas $as_me 2.28, which was ++It was created by gas $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + $ $0 $@ +@@ -3742,7 +3742,7 @@ fi + + # Define the identity of the package. + PACKAGE='gas' +- VERSION='2.28' ++ VERSION='2.28.0' + + + cat >>confdefs.h <<_ACEOF +@@ -15212,7 +15212,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 + # report actual input values of CONFIG_FILES etc. instead of their + # values after options handling. + ac_log=" +-This file was extended by gas $as_me 2.28, which was ++This file was extended by gas $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + CONFIG_FILES = $CONFIG_FILES +@@ -15276,7 +15276,7 @@ Report bugs to the package provider." + _ACEOF + cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 + ac_cs_version="\\ +-gas config.status 2.28 ++gas config.status 2.28.0 + configured by $0, generated by GNU Autoconf 2.64, + with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" + +diff --git a/gas/testsuite/gas/ppc/altivec2.d b/gas/testsuite/gas/ppc/altivec2.d +index fc10fb5a2e..26f9afa9a8 100644 +--- a/gas/testsuite/gas/ppc/altivec2.d ++++ b/gas/testsuite/gas/ppc/altivec2.d +@@ -1,5 +1,5 @@ +-#as: -maltivec +-#objdump: -dr -Maltivec ++#as: -mpower8 ++#objdump: -dr -Mpower8 + #name: Altivec ISA 2.07 instructions + + .* +diff --git a/gas/testsuite/gas/ppc/power9.d b/gas/testsuite/gas/ppc/power9.d +index 9ba53d0679..a67898ff3a 100644 +--- a/gas/testsuite/gas/ppc/power9.d ++++ b/gas/testsuite/gas/ppc/power9.d +@@ -312,8 +312,9 @@ Disassembly of section \.text: + .*: (f1 31 9d 6f|6f 9d 31 f1) xscvdphp vs41,vs51 + .*: (f1 58 a7 6f|6f a7 58 f1) xvcvhpsp vs42,vs52 + .*: (f1 79 af 6f|6f af 79 f1) xvcvsphp vs43,vs53 +-.*: (4c 60 00 04|04 00 60 4c) addpcis r3,0 +-.*: (4c 60 00 04|04 00 60 4c) addpcis r3,0 ++.*: (4c 60 00 04|04 00 60 4c) lnia r3 ++.*: (4c 60 00 04|04 00 60 4c) lnia r3 ++.*: (4c 60 00 04|04 00 60 4c) lnia r3 + .*: (4c 80 00 05|05 00 80 4c) addpcis r4,1 + .*: (4c 80 00 05|05 00 80 4c) addpcis r4,1 + .*: (4c bf ff c4|c4 ff bf 4c) addpcis r5,-2 +diff --git a/gas/testsuite/gas/ppc/power9.s b/gas/testsuite/gas/ppc/power9.s +index 27f1122018..4e3530fba9 100644 +--- a/gas/testsuite/gas/ppc/power9.s ++++ b/gas/testsuite/gas/ppc/power9.s +@@ -303,6 +303,7 @@ power9: + xscvdphp 41,51 + xvcvhpsp 42,52 + xvcvsphp 43,53 ++ lnia 3 + addpcis 3,0 + subpcis 3,0 + addpcis 4,1 +diff --git a/gprof/ChangeLog b/gprof/ChangeLog +index cc57e0d872..0c25d519d6 100644 +--- a/gprof/ChangeLog ++++ b/gprof/ChangeLog +@@ -2,6 +2,10 @@ + + * configure: Regenerate. + ++2017-03-02 Tristan Gingold <gingold@adacore.com> ++ ++ * configure: Regenerate. ++ + 2017-01-02 Alan Modra <amodra@gmail.com> + + Update year range in copyright notice of all files. +diff --git a/gprof/configure b/gprof/configure +index 43e0dac041..9e6b8f3525 100755 +--- a/gprof/configure ++++ b/gprof/configure +@@ -1,6 +1,6 @@ + #! /bin/sh + # Guess values for system-dependent variables and create Makefiles. +-# Generated by GNU Autoconf 2.64 for gprof 2.28. ++# Generated by GNU Autoconf 2.64 for gprof 2.28.0. + # + # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, + # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software +@@ -556,8 +556,8 @@ MAKEFLAGS= + # Identity of this package. + PACKAGE_NAME='gprof' + PACKAGE_TARNAME='gprof' +-PACKAGE_VERSION='2.28' +-PACKAGE_STRING='gprof 2.28' ++PACKAGE_VERSION='2.28.0' ++PACKAGE_STRING='gprof 2.28.0' + PACKAGE_BUGREPORT='' + PACKAGE_URL='' + +@@ -1302,7 +1302,7 @@ if test "$ac_init_help" = "long"; then + # Omit some internal or obsolete options to make the list less imposing. + # This message is too long to be a string in the A/UX 3.1 sh. + cat <<_ACEOF +-\`configure' configures gprof 2.28 to adapt to many kinds of systems. ++\`configure' configures gprof 2.28.0 to adapt to many kinds of systems. + + Usage: $0 [OPTION]... [VAR=VALUE]... + +@@ -1373,7 +1373,7 @@ fi + + if test -n "$ac_init_help"; then + case $ac_init_help in +- short | recursive ) echo "Configuration of gprof 2.28:";; ++ short | recursive ) echo "Configuration of gprof 2.28.0:";; + esac + cat <<\_ACEOF + +@@ -1479,7 +1479,7 @@ fi + test -n "$ac_init_help" && exit $ac_status + if $ac_init_version; then + cat <<\_ACEOF +-gprof configure 2.28 ++gprof configure 2.28.0 + generated by GNU Autoconf 2.64 + + Copyright (C) 2009 Free Software Foundation, Inc. +@@ -1844,7 +1844,7 @@ cat >config.log <<_ACEOF + This file contains any messages produced by compilers while + running configure, to aid debugging if configure makes a mistake. + +-It was created by gprof $as_me 2.28, which was ++It was created by gprof $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + $ $0 $@ +@@ -3653,7 +3653,7 @@ fi + + # Define the identity of the package. + PACKAGE='gprof' +- VERSION='2.28' ++ VERSION='2.28.0' + + + cat >>confdefs.h <<_ACEOF +@@ -12787,7 +12787,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 + # report actual input values of CONFIG_FILES etc. instead of their + # values after options handling. + ac_log=" +-This file was extended by gprof $as_me 2.28, which was ++This file was extended by gprof $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + CONFIG_FILES = $CONFIG_FILES +@@ -12851,7 +12851,7 @@ Report bugs to the package provider." + _ACEOF + cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 + ac_cs_version="\\ +-gprof config.status 2.28 ++gprof config.status 2.28.0 + configured by $0, generated by GNU Autoconf 2.64, + with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" + +diff --git a/include/ChangeLog b/include/ChangeLog +index af39f333d4..9dd5f75f77 100644 +--- a/include/ChangeLog ++++ b/include/ChangeLog +@@ -1,3 +1,11 @@ ++2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> ++ ++ Backport from mainline ++ 2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> ++ ++ * opcode/s390.h (S390_INSTR_FLAG_VX2): Remove. ++ (S390_INSTR_FLAG_FACILITY_MASK): Adjust value. ++ + 2017-02-28 Alan Modra <amodra@gmail.com> + + * elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment. +diff --git a/include/opcode/s390.h b/include/opcode/s390.h +index 7ce5616841..2e07664425 100644 +--- a/include/opcode/s390.h ++++ b/include/opcode/s390.h +@@ -51,8 +51,7 @@ enum s390_opcode_cpu_val + + #define S390_INSTR_FLAG_HTM 0x2 + #define S390_INSTR_FLAG_VX 0x4 +-#define S390_INSTR_FLAG_VX2 0x8 +-#define S390_INSTR_FLAG_FACILITY_MASK 0xe ++#define S390_INSTR_FLAG_FACILITY_MASK 0x6 + + /* The opcode table is an array of struct s390_opcode. */ + +diff --git a/ld/ChangeLog b/ld/ChangeLog +index ba7d1d4ce1..f4fda0ca3a 100644 +--- a/ld/ChangeLog ++++ b/ld/ChangeLog +@@ -1,3 +1,12 @@ ++2017-03-07 Alan Modra <amodra@gmail.com> ++ ++ * ldlang.c (open_input_bfds): Check that lang_assignment_statement ++ is not an assert before referencing defsym. ++ ++2017-03-02 Tristan Gingold <gingold@adacore.com> ++ ++ * configure: Regenerate. ++ + 2017-03-02 Tristan Gingold <gingold@adacore.com> + + * configure: Regenerate. +diff --git a/ld/configure b/ld/configure +index 36af9695b1..a16c6db059 100755 +--- a/ld/configure ++++ b/ld/configure +@@ -1,6 +1,6 @@ + #! /bin/sh + # Guess values for system-dependent variables and create Makefiles. +-# Generated by GNU Autoconf 2.64 for ld 2.28. ++# Generated by GNU Autoconf 2.64 for ld 2.28.0. + # + # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, + # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software +@@ -556,8 +556,8 @@ MAKEFLAGS= + # Identity of this package. + PACKAGE_NAME='ld' + PACKAGE_TARNAME='ld' +-PACKAGE_VERSION='2.28' +-PACKAGE_STRING='ld 2.28' ++PACKAGE_VERSION='2.28.0' ++PACKAGE_STRING='ld 2.28.0' + PACKAGE_BUGREPORT='' + PACKAGE_URL='' + +@@ -1354,7 +1354,7 @@ if test "$ac_init_help" = "long"; then + # Omit some internal or obsolete options to make the list less imposing. + # This message is too long to be a string in the A/UX 3.1 sh. + cat <<_ACEOF +-\`configure' configures ld 2.28 to adapt to many kinds of systems. ++\`configure' configures ld 2.28.0 to adapt to many kinds of systems. + + Usage: $0 [OPTION]... [VAR=VALUE]... + +@@ -1425,7 +1425,7 @@ fi + + if test -n "$ac_init_help"; then + case $ac_init_help in +- short | recursive ) echo "Configuration of ld 2.28:";; ++ short | recursive ) echo "Configuration of ld 2.28.0:";; + esac + cat <<\_ACEOF + +@@ -1550,7 +1550,7 @@ fi + test -n "$ac_init_help" && exit $ac_status + if $ac_init_version; then + cat <<\_ACEOF +-ld configure 2.28 ++ld configure 2.28.0 + generated by GNU Autoconf 2.64 + + Copyright (C) 2009 Free Software Foundation, Inc. +@@ -2259,7 +2259,7 @@ cat >config.log <<_ACEOF + This file contains any messages produced by compilers while + running configure, to aid debugging if configure makes a mistake. + +-It was created by ld $as_me 2.28, which was ++It was created by ld $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + $ $0 $@ +@@ -4069,7 +4069,7 @@ fi + + # Define the identity of the package. + PACKAGE='ld' +- VERSION='2.28' ++ VERSION='2.28.0' + + + cat >>confdefs.h <<_ACEOF +@@ -17813,7 +17813,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 + # report actual input values of CONFIG_FILES etc. instead of their + # values after options handling. + ac_log=" +-This file was extended by ld $as_me 2.28, which was ++This file was extended by ld $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + CONFIG_FILES = $CONFIG_FILES +@@ -17877,7 +17877,7 @@ Report bugs to the package provider." + _ACEOF + cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 + ac_cs_version="\\ +-ld config.status 2.28 ++ld config.status 2.28.0 + configured by $0, generated by GNU Autoconf 2.64, + with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" + +diff --git a/ld/ldlang.c b/ld/ldlang.c +index dafc3489fd..54f160c4db 100644 +--- a/ld/ldlang.c ++++ b/ld/ldlang.c +@@ -3377,7 +3377,8 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode) + #endif + break; + case lang_assignment_statement_enum: +- if (s->assignment_statement.exp->assign.defsym) ++ if (s->assignment_statement.exp->type.node_class != etree_assert ++ && s->assignment_statement.exp->assign.defsym) + /* This is from a --defsym on the command line. */ + exp_fold_tree_no_dot (s->assignment_statement.exp); + break; +diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog +index 7f01e54188..bdc6266602 100644 +--- a/opcodes/ChangeLog ++++ b/opcodes/ChangeLog +@@ -1,3 +1,38 @@ ++2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> ++ ++ Backport from mainline ++ 2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> ++ ++ * s390-mkopc.c (main): Remove vx2 check. ++ * s390-opc.txt: Remove vx2 instruction flags. ++ ++2017-03-08 Peter Bergner <bergner@vnet.ibm.com> ++ ++ * ppc-dis.c (ppc_opts) <altivec>: Do not use PPC_OPCODE_ALTIVEC2; ++ <vsx>: Do not use PPC_OPCODE_VSX3; ++ ++2017-03-08 Peter Bergner <bergner@vnet.ibm.com> ++ ++ Apply from master. ++ 2017-03-08 Peter Bergner <bergner@vnet.ibm.com> ++ * ppc-opc.c (powerpc_opcodes) <lnia>: New extended mnemonic. ++ ++2017-03-07 Alan Modra <amodra@gmail.com> ++ ++ Apply from master ++ 2017-03-06 Alan Modra <amodra@gmail.com> ++ PR 21124 ++ * ppc-opc.c (extract_esync, extract_ls, extract_ral, extract_ram) ++ (extract_raq, extract_ras, extract_rbx): New functions. ++ (powerpc_operands): Use opposite corresponding insert function. ++ (Q_MASK): Define. ++ (powerpc_opcodes): Apply Q_MASK to all quad insns with even ++ register restriction. ++ ++2017-03-02 Tristan Gingold <gingold@adacore.com> ++ ++ * configure: Regenerate. ++ + 2017-03-02 Tristan Gingold <gingold@adacore.com> + + * configure: Regenerate. +diff --git a/opcodes/configure b/opcodes/configure +index be87eb22a5..0b352a454d 100755 +--- a/opcodes/configure ++++ b/opcodes/configure +@@ -1,6 +1,6 @@ + #! /bin/sh + # Guess values for system-dependent variables and create Makefiles. +-# Generated by GNU Autoconf 2.64 for opcodes 2.28. ++# Generated by GNU Autoconf 2.64 for opcodes 2.28.0. + # + # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, + # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software +@@ -556,8 +556,8 @@ MAKEFLAGS= + # Identity of this package. + PACKAGE_NAME='opcodes' + PACKAGE_TARNAME='opcodes' +-PACKAGE_VERSION='2.28' +-PACKAGE_STRING='opcodes 2.28' ++PACKAGE_VERSION='2.28.0' ++PACKAGE_STRING='opcodes 2.28.0' + PACKAGE_BUGREPORT='' + PACKAGE_URL='' + +@@ -1322,7 +1322,7 @@ if test "$ac_init_help" = "long"; then + # Omit some internal or obsolete options to make the list less imposing. + # This message is too long to be a string in the A/UX 3.1 sh. + cat <<_ACEOF +-\`configure' configures opcodes 2.28 to adapt to many kinds of systems. ++\`configure' configures opcodes 2.28.0 to adapt to many kinds of systems. + + Usage: $0 [OPTION]... [VAR=VALUE]... + +@@ -1393,7 +1393,7 @@ fi + + if test -n "$ac_init_help"; then + case $ac_init_help in +- short | recursive ) echo "Configuration of opcodes 2.28:";; ++ short | recursive ) echo "Configuration of opcodes 2.28.0:";; + esac + cat <<\_ACEOF + +@@ -1500,7 +1500,7 @@ fi + test -n "$ac_init_help" && exit $ac_status + if $ac_init_version; then + cat <<\_ACEOF +-opcodes configure 2.28 ++opcodes configure 2.28.0 + generated by GNU Autoconf 2.64 + + Copyright (C) 2009 Free Software Foundation, Inc. +@@ -1910,7 +1910,7 @@ cat >config.log <<_ACEOF + This file contains any messages produced by compilers while + running configure, to aid debugging if configure makes a mistake. + +-It was created by opcodes $as_me 2.28, which was ++It was created by opcodes $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + $ $0 $@ +@@ -3719,7 +3719,7 @@ fi + + # Define the identity of the package. + PACKAGE='opcodes' +- VERSION='2.28' ++ VERSION='2.28.0' + + + cat >>confdefs.h <<_ACEOF +@@ -13305,7 +13305,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 + # report actual input values of CONFIG_FILES etc. instead of their + # values after options handling. + ac_log=" +-This file was extended by opcodes $as_me 2.28, which was ++This file was extended by opcodes $as_me 2.28.0, which was + generated by GNU Autoconf 2.64. Invocation command line was + + CONFIG_FILES = $CONFIG_FILES +@@ -13369,7 +13369,7 @@ Report bugs to the package provider." + _ACEOF + cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 + ac_cs_version="\\ +-opcodes config.status 2.28 ++opcodes config.status 2.28.0 + configured by $0, generated by GNU Autoconf 2.64, + with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" + +diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c +index e0eff7a67b..38f7e55e6c 100644 +--- a/opcodes/ppc-dis.c ++++ b/opcodes/ppc-dis.c +@@ -93,7 +93,7 @@ struct ppc_mopt ppc_opts[] = { + | PPC_OPCODE_A2), + 0 }, + { "altivec", PPC_OPCODE_PPC, +- PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 }, ++ PPC_OPCODE_ALTIVEC }, + { "any", 0, + PPC_OPCODE_ANY }, + { "booke", PPC_OPCODE_PPC | PPC_OPCODE_BOOKE, +@@ -221,7 +221,7 @@ struct ppc_mopt ppc_opts[] = { + | PPC_OPCODE_E500), + PPC_OPCODE_VLE }, + { "vsx", PPC_OPCODE_PPC, +- PPC_OPCODE_VSX | PPC_OPCODE_VSX3 }, ++ PPC_OPCODE_VSX }, + { "htm", PPC_OPCODE_PPC, + PPC_OPCODE_HTM }, + }; +diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c +index 9ac779c96a..f7d1dcd7c2 100644 +--- a/opcodes/ppc-opc.c ++++ b/opcodes/ppc-opc.c +@@ -54,6 +54,7 @@ static long extract_bo (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_boe (unsigned long, long, ppc_cpu_t, const char **); + static long extract_boe (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_esync (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_esync (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_dcmxs (unsigned long, long, ppc_cpu_t, const char **); + static long extract_dcmxs (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_dxd (unsigned long, long, ppc_cpu_t, const char **); +@@ -65,6 +66,7 @@ static long extract_fxm (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_li20 (unsigned long, long, ppc_cpu_t, const char **); + static long extract_li20 (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_ls (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_ls (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_mbe (unsigned long, long, ppc_cpu_t, const char **); + static long extract_mbe (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_mb6 (unsigned long, long, ppc_cpu_t, const char **); +@@ -76,12 +78,17 @@ static long extract_nsi (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_oimm (unsigned long, long, ppc_cpu_t, const char **); + static long extract_oimm (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_ral (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_ral (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_ram (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_ram (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_raq (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_raq (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_ras (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_ras (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_rbs (unsigned long, long, ppc_cpu_t, const char **); + static long extract_rbs (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_rbx (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_rbx (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_rx (unsigned long, long, ppc_cpu_t, const char **); + static long extract_rx (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_ry (unsigned long, long, ppc_cpu_t, const char **); +@@ -462,7 +469,7 @@ const struct powerpc_operand powerpc_operands[] = + /* The LS or WC field in an X (sync or wait) form instruction. */ + #define LS LIA + 1 + #define WC LS +- { 0x3, 21, insert_ls, NULL, PPC_OPERAND_OPTIONAL }, ++ { 0x3, 21, insert_ls, extract_ls, PPC_OPERAND_OPTIONAL }, + + /* The ME field in an M form instruction. */ + #define ME LS + 1 +@@ -519,24 +526,24 @@ const struct powerpc_operand powerpc_operands[] = + value restrictions. */ + #define RAQ RA0 + 1 + #define RAX RAQ +- { 0x1f, 16, insert_raq, NULL, PPC_OPERAND_GPR_0 }, ++ { 0x1f, 16, insert_raq, extract_raq, PPC_OPERAND_GPR_0 }, + + /* The RA field in a D or X form instruction which is an updating + load, which means that the RA field may not be zero and may not + equal the RT field. */ + #define RAL RAQ + 1 +- { 0x1f, 16, insert_ral, NULL, PPC_OPERAND_GPR_0 }, ++ { 0x1f, 16, insert_ral, extract_ral, PPC_OPERAND_GPR_0 }, + + /* The RA field in an lmw instruction, which has special value + restrictions. */ + #define RAM RAL + 1 +- { 0x1f, 16, insert_ram, NULL, PPC_OPERAND_GPR_0 }, ++ { 0x1f, 16, insert_ram, extract_ram, PPC_OPERAND_GPR_0 }, + + /* The RA field in a D or X form instruction which is an updating + store or an updating floating point load, which means that the RA + field may not be zero. */ + #define RAS RAM + 1 +- { 0x1f, 16, insert_ras, NULL, PPC_OPERAND_GPR_0 }, ++ { 0x1f, 16, insert_ras, extract_ras, PPC_OPERAND_GPR_0 }, + + /* The RA field of the tlbwe, dccci and iccci instructions, + which are optional. */ +@@ -557,7 +564,7 @@ const struct powerpc_operand powerpc_operands[] = + /* The RB field in an lswx instruction, which has special value + restrictions. */ + #define RBX RBS + 1 +- { 0x1f, 11, insert_rbx, NULL, PPC_OPERAND_GPR }, ++ { 0x1f, 11, insert_rbx, extract_rbx, PPC_OPERAND_GPR }, + + /* The RB field of the dccci and iccci instructions, which are optional. */ + #define RBOPT RBX + 1 +@@ -580,6 +587,7 @@ const struct powerpc_operand powerpc_operands[] = + which have special value restrictions. */ + #define RSQ RS + 1 + #define RTQ RSQ ++#define Q_MASK (1 << 21) + { 0x1e, 21, NULL, NULL, PPC_OPERAND_GPR }, + + /* The RS field of the tlbwe instruction, which is optional. */ +@@ -694,7 +702,7 @@ const struct powerpc_operand powerpc_operands[] = + + /* The ESYNC field in an X (sync) form instruction. */ + #define ESYNC STRM + 1 +- { 0xf, 16, insert_esync, NULL, PPC_OPERAND_OPTIONAL }, ++ { 0xf, 16, insert_esync, extract_esync, PPC_OPERAND_OPTIONAL }, + + /* The SV field in a POWER SC form instruction. */ + #define SV ESYNC + 1 +@@ -1533,6 +1541,22 @@ insert_ls (unsigned long insn, + return insn | ((value & 0x3) << 21); + } + ++static long ++extract_ls (unsigned long insn, ++ ppc_cpu_t dialect, ++ int *invalid) ++{ ++ unsigned long lvalue = (insn >> 21) & 3; ++ ++ if (((insn >> 1) & 0x3ff) == 598) ++ { ++ unsigned long max_lvalue = (dialect & PPC_OPCODE_POWER4) ? 2 : 1; ++ if (lvalue > max_lvalue) ++ *invalid = 1; ++ } ++ return lvalue; ++} ++ + /* The 4-bit E field in a sync instruction that accepts 2 operands. + If ESYNC is non-zero, then the L field must be either 0 or 1 and + the complement of ESYNC-bit2. */ +@@ -1560,6 +1584,27 @@ insert_esync (unsigned long insn, + return insn | ((value & 0xf) << 16); + } + ++static long ++extract_esync (unsigned long insn, ++ ppc_cpu_t dialect, ++ int *invalid) ++{ ++ unsigned long ls = (insn >> 21) & 0x3; ++ unsigned long lvalue = (insn >> 16) & 0xf; ++ ++ if (lvalue == 0) ++ { ++ if (((dialect & PPC_OPCODE_E6500) != 0 && ls > 1) ++ || ((dialect & PPC_OPCODE_POWER9) != 0 && ls > 2)) ++ *invalid = 1; ++ } ++ else if ((ls & ~0x1) ++ || (((lvalue >> 1) & 0x1) ^ ls) == 0) ++ *invalid = 1; ++ ++ return lvalue; ++} ++ + /* The MB and ME fields in an M form instruction expressed as a single + operand which is itself a bitmask. The extraction function always + marks it as invalid, since we never want to recognize an +@@ -1743,6 +1788,19 @@ insert_ral (unsigned long insn, + return insn | ((value & 0x1f) << 16); + } + ++static long ++extract_ral (unsigned long insn, ++ ppc_cpu_t dialect ATTRIBUTE_UNUSED, ++ int *invalid) ++{ ++ long rtvalue = (insn >> 21) & 0x1f; ++ long ravalue = (insn >> 16) & 0x1f; ++ ++ if (rtvalue == ravalue || ravalue == 0) ++ *invalid = 1; ++ return ravalue; ++} ++ + /* The RA field in an lmw instruction, which has special value + restrictions. */ + +@@ -1757,6 +1815,19 @@ insert_ram (unsigned long insn, + return insn | ((value & 0x1f) << 16); + } + ++static long ++extract_ram (unsigned long insn, ++ ppc_cpu_t dialect ATTRIBUTE_UNUSED, ++ int *invalid) ++{ ++ unsigned long rtvalue = (insn >> 21) & 0x1f; ++ unsigned long ravalue = (insn >> 16) & 0x1f; ++ ++ if (ravalue >= rtvalue) ++ *invalid = 1; ++ return ravalue; ++} ++ + /* The RA field in the DQ form lq or an lswx instruction, which have special + value restrictions. */ + +@@ -1773,6 +1844,19 @@ insert_raq (unsigned long insn, + return insn | ((value & 0x1f) << 16); + } + ++static long ++extract_raq (unsigned long insn, ++ ppc_cpu_t dialect ATTRIBUTE_UNUSED, ++ int *invalid) ++{ ++ unsigned long rtvalue = (insn >> 21) & 0x1f; ++ unsigned long ravalue = (insn >> 16) & 0x1f; ++ ++ if (ravalue == rtvalue) ++ *invalid = 1; ++ return ravalue; ++} ++ + /* The RA field in a D or X form instruction which is an updating + store or an updating floating point load, which means that the RA + field may not be zero. */ +@@ -1788,6 +1872,18 @@ insert_ras (unsigned long insn, + return insn | ((value & 0x1f) << 16); + } + ++static long ++extract_ras (unsigned long insn, ++ ppc_cpu_t dialect ATTRIBUTE_UNUSED, ++ int *invalid) ++{ ++ unsigned long ravalue = (insn >> 16) & 0x1f; ++ ++ if (ravalue == 0) ++ *invalid = 1; ++ return ravalue; ++} ++ + /* The RB field in an X form instruction when it must be the same as + the RS field in the instruction. This is used for extended + mnemonics like mr. This operand is marked FAKE. The insertion +@@ -1829,6 +1925,19 @@ insert_rbx (unsigned long insn, + return insn | ((value & 0x1f) << 11); + } + ++static long ++extract_rbx (unsigned long insn, ++ ppc_cpu_t dialect ATTRIBUTE_UNUSED, ++ int *invalid) ++{ ++ unsigned long rtvalue = (insn >> 21) & 0x1f; ++ unsigned long rbvalue = (insn >> 11) & 0x1f; ++ ++ if (rbvalue == rtvalue) ++ *invalid = 1; ++ return rbvalue; ++} ++ + /* The SCI8 field is made up of SCL and {U,N}I8 fields. */ + static unsigned long + insert_sci8 (unsigned long insn, +@@ -2443,6 +2552,8 @@ extract_vleil (unsigned long insn, + /* An DX form instruction. */ + #define DX(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) + #define DX_MASK DX (0x3f, 0x1f) ++/* An DX form instruction with the D bits specified. */ ++#define NODX_MASK (DX_MASK | 0x1fffc1) + + /* An EVSEL form instruction. */ + #define EVSEL(op, xop) (OP (op) | (((unsigned long)(xop)) & 0xff) << 3) +@@ -4155,6 +4266,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"mcrf", XL(19,0), XLBB_MASK|(3<<21)|(3<<16), COM, PPCVLE, {BF, BFA}}, + ++{"lnia", DX(19,2), NODX_MASK, POWER9, PPCVLE, {RT}}, + {"addpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, DXD}}, + {"subpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, NDXD}}, + +@@ -4974,7 +5086,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}}, + +-{"stqcx.", XRC(31,182,1), X_MASK, POWER8, 0, {RSQ, RA0, RB}}, ++{"stqcx.", XRC(31,182,1), X_MASK|Q_MASK, POWER8, 0, {RSQ, RA0, RB}}, + {"wchkall", X(31,182), X_MASK, PPCA2, 0, {OBF}}, + + {"stwux", X(31,183), X_MASK, PPCCOM, 0, {RS, RAS, RB}}, +@@ -5105,7 +5217,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"mfapidi", X(31,275), X_MASK, BOOKE, E500|TITAN, {RT, RA}}, + +-{"lqarx", X(31,276), XEH_MASK, POWER8, 0, {RTQ, RAX, RBX, EH}}, ++{"lqarx", X(31,276), XEH_MASK|Q_MASK, POWER8, 0, {RTQ, RAX, RBX, EH}}, + + {"lscbx", XRC(31,277,0), X_MASK, M601, 0, {RT, RA, RB}}, + {"lscbx.", XRC(31,277,1), X_MASK, M601, 0, {RT, RA, RB}}, +@@ -6052,7 +6164,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"lhbrx", X(31,790), X_MASK, COM, 0, {RT, RA0, RB}}, + +-{"lfdpx", X(31,791), X_MASK, POWER6, POWER7, {FRTp, RA0, RB}}, ++{"lfdpx", X(31,791), X_MASK|Q_MASK, POWER6, POWER7, {FRTp, RA0, RB}}, + {"lfqx", X(31,791), X_MASK, POWER2, 0, {FRT, RA, RB}}, + + {"sraw", XRC(31,792,0), X_MASK, PPCCOM, 0, {RA, RS, RB}}, +@@ -6167,7 +6279,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"sthbrx", X(31,918), X_MASK, COM, 0, {RS, RA0, RB}}, + +-{"stfdpx", X(31,919), X_MASK, POWER6, POWER7, {FRSp, RA0, RB}}, ++{"stfdpx", X(31,919), X_MASK|Q_MASK, POWER6, POWER7, {FRSp, RA0, RB}}, + {"stfqx", X(31,919), X_MASK, POWER2, 0, {FRS, RA0, RB}}, + + {"sraq", XRC(31,920,0), X_MASK, M601, 0, {RA, RS, RB}}, +@@ -6345,13 +6457,13 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"stfdu", OP(55), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RAS}}, + +-{"lq", OP(56), OP_MASK, POWER4, PPC476|PPCVLE, {RTQ, DQ, RAQ}}, ++{"lq", OP(56), OP_MASK|Q_MASK, POWER4, PPC476|PPCVLE, {RTQ, DQ, RAQ}}, + {"psq_l", OP(56), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}}, + {"lfq", OP(56), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}}, + + {"lxsd", DSO(57,2), DS_MASK, PPCVSX3, PPCVLE, {VD, DS, RA0}}, + {"lxssp", DSO(57,3), DS_MASK, PPCVSX3, PPCVLE, {VD, DS, RA0}}, +-{"lfdp", OP(57), OP_MASK, POWER6, POWER7|PPCVLE, {FRTp, DS, RA0}}, ++{"lfdp", OP(57), OP_MASK|Q_MASK, POWER6, POWER7|PPCVLE, {FRTp, DS, RA0}}, + {"psq_lu", OP(57), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}}, + {"lfqu", OP(57), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}}, + +@@ -6676,21 +6788,21 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"stxv", DQX(61,5), DQX_MASK, PPCVSX3, PPCVLE, {XSQ6, DQ, RA0}}, + {"stxsd", DSO(61,2), DS_MASK, PPCVSX3, PPCVLE, {VS, DS, RA0}}, + {"stxssp", DSO(61,3), DS_MASK, PPCVSX3, PPCVLE, {VS, DS, RA0}}, +-{"stfdp", OP(61), OP_MASK, POWER6, POWER7|PPCVLE, {FRSp, DS, RA0}}, ++{"stfdp", OP(61), OP_MASK|Q_MASK, POWER6, POWER7|PPCVLE, {FRSp, DS, RA0}}, + {"psq_stu", OP(61), OP_MASK, PPCPS, PPCVLE, {FRS,PSD,RA,PSW,PSQ}}, + {"stfqu", OP(61), OP_MASK, POWER2, PPCVLE, {FRS, D, RA}}, + + {"std", DSO(62,0), DS_MASK, PPC64, PPCVLE, {RS, DS, RA0}}, + {"stdu", DSO(62,1), DS_MASK, PPC64, PPCVLE, {RS, DS, RAS}}, +-{"stq", DSO(62,2), DS_MASK, POWER4, PPC476|PPCVLE, {RSQ, DS, RA0}}, ++{"stq", DSO(62,2), DS_MASK|Q_MASK, POWER4, PPC476|PPCVLE, {RSQ, DS, RA0}}, + + {"fcmpu", X(63,0), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}}, + +-{"daddq", XRC(63,2,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, +-{"daddq.", XRC(63,2,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"daddq", XRC(63,2,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"daddq.", XRC(63,2,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, + +-{"dquaq", ZRC(63,3,0), Z2_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, +-{"dquaq.", ZRC(63,3,1), Z2_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, ++{"dquaq", ZRC(63,3,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, ++{"dquaq.", ZRC(63,3,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, + + {"xsaddqp", XRC(63,4,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + {"xsaddqpo", XRC(63,4,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, +@@ -6772,11 +6884,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"fcmpo", X(63,32), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}}, + +-{"dmulq", XRC(63,34,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, +-{"dmulq.", XRC(63,34,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"dmulq", XRC(63,34,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"dmulq.", XRC(63,34,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, + +-{"drrndq", ZRC(63,35,0), Z2_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, +-{"drrndq.", ZRC(63,35,1), Z2_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, ++{"drrndq", ZRC(63,35,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, ++{"drrndq.", ZRC(63,35,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, + + {"xsmulqp", XRC(63,36,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + {"xsmulqpo", XRC(63,36,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, +@@ -6791,11 +6903,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"mcrfs", X(63,64), XRB_MASK|(3<<21)|(3<<16), COM, PPCVLE, {BF, BFA}}, + +-{"dscliq", ZRC(63,66,0), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, +-{"dscliq.", ZRC(63,66,1), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, ++{"dscliq", ZRC(63,66,0), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, ++{"dscliq.", ZRC(63,66,1), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, + +-{"dquaiq", ZRC(63,67,0), Z2_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, +-{"dquaiq.", ZRC(63,67,1), Z2_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, ++{"dquaiq", ZRC(63,67,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, ++{"dquaiq.", ZRC(63,67,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, + + {"mtfsb0", XRC(63,70,0), XRARB_MASK, COM, PPCVLE, {BT}}, + {"mtfsb0.", XRC(63,70,1), XRARB_MASK, COM, PPCVLE, {BT}}, +@@ -6803,11 +6915,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"fmr", XRC(63,72,0), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, + {"fmr.", XRC(63,72,1), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, + +-{"dscriq", ZRC(63,98,0), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, +-{"dscriq.", ZRC(63,98,1), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, ++{"dscriq", ZRC(63,98,0), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, ++{"dscriq.", ZRC(63,98,1), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, + +-{"drintxq", ZRC(63,99,0), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, +-{"drintxq.", ZRC(63,99,1), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, ++{"drintxq", ZRC(63,99,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, ++{"drintxq.", ZRC(63,99,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, + + {"xscpsgnqp", X(63,100), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + +@@ -6839,11 +6951,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"dtstdcq", Z(63,194), Z_MASK, POWER6, PPCVLE, {BF, FRAp, DCM}}, + {"dtstdgq", Z(63,226), Z_MASK, POWER6, PPCVLE, {BF, FRAp, DGM}}, + +-{"drintnq", ZRC(63,227,0), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, +-{"drintnq.", ZRC(63,227,1), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, ++{"drintnq", ZRC(63,227,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, ++{"drintnq.", ZRC(63,227,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, + +-{"dctqpq", XRC(63,258,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, +-{"dctqpq.", XRC(63,258,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, ++{"dctqpq", XRC(63,258,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, ++{"dctqpq.", XRC(63,258,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, + + {"fabs", XRC(63,264,0), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, + {"fabs.", XRC(63,264,1), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, +@@ -6851,8 +6963,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"dctfixq", XRC(63,290,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, + {"dctfixq.", XRC(63,290,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, + +-{"ddedpdq", XRC(63,322,0), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, +-{"ddedpdq.", XRC(63,322,1), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, ++{"ddedpdq", XRC(63,322,0), X_MASK|Q_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, ++{"ddedpdq.", XRC(63,322,1), X_MASK|Q_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, + + {"dxexq", XRC(63,354,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, + {"dxexq.", XRC(63,354,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, +@@ -6881,14 +6993,14 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"frim", XRC(63,488,0), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}}, + {"frim.", XRC(63,488,1), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}}, + +-{"dsubq", XRC(63,514,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, +-{"dsubq.", XRC(63,514,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"dsubq", XRC(63,514,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"dsubq.", XRC(63,514,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, + + {"xssubqp", XRC(63,516,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + {"xssubqpo", XRC(63,516,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + +-{"ddivq", XRC(63,546,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, +-{"ddivq.", XRC(63,546,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"ddivq", XRC(63,546,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"ddivq.", XRC(63,546,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, + + {"xsdivqp", XRC(63,548,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + {"xsdivqpo", XRC(63,548,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, +@@ -6917,11 +7029,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mtfsf.", XFL(63,711,1), XFL_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FLM, FRB, XFL_L, W}}, + {"mtfsf.", XFL(63,711,1), XFL_MASK, COM, POWER6|PPCA2|PPC476|PPCEFS|PPCVLE, {FLM, FRB}}, + +-{"drdpq", XRC(63,770,0), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, +-{"drdpq.", XRC(63,770,1), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, ++{"drdpq", XRC(63,770,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, ++{"drdpq.", XRC(63,770,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, + +-{"dcffixq", XRC(63,802,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, +-{"dcffixq.", XRC(63,802,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, ++{"dcffixq", XRC(63,802,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, ++{"dcffixq.", XRC(63,802,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, + + {"xsabsqp", XVA(63,804,0), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, + {"xsxexpqp", XVA(63,804,2), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, +@@ -6941,8 +7053,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"fctidz.", XRC(63,815,1), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}}, + {"fctidz.", XRC(63,815,1), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}}, + +-{"denbcdq", XRC(63,834,0), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, +-{"denbcdq.", XRC(63,834,1), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, ++{"denbcdq", XRC(63,834,0), X_MASK|Q_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, ++{"denbcdq.", XRC(63,834,1), X_MASK|Q_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, + + {"xscvqpuwz", XVA(63,836,1), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, + {"xscvudqp", XVA(63,836,2), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, +@@ -6961,8 +7073,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"fcfid.", XRC(63,846,1), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}}, + {"fcfid.", XRC(63,846,1), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}}, + +-{"diexq", XRC(63,866,0), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, +-{"diexq.", XRC(63,866,1), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, ++{"diexq", XRC(63,866,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, ++{"diexq.", XRC(63,866,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, + + {"xsiexpqp", X(63,868), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + +diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c +index 8e0b332585..68c55a9499 100644 +--- a/opcodes/s390-mkopc.c ++++ b/opcodes/s390-mkopc.c +@@ -419,10 +419,6 @@ main (void) + && (str[2] == 0 || str[2] == ',')) { + flag_bits |= S390_INSTR_FLAG_VX; + str += 2; +- } else if (strncmp (str, "vx2", 3) == 0 +- && (str[3] == 0 || str[3] == ',')) { +- flag_bits |= S390_INSTR_FLAG_VX2; +- str += 3; + } else { + fprintf (stderr, "Couldn't parse flags string %s\n", + flags_string); +diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt +index b3815873aa..51a17f3b37 100644 +--- a/opcodes/s390-opc.txt ++++ b/opcodes/s390-opc.txt +@@ -1685,146 +1685,146 @@ b93c ppno RRE_RR "perform pseudorandom number operation" z13 zarch + # Vector Enhancements Facility 1 + + e70000000085 vbperm VRR_VVV "vector bit permute" arch12 zarch +-e70000006004 vllezlf VRX_VRRD "vector load logical word element and zero - left aligned" arch12 zarch vx2 +-e700000000b8 vmsl VRR_VVVUU0V "vector multiply sum logical" arch12 zarch vx2 +-e700030000b8 vmslg VRR_VVVU0VB "vector multiply sum logical double word" arch12 zarch vx2 +-e7000000006c vnx VRR_VVV "vector not exclusive or" arch12 zarch vx2 ++e70000006004 vllezlf VRX_VRRD "vector load logical word element and zero - left aligned" arch12 zarch ++e700000000b8 vmsl VRR_VVVUU0V "vector multiply sum logical" arch12 zarch ++e700030000b8 vmslg VRR_VVVU0VB "vector multiply sum logical double word" arch12 zarch ++e7000000006c vnx VRR_VVV "vector not exclusive or" arch12 zarch + e7000000006e vnn VRR_VVV "vector nand" arch12 zarch +-e7000000006f voc VRR_VVV "vector or with complement" arch12 zarch vx2 +-e70000000050 vpopctb VRR_VV "vector population count byte" arch12 zarch vx2 +-e70000001050 vpopcth VRR_VV "vector population count halfword" arch12 zarch vx2 +-e70000002050 vpopctf VRR_VV "vector population count word" arch12 zarch vx2 +-e70000003050 vpopctg VRR_VV "vector population count double word" arch12 zarch vx2 +-e700000020e3 vfasb VRR_VVV "vector fp add short" arch12 zarch vx2 +-e700000820e3 wfasb VRR_VVV "scalar vector fp add scalar short" arch12 zarch vx2 +-e700000840e3 wfaxb VRR_VVV "scalar vector fp add scalar extended" arch12 zarch vx2 +-e700000020cb wfcsb VRR_VV "scalar vector fp compare scalar short" arch12 zarch vx2 +-e700000040cb wfcxb VRR_VV "scalar vector fp compare scalar extended" arch12 zarch vx2 +-e700000020ca wfksb VRR_VV "scalar vector fp compare and signal scalar short" arch12 zarch vx2 +-e700000040ca wfkxb VRR_VV "scalar vector fp compare and signal scalar extended" arch12 zarch vx2 ++e7000000006f voc VRR_VVV "vector or with complement" arch12 zarch ++e70000000050 vpopctb VRR_VV "vector population count byte" arch12 zarch ++e70000001050 vpopcth VRR_VV "vector population count halfword" arch12 zarch ++e70000002050 vpopctf VRR_VV "vector population count word" arch12 zarch ++e70000003050 vpopctg VRR_VV "vector population count double word" arch12 zarch ++e700000020e3 vfasb VRR_VVV "vector fp add short" arch12 zarch ++e700000820e3 wfasb VRR_VVV "scalar vector fp add scalar short" arch12 zarch ++e700000840e3 wfaxb VRR_VVV "scalar vector fp add scalar extended" arch12 zarch ++e700000020cb wfcsb VRR_VV "scalar vector fp compare scalar short" arch12 zarch ++e700000040cb wfcxb VRR_VV "scalar vector fp compare scalar extended" arch12 zarch ++e700000020ca wfksb VRR_VV "scalar vector fp compare and signal scalar short" arch12 zarch ++e700000040ca wfkxb VRR_VV "scalar vector fp compare and signal scalar extended" arch12 zarch + +-e700000020e8 vfcesb VRR_VVV "vector fp compare equal short" arch12 zarch vx2 +-e700001020e8 vfcesbs VRR_VVV "vector fp compare equal short" arch12 zarch vx2 +-e700000820e8 wfcesb VRR_VVV "scalar vector fp compare equal scalar short" arch12 zarch vx2 +-e700001820e8 wfcesbs VRR_VVV "scalar fp compare equal scalar short" arch12 zarch vx2 +-e700000840e8 wfcexb VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch vx2 +-e700001840e8 wfcexbs VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch vx2 ++e700000020e8 vfcesb VRR_VVV "vector fp compare equal short" arch12 zarch ++e700001020e8 vfcesbs VRR_VVV "vector fp compare equal short" arch12 zarch ++e700000820e8 wfcesb VRR_VVV "scalar vector fp compare equal scalar short" arch12 zarch ++e700001820e8 wfcesbs VRR_VVV "scalar fp compare equal scalar short" arch12 zarch ++e700000840e8 wfcexb VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch ++e700001840e8 wfcexbs VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch + +-e700000420e8 vfkesb VRR_VVV "vector fp compare and signal equal short" arch12 zarch vx2 +-e700001420e8 vfkesbs VRR_VVV "vector fp compare and signal equal short" arch12 zarch vx2 +-e700000c20e8 wfkesb VRR_VVV "scalar vector fp compare and signal equal scalar short" arch12 zarch vx2 +-e700001c20e8 wfkesbs VRR_VVV "scalar fp compare and signal equal scalar short" arch12 zarch vx2 ++e700000420e8 vfkesb VRR_VVV "vector fp compare and signal equal short" arch12 zarch ++e700001420e8 vfkesbs VRR_VVV "vector fp compare and signal equal short" arch12 zarch ++e700000c20e8 wfkesb VRR_VVV "scalar vector fp compare and signal equal scalar short" arch12 zarch ++e700001c20e8 wfkesbs VRR_VVV "scalar fp compare and signal equal scalar short" arch12 zarch + e700000430e8 vfkedb VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx + e700001430e8 vfkedbs VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx + e700000c30e8 wfkedb VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx + e700001c30e8 wfkedbs VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx +-e700000c40e8 wfkexb VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch vx2 +-e700001c40e8 wfkexbs VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch vx2 ++e700000c40e8 wfkexb VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch ++e700001c40e8 wfkexbs VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch + +-e700000020eb vfchsb VRR_VVV "vector fp compare high short" arch12 zarch vx2 +-e700001020eb vfchsbs VRR_VVV "vector fp compare high short" arch12 zarch vx2 +-e700000820eb wfchsb VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch vx2 +-e700001820eb wfchsbs VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch vx2 +-e700000840eb wfchxb VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch vx2 +-e700001840eb wfchxbs VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch vx2 ++e700000020eb vfchsb VRR_VVV "vector fp compare high short" arch12 zarch ++e700001020eb vfchsbs VRR_VVV "vector fp compare high short" arch12 zarch ++e700000820eb wfchsb VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch ++e700001820eb wfchsbs VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch ++e700000840eb wfchxb VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch ++e700001840eb wfchxbs VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch + +-e700000420eb vfkhsb VRR_VVV "vector fp compare and signal high short" arch12 zarch vx2 +-e700001420eb vfkhsbs VRR_VVV "vector fp compare and signal high short" arch12 zarch vx2 +-e700000c20eb wfkhsb VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch vx2 +-e700001c20eb wfkhsbs VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch vx2 ++e700000420eb vfkhsb VRR_VVV "vector fp compare and signal high short" arch12 zarch ++e700001420eb vfkhsbs VRR_VVV "vector fp compare and signal high short" arch12 zarch ++e700000c20eb wfkhsb VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch ++e700001c20eb wfkhsbs VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch + e700000430eb vfkhdb VRR_VVV "vector fp compare and signal high long" arch12 zarch vx + e700001430eb vfkhdbs VRR_VVV "vector fp compare and signal high long" arch12 zarch vx + e700000c30eb wfkhdb VRR_VVV "vector fp compare and signal high long" arch12 zarch vx + e700001c30eb wfkhdbs VRR_VVV "vector fp compare and signal high long" arch12 zarch vx +-e700000c40eb wfkhxb VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch vx2 +-e700001c40eb wfkhxbs VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch vx2 ++e700000c40eb wfkhxb VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch ++e700001c40eb wfkhxbs VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch + +-e700000020ea vfchesb VRR_VVV "vector fp compare high or equal short" arch12 zarch vx2 +-e700001020ea vfchesbs VRR_VVV "vector fp compare high or equal short" arch12 zarch vx2 +-e700000820ea wfchesb VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch vx2 +-e700001820ea wfchesbs VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch vx2 +-e700000840ea wfchexb VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch vx2 +-e700001840ea wfchexbs VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch vx2 ++e700000020ea vfchesb VRR_VVV "vector fp compare high or equal short" arch12 zarch ++e700001020ea vfchesbs VRR_VVV "vector fp compare high or equal short" arch12 zarch ++e700000820ea wfchesb VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch ++e700001820ea wfchesbs VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch ++e700000840ea wfchexb VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch ++e700001840ea wfchexbs VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch + +-e700000420ea vfkhesb VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch vx2 +-e700001420ea vfkhesbs VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch vx2 +-e700000c20ea wfkhesb VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch vx2 +-e700001c20ea wfkhesbs VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch vx2 ++e700000420ea vfkhesb VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch ++e700001420ea vfkhesbs VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch ++e700000c20ea wfkhesb VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch ++e700001c20ea wfkhesbs VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch + e700000430ea vfkhedb VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx + e700001430ea vfkhedbs VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx + e700000c30ea wfkhedb VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx + e700001c30ea wfkhedbs VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx +-e700000c40ea wfkhexb VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch vx2 +-e700001c40ea wfkhexbs VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch vx2 ++e700000c40ea wfkhexb VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch ++e700001c40ea wfkhexbs VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch + +-e700000020e5 vfdsb VRR_VVV "vector fp divide short" arch12 zarch vx2 +-e700000820e5 wfdsb VRR_VVV "scalar vector fp divide scalar short" arch12 zarch vx2 +-e700000840e5 wfdxb VRR_VVV "scalar vector fp divide scalar extended" arch12 zarch vx2 +-e700000020c7 vfisb VRR_VV0UU "vector load fp integer short" arch12 zarch vx2 +-e700000820c7 wfisb VRR_VV0UU8 "scalar vector load fp integer scalar short" arch12 zarch vx2 +-e700000840c7 wfixb VRR_VV0UU8 "scalar vector load fp integer scalar extended" arch12 zarch vx2 +-e700000000c4 vfll VRR_VV0UU2 "vector fp load lengthened" arch12 zarch vx2 +-e700000020c4 vflls VRR_VV "vector fp load lengthened" arch12 zarch vx2 +-e700000820c4 wflls VRR_VV "scalar vector fp load lengthened short" arch12 zarch vx2 +-e700000830c4 wflld VRR_VV "scalar vector fp load lengthened long" arch12 zarch vx2 +-e700000000c5 vflr VRR_VV0UUU "vector fp load rounded" arch12 zarch vx2 +-e700000030c5 vflrd VRR_VV0UU "vector fp load rounded long" arch12 zarch vx2 +-e700000830c5 wflrd VRR_VV0UU8 "scalar vector fp load rounded long" arch12 zarch vx2 +-e700000840c5 wflrx VRR_VV0UU8 "scalar vector fp load rounded extended" arch12 zarch vx2 +-e700000000ef vfmax VRR_VVV0UUU "vector fp maximum" arch12 zarch vx2 +-e700000020ef vfmaxsb VRR_VVV0U0 "vector fp maximum short" arch12 zarch vx2 +-e700000030ef vfmaxdb VRR_VVV0U0 "vector fp maximum long" arch12 zarch vx2 +-e700000820ef wfmaxsb VRR_VVV0U0 "scalar fp maximum scalar short" arch12 zarch vx2 +-e700000830ef wfmaxdb VRR_VVV0U0 "scalar fp maximum scalar long" arch12 zarch vx2 +-e700000840ef wfmaxxb VRR_VVV0U0 "scalar fp maximum scalar extended" arch12 zarch vx2 +-e700000000ee vfmin VRR_VVV0UUU "vector fp minimum" arch12 zarch vx2 +-e700000020ee vfminsb VRR_VVV0U0 "vector fp minimum short" arch12 zarch vx2 +-e700000030ee vfmindb VRR_VVV0U0 "vector fp minimum long" arch12 zarch vx2 +-e700000820ee wfminsb VRR_VVV0U0 "scalar fp minimum scalar short" arch12 zarch vx2 +-e700000830ee wfmindb VRR_VVV0U0 "scalar fp minimum scalar long" arch12 zarch vx2 +-e700000840ee wfminxb VRR_VVV0U0 "scalar fp minimum scalar extended" arch12 zarch vx2 +-e700000020e7 vfmsb VRR_VVV "vector fp multiply short" arch12 zarch vx2 +-e700000820e7 wfmsb VRR_VVV "scalar vector fp multiply scalar short" arch12 zarch vx2 +-e700000840e7 wfmxb VRR_VVV "scalar vector fp multiply scalar extended" arch12 zarch vx2 +-e7000200008f vfmasb VRR_VVVV "vector fp multiply and add short" arch12 zarch vx2 +-e7000208008f wfmasb VRR_VVVV "scalar vector fp multiply and add scalar short" arch12 zarch vx2 +-e7000408008f wfmaxb VRR_VVVV "scalar vector fp multiply and add scalar extended" arch12 zarch vx2 +-e7000200008e vfmssb VRR_VVVV "vector fp multiply and subtract short" arch12 zarch vx2 +-e7000208008e wfmssb VRR_VVVV "scalar vector fp multiply and subtract scalar short" arch12 zarch vx2 +-e7000408008e wfmsxb VRR_VVVV "scalar vector fp multiply and subtract scalar extended" arch12 zarch vx2 +-e7000000009f vfnma VRR_VVVU0UV "vector fp negative multiply and add" arch12 zarch vx2 +-e7000200009f vfnmasb VRR_VVVV "vector fp negative multiply and add short" arch12 zarch vx2 +-e7000208009f wfnmasb VRR_VVVV "scalar vector fp negative multiply and add scalar short" arch12 zarch vx2 +-e7000300009f vfnmadb VRR_VVVV "vector fp negative multiply and add long" arch12 zarch vx2 +-e7000308009f wfnmadb VRR_VVVV "scalar vector fp negative multiply and add scalar long" arch12 zarch vx2 +-e7000408009f wfnmaxb VRR_VVVV "scalar vector fp negative multiply and add scalar extended" arch12 zarch vx2 +-e7000000009e vfnms VRR_VVVU0UV "vector fp negative multiply and subtract" arch12 zarch vx2 +-e7000200009e vfnmssb VRR_VVVV "vector fp negative multiply and subtract short" arch12 zarch vx2 +-e7000208009e wfnmssb VRR_VVVV "scalar vector fp negative multiply and subtract scalar short" arch12 zarch vx2 +-e7000300009e vfnmsdb VRR_VVVV "vector fp negative multiply and subtract long" arch12 zarch vx2 +-e7000308009e wfnmsdb VRR_VVVV "scalar vector fp negative multiply and subtract scalar long" arch12 zarch vx2 +-e7000408009e wfnmsxb VRR_VVVV "scalar vector fp negative multiply and subtract scalar extended" arch12 zarch vx2 +-e700000020cc vfpsosb VRR_VV0U2 "vector fp perform sign operation short" arch12 zarch vx2 +-e700000820cc wfpsosb VRR_VV0U2 "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 +-e700000020cc vflcsb VRR_VV "vector fp perform sign operation short" arch12 zarch vx2 +-e700000820cc wflcsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 +-e700001020cc vflnsb VRR_VV "vector fp perform sign operation short" arch12 zarch vx2 +-e700001820cc wflnsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 +-e700002020cc vflpsb VRR_VV "vector fp perform sign operation short" arch12 zarch vx2 +-e700002820cc wflpsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 +-e700000840cc wfpsoxb VRR_VV0U2 "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 +-e700000840cc wflcxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 +-e700001840cc wflnxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 +-e700002840cc wflpxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 +-e700000020ce vfsqsb VRR_VV "vector fp square root short" arch12 zarch vx2 +-e700000820ce wfsqsb VRR_VV "scalar vector fp square root scalar short" arch12 zarch vx2 +-e700000840ce wfsqxb VRR_VV "scalar vector fp square root scalar extended" arch12 zarch vx2 +-e700000020e2 vfssb VRR_VVV "vector fp subtract short" arch12 zarch vx2 +-e700000820e2 wfssb VRR_VVV "scalar vector fp subtract scalar short" arch12 zarch vx2 +-e700000840e2 wfsxb VRR_VVV "scalar vector fp subtract scalar extended" arch12 zarch vx2 +-e7000000204a vftcisb VRI_VVU2 "vector fp test data class immediate short" arch12 zarch vx2 +-e7000008204a wftcisb VRI_VVU2 "scalar vector fp test data class immediate scalar short" arch12 zarch vx2 +-e7000008404a wftcixb VRI_VVU2 "scalar vector fp test data class immediate scalar extended" arch12 zarch vx2 ++e700000020e5 vfdsb VRR_VVV "vector fp divide short" arch12 zarch ++e700000820e5 wfdsb VRR_VVV "scalar vector fp divide scalar short" arch12 zarch ++e700000840e5 wfdxb VRR_VVV "scalar vector fp divide scalar extended" arch12 zarch ++e700000020c7 vfisb VRR_VV0UU "vector load fp integer short" arch12 zarch ++e700000820c7 wfisb VRR_VV0UU8 "scalar vector load fp integer scalar short" arch12 zarch ++e700000840c7 wfixb VRR_VV0UU8 "scalar vector load fp integer scalar extended" arch12 zarch ++e700000000c4 vfll VRR_VV0UU2 "vector fp load lengthened" arch12 zarch ++e700000020c4 vflls VRR_VV "vector fp load lengthened" arch12 zarch ++e700000820c4 wflls VRR_VV "scalar vector fp load lengthened short" arch12 zarch ++e700000830c4 wflld VRR_VV "scalar vector fp load lengthened long" arch12 zarch ++e700000000c5 vflr VRR_VV0UUU "vector fp load rounded" arch12 zarch ++e700000030c5 vflrd VRR_VV0UU "vector fp load rounded long" arch12 zarch ++e700000830c5 wflrd VRR_VV0UU8 "scalar vector fp load rounded long" arch12 zarch ++e700000840c5 wflrx VRR_VV0UU8 "scalar vector fp load rounded extended" arch12 zarch ++e700000000ef vfmax VRR_VVV0UUU "vector fp maximum" arch12 zarch ++e700000020ef vfmaxsb VRR_VVV0U0 "vector fp maximum short" arch12 zarch ++e700000030ef vfmaxdb VRR_VVV0U0 "vector fp maximum long" arch12 zarch ++e700000820ef wfmaxsb VRR_VVV0U0 "scalar fp maximum scalar short" arch12 zarch ++e700000830ef wfmaxdb VRR_VVV0U0 "scalar fp maximum scalar long" arch12 zarch ++e700000840ef wfmaxxb VRR_VVV0U0 "scalar fp maximum scalar extended" arch12 zarch ++e700000000ee vfmin VRR_VVV0UUU "vector fp minimum" arch12 zarch ++e700000020ee vfminsb VRR_VVV0U0 "vector fp minimum short" arch12 zarch ++e700000030ee vfmindb VRR_VVV0U0 "vector fp minimum long" arch12 zarch ++e700000820ee wfminsb VRR_VVV0U0 "scalar fp minimum scalar short" arch12 zarch ++e700000830ee wfmindb VRR_VVV0U0 "scalar fp minimum scalar long" arch12 zarch ++e700000840ee wfminxb VRR_VVV0U0 "scalar fp minimum scalar extended" arch12 zarch ++e700000020e7 vfmsb VRR_VVV "vector fp multiply short" arch12 zarch ++e700000820e7 wfmsb VRR_VVV "scalar vector fp multiply scalar short" arch12 zarch ++e700000840e7 wfmxb VRR_VVV "scalar vector fp multiply scalar extended" arch12 zarch ++e7000200008f vfmasb VRR_VVVV "vector fp multiply and add short" arch12 zarch ++e7000208008f wfmasb VRR_VVVV "scalar vector fp multiply and add scalar short" arch12 zarch ++e7000408008f wfmaxb VRR_VVVV "scalar vector fp multiply and add scalar extended" arch12 zarch ++e7000200008e vfmssb VRR_VVVV "vector fp multiply and subtract short" arch12 zarch ++e7000208008e wfmssb VRR_VVVV "scalar vector fp multiply and subtract scalar short" arch12 zarch ++e7000408008e wfmsxb VRR_VVVV "scalar vector fp multiply and subtract scalar extended" arch12 zarch ++e7000000009f vfnma VRR_VVVU0UV "vector fp negative multiply and add" arch12 zarch ++e7000200009f vfnmasb VRR_VVVV "vector fp negative multiply and add short" arch12 zarch ++e7000208009f wfnmasb VRR_VVVV "scalar vector fp negative multiply and add scalar short" arch12 zarch ++e7000300009f vfnmadb VRR_VVVV "vector fp negative multiply and add long" arch12 zarch ++e7000308009f wfnmadb VRR_VVVV "scalar vector fp negative multiply and add scalar long" arch12 zarch ++e7000408009f wfnmaxb VRR_VVVV "scalar vector fp negative multiply and add scalar extended" arch12 zarch ++e7000000009e vfnms VRR_VVVU0UV "vector fp negative multiply and subtract" arch12 zarch ++e7000200009e vfnmssb VRR_VVVV "vector fp negative multiply and subtract short" arch12 zarch ++e7000208009e wfnmssb VRR_VVVV "scalar vector fp negative multiply and subtract scalar short" arch12 zarch ++e7000300009e vfnmsdb VRR_VVVV "vector fp negative multiply and subtract long" arch12 zarch ++e7000308009e wfnmsdb VRR_VVVV "scalar vector fp negative multiply and subtract scalar long" arch12 zarch ++e7000408009e wfnmsxb VRR_VVVV "scalar vector fp negative multiply and subtract scalar extended" arch12 zarch ++e700000020cc vfpsosb VRR_VV0U2 "vector fp perform sign operation short" arch12 zarch ++e700000820cc wfpsosb VRR_VV0U2 "scalar vector fp perform sign operation scalar short" arch12 zarch ++e700000020cc vflcsb VRR_VV "vector fp perform sign operation short" arch12 zarch ++e700000820cc wflcsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch ++e700001020cc vflnsb VRR_VV "vector fp perform sign operation short" arch12 zarch ++e700001820cc wflnsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch ++e700002020cc vflpsb VRR_VV "vector fp perform sign operation short" arch12 zarch ++e700002820cc wflpsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch ++e700000840cc wfpsoxb VRR_VV0U2 "scalar vector fp perform sign operation scalar extended" arch12 zarch ++e700000840cc wflcxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch ++e700001840cc wflnxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch ++e700002840cc wflpxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch ++e700000020ce vfsqsb VRR_VV "vector fp square root short" arch12 zarch ++e700000820ce wfsqsb VRR_VV "scalar vector fp square root scalar short" arch12 zarch ++e700000840ce wfsqxb VRR_VV "scalar vector fp square root scalar extended" arch12 zarch ++e700000020e2 vfssb VRR_VVV "vector fp subtract short" arch12 zarch ++e700000820e2 wfssb VRR_VVV "scalar vector fp subtract scalar short" arch12 zarch ++e700000840e2 wfsxb VRR_VVV "scalar vector fp subtract scalar extended" arch12 zarch ++e7000000204a vftcisb VRI_VVU2 "vector fp test data class immediate short" arch12 zarch ++e7000008204a wftcisb VRI_VVU2 "scalar vector fp test data class immediate scalar short" arch12 zarch ++e7000008404a wftcixb VRI_VVU2 "scalar vector fp test data class immediate scalar extended" arch12 zarch + + # Miscellaneous Instruction Extensions Facility 2 + +@@ -1843,28 +1843,28 @@ e30000000039 sgh RXY_RRRD "subtract halfword from 64 bit value" arch12 zarch + + # Vector packed decimal facility + +-e60000000037 vlrlr VRS_RRDV "vector load rightmost with length" arch12 zarch vx2 +-e60000000035 vlrl VSI_URDV "vector load rightmost with immediate length" arch12 zarch vx2 +-e6000000003f vstrlr VRS_RRDV "vector store rightmost with length" arch12 zarch vx2 +-e6000000003d vstrl VSI_URDV "vector store rightmost with immediate length" arch12 zarch vx2 +-e60000000071 vap VRI_VVV0UU2 "vector add decimal" arch12 zarch vx2 +-e60000000077 vcp VRR_0VV0U "vector compare decimal" arch12 zarch vx2 +-e60000000050 vcvb VRR_RV0U "vector convert to binary 32 bit" arch12 zarch vx2 +-e60000000052 vcvbg VRR_RV0U "vector convert to binary 64 bit" arch12 zarch vx2 +-e60000000058 vcvd VRI_VR0UU "vector convert to decimal 32 bit" arch12 zarch vx2 +-e6000000005a vcvdg VRI_VR0UU "vector convert to decimal 64 bit" arch12 zarch vx2 +-e6000000007a vdp VRI_VVV0UU2 "vector divide decimal" arch12 zarch vx2 +-e60000000049 vlip VRI_V0UU2 "vector load immediate decimal" arch12 zarch vx2 +-e60000000078 vmp VRI_VVV0UU2 "vector multiply decimal" arch12 zarch vx2 +-e60000000079 vmsp VRI_VVV0UU2 "vector multiply and shift decimal" arch12 zarch vx2 +-e60000000034 vpkz VSI_URDV "vector pack zoned" arch12 zarch vx2 +-e6000000005b vpsop VRI_VVUUU2 "vector perform sign operation decimal" arch12 zarch vx2 +-e6000000007b vrp VRI_VVV0UU2 "vector remainder decimal" arch12 zarch vx2 +-e6000000007e vsdp VRI_VVV0UU2 "vector shift and divide decimal" arch12 zarch vx2 +-e60000000059 vsrp VRI_VVUUU2 "vector shift and round decimal" arch12 zarch vx2 +-e60000000073 vsp VRI_VVV0UU2 "vector subtract decimal" arch12 zarch vx2 +-e6000000005f vtp VRR_0V "vector test decimal" arch12 zarch vx2 +-e6000000003c vupkz VSI_URDV "vector unpack zoned" arch12 zarch vx2 ++e60000000037 vlrlr VRS_RRDV "vector load rightmost with length" arch12 zarch ++e60000000035 vlrl VSI_URDV "vector load rightmost with immediate length" arch12 zarch ++e6000000003f vstrlr VRS_RRDV "vector store rightmost with length" arch12 zarch ++e6000000003d vstrl VSI_URDV "vector store rightmost with immediate length" arch12 zarch ++e60000000071 vap VRI_VVV0UU2 "vector add decimal" arch12 zarch ++e60000000077 vcp VRR_0VV0U "vector compare decimal" arch12 zarch ++e60000000050 vcvb VRR_RV0U "vector convert to binary 32 bit" arch12 zarch ++e60000000052 vcvbg VRR_RV0U "vector convert to binary 64 bit" arch12 zarch ++e60000000058 vcvd VRI_VR0UU "vector convert to decimal 32 bit" arch12 zarch ++e6000000005a vcvdg VRI_VR0UU "vector convert to decimal 64 bit" arch12 zarch ++e6000000007a vdp VRI_VVV0UU2 "vector divide decimal" arch12 zarch ++e60000000049 vlip VRI_V0UU2 "vector load immediate decimal" arch12 zarch ++e60000000078 vmp VRI_VVV0UU2 "vector multiply decimal" arch12 zarch ++e60000000079 vmsp VRI_VVV0UU2 "vector multiply and shift decimal" arch12 zarch ++e60000000034 vpkz VSI_URDV "vector pack zoned" arch12 zarch ++e6000000005b vpsop VRI_VVUUU2 "vector perform sign operation decimal" arch12 zarch ++e6000000007b vrp VRI_VVV0UU2 "vector remainder decimal" arch12 zarch ++e6000000007e vsdp VRI_VVV0UU2 "vector shift and divide decimal" arch12 zarch ++e60000000059 vsrp VRI_VVUUU2 "vector shift and round decimal" arch12 zarch ++e60000000073 vsp VRI_VVV0UU2 "vector subtract decimal" arch12 zarch ++e6000000005f vtp VRR_0V "vector test decimal" arch12 zarch ++e6000000003c vupkz VSI_URDV "vector unpack zoned" arch12 zarch + + # Guarded storage facility + |