diff options
| author | dragonn | 2021-05-18 21:25:05 +0200 |
|---|---|---|
| committer | dragonn | 2021-05-18 21:26:21 +0200 |
| commit | 50d9f54833f9cb88fe3b7bfcb2ade4a77935cd6d (patch) | |
| tree | e2e2baf76d206859a9e28d162d3afc49b4c75b67 | |
| parent | 15638acb3e4a6d6e29b3f1d216c1532b76506de4 (diff) | |
| download | aur-50d9f54833f9cb88fe3b7bfcb2ade4a77935cd6d.tar.gz | |
add GCC 11 patch and set kernel arch too x86-64-v3
| -rw-r--r-- | .SRCINFO | 7 | ||||
| -rw-r--r-- | 5.8+--more-uarches-for-kernel.patch | 684 | ||||
| -rw-r--r-- | PKGBUILD | 27 | ||||
| -rwxr-xr-x | choose-gcc-optimization.sh | 139 |
4 files changed, 853 insertions, 4 deletions
@@ -1,7 +1,7 @@ pkgbase = linux-g14 pkgdesc = Linux pkgver = 5.12.4.arch1 - pkgrel = 2 + pkgrel = 4 url = https://lab.retarded.farm/zappel/asus-rog-zephyrus-g14/ arch = x86_64 license = GPL2 @@ -14,22 +14,27 @@ pkgbase = linux-g14 makedepends = xz makedepends = xmlto makedepends = git + makedepends = gcc>=11.0 options = !strip source = archlinux-linux::git+https://git.archlinux.org/linux.git?signed#tag=v5.12.4-arch1 source = config + source = choose-gcc-optimization.sh source = sys-kernel_arch-sources-g14_files_6008-HID-asus-Filter-keyboard-EC-for-old-ROG-keyboard.patch source = sys-kernel_arch-sources-g14_files-6010-acpi_unused.patch source = https://gitlab.com/asus-linux/fedora-kernel/-/archive/29f433a6b9ba268b0202ac8200cf2ce38d6071b7/fedora-kernel-29f433a6b9ba268b0202ac8200cf2ce38d6071b7.zip source = 5.12.4--Add-jack-toggle-support-for-headphones-on-Asus-ROG-Z.patch + source = 5.8+--more-uarches-for-kernel.patch::https://raw.githubusercontent.com/graysky2/kernel_gcc_patch/master/more-uarches-for-kernel-5.8%2B.patch validpgpkeys = ABAF11C65A2970B130ABE3C479BE3E4300411886 validpgpkeys = 647F28654894E3BD457199BE38DBBDC86092693E validpgpkeys = A2FF3A36AAA56654109064AB19802F8B0D70FC30 sha256sums = SKIP sha256sums = bcb8a47c2396af9a2afcd26d1200f9424d2af0fa6f6749d3c09417a919f5c60c + sha256sums = 1ac18cad2578df4a70f9346f7c6fccbb62f042a0ee0594817fdef9f2704904ee sha256sums = d9f5742fed4406396698897aa042d4d5fdbfd7c51add7483a777f9ab41901aac sha256sums = c384049787c8f0008accf9c4d053eb407b76242fe522e1aed1fe8a9c59f9d996 sha256sums = ce2a5e79ed29c701529f0aa2d854bab79d9f5cbdd173e13774f6e1f4e8ae585f sha256sums = f52aadc1ebcdc118bb50769e4f5a4c036521c09ffecba48cb34392e1a687ac0a + sha256sums = 9083b94bf9f547cceeed9fe2f37fb201e42d5b00734a86e4ea528447a59d4b9a pkgname = linux-g14 pkgdesc = The Linux kernel and modules diff --git a/5.8+--more-uarches-for-kernel.patch b/5.8+--more-uarches-for-kernel.patch new file mode 100644 index 000000000000..1868f23365be --- /dev/null +++ b/5.8+--more-uarches-for-kernel.patch @@ -0,0 +1,684 @@ +From 59db769ad69e080c512b3890e1d27d6120f4a1a4 Mon Sep 17 00:00:00 2001 +From: graysky <graysky@archlinux.us> +Date: Mon, 12 Apr 2021 07:09:27 -0400 +Subject: [PATCH] more uarches for kernel 5.8+ +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +WARNING +This patch works with all gcc versions 9.0+ and with kernel version 5.8+ and should +NOT be applied when compiling on older versions of gcc due to key name changes +of the march flags introduced with the version 4.9 release of gcc.[1] + +FEATURES +This patch adds additional CPU options to the Linux kernel accessible under: + Processor type and features ---> + Processor family ---> + +With the release of gcc 11.0, several generic 64-bit levels are offered which +are good for supported Intel or AMD CPUs: +• x86-64-v2 +• x86-64-v3 +• x86-64-v4 + +Users of glibc 2.33 and above can see which level is supported by current +hardware by running: + /lib/ld-linux-x86-64.so.2 --help | grep supported + +Alternatively, compare the flags from /proc/cpuinfo to this list.[2] + +CPU-specific microarchitectures include: +• AMD Improved K8-family +• AMD K10-family +• AMD Family 10h (Barcelona) +• AMD Family 14h (Bobcat) +• AMD Family 16h (Jaguar) +• AMD Family 15h (Bulldozer) +• AMD Family 15h (Piledriver) +• AMD Family 15h (Steamroller) +• AMD Family 15h (Excavator) +• AMD Family 17h (Zen) +• AMD Family 17h (Zen 2) +• AMD Family 19h (Zen 3)† +• Intel Silvermont low-power processors +• Intel Goldmont low-power processors (Apollo Lake and Denverton) +• Intel Goldmont Plus low-power processors (Gemini Lake) +• Intel 1st Gen Core i3/i5/i7 (Nehalem) +• Intel 1.5 Gen Core i3/i5/i7 (Westmere) +• Intel 2nd Gen Core i3/i5/i7 (Sandybridge) +• Intel 3rd Gen Core i3/i5/i7 (Ivybridge) +• Intel 4th Gen Core i3/i5/i7 (Haswell) +• Intel 5th Gen Core i3/i5/i7 (Broadwell) +• Intel 6th Gen Core i3/i5/i7 (Skylake) +• Intel 6th Gen Core i7/i9 (Skylake X) +• Intel 8th Gen Core i3/i5/i7 (Cannon Lake) +• Intel 10th Gen Core i7/i9 (Ice Lake) +• Intel Xeon (Cascade Lake) +• Intel Xeon (Cooper Lake)* +• Intel 3rd Gen 10nm++ i3/i5/i7/i9-family (Tiger Lake)* +• Intel 3rd Gen 10nm++ Xeon (Sapphire Rapids)‡ +• Intel 11th Gen i3/i5/i7/i9-family (Rocket Lake)‡ +• Intel 12th Gen i3/i5/i7/i9-family (Alder Lake)‡ + +Notes: If not otherwise noted, gcc >=9.1 is required for support. + *Requires gcc >=10.1 †Required gcc >=10.3 ‡Required gcc >=11.0 + +It also offers to compile passing the 'native' option which, "selects the CPU +to generate code for at compilation time by determining the processor type of +the compiling machine. Using -march=native enables all instruction subsets +supported by the local machine and will produce code optimized for the local +machine under the constraints of the selected instruction set."[3] + +Users of Intel CPUs should select the 'Intel-Native' option and users of AMD +CPUs should select the 'AMD-Native' option. + +MINOR NOTES RELATING TO INTEL ATOM PROCESSORS +This patch also changes -march=atom to -march=bonnell in accordance with the +gcc v4.9 changes. Upstream is using the deprecated -match=atom flags when I +believe it should use the newer -march=bonnell flag for atom processors.[4] + +It is not recommended to compile on Atom-CPUs with the 'native' option.[5] The +recommendation is to use the 'atom' option instead. + +BENEFITS +Small but real speed increases are measurable using a make endpoint comparing +a generic kernel to one built with one of the respective microarchs. + +See the following experimental evidence supporting this statement: +https://github.com/graysky2/kernel_gcc_patch + +REQUIREMENTS +linux version >=5.8 +gcc version >=9.0 + +ACKNOWLEDGMENTS +This patch builds on the seminal work by Jeroen.[6] + +REFERENCES +1. https://gcc.gnu.org/gcc-4.9/changes.html +2. https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/77566eb03bc6a326811cb7e9 +3. https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html#index-x86-Options +4. https://bugzilla.kernel.org/show_bug.cgi?id=77461 +5. https://github.com/graysky2/kernel_gcc_patch/issues/15 +6. http://www.linuxforge.net/docs/linux/linux-gcc.php +--- + arch/x86/Kconfig.cpu | 332 ++++++++++++++++++++++++++++++-- + arch/x86/Makefile | 47 ++++- + arch/x86/include/asm/vermagic.h | 66 +++++++ + 3 files changed, 428 insertions(+), 17 deletions(-) + +diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu +index 814fe0d349b0..872b9cf598e3 100644 +--- a/arch/x86/Kconfig.cpu ++++ b/arch/x86/Kconfig.cpu +@@ -157,7 +157,7 @@ config MPENTIUM4 + + + config MK6 +- bool "K6/K6-II/K6-III" ++ bool "AMD K6/K6-II/K6-III" + depends on X86_32 + help + Select this for an AMD K6-family processor. Enables use of +@@ -165,7 +165,7 @@ config MK6 + flags to GCC. + + config MK7 +- bool "Athlon/Duron/K7" ++ bool "AMD Athlon/Duron/K7" + depends on X86_32 + help + Select this for an AMD Athlon K7-family processor. Enables use of +@@ -173,12 +173,98 @@ config MK7 + flags to GCC. + + config MK8 +- bool "Opteron/Athlon64/Hammer/K8" ++ bool "AMD Opteron/Athlon64/Hammer/K8" + help + Select this for an AMD Opteron or Athlon64 Hammer-family processor. + Enables use of some extended instructions, and passes appropriate + optimization flags to GCC. + ++config MK8SSE3 ++ bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3" ++ help ++ Select this for improved AMD Opteron or Athlon64 Hammer-family processors. ++ Enables use of some extended instructions, and passes appropriate ++ optimization flags to GCC. ++ ++config MK10 ++ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10" ++ help ++ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50, ++ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor. ++ Enables use of some extended instructions, and passes appropriate ++ optimization flags to GCC. ++ ++config MBARCELONA ++ bool "AMD Barcelona" ++ help ++ Select this for AMD Family 10h Barcelona processors. ++ ++ Enables -march=barcelona ++ ++config MBOBCAT ++ bool "AMD Bobcat" ++ help ++ Select this for AMD Family 14h Bobcat processors. ++ ++ Enables -march=btver1 ++ ++config MJAGUAR ++ bool "AMD Jaguar" ++ help ++ Select this for AMD Family 16h Jaguar processors. ++ ++ Enables -march=btver2 ++ ++config MBULLDOZER ++ bool "AMD Bulldozer" ++ help ++ Select this for AMD Family 15h Bulldozer processors. ++ ++ Enables -march=bdver1 ++ ++config MPILEDRIVER ++ bool "AMD Piledriver" ++ help ++ Select this for AMD Family 15h Piledriver processors. ++ ++ Enables -march=bdver2 ++ ++config MSTEAMROLLER ++ bool "AMD Steamroller" ++ help ++ Select this for AMD Family 15h Steamroller processors. ++ ++ Enables -march=bdver3 ++ ++config MEXCAVATOR ++ bool "AMD Excavator" ++ help ++ Select this for AMD Family 15h Excavator processors. ++ ++ Enables -march=bdver4 ++ ++config MZEN ++ bool "AMD Zen" ++ help ++ Select this for AMD Family 17h Zen processors. ++ ++ Enables -march=znver1 ++ ++config MZEN2 ++ bool "AMD Zen 2" ++ help ++ Select this for AMD Family 17h Zen 2 processors. ++ ++ Enables -march=znver2 ++ ++config MZEN3 ++ bool "AMD Zen 3" ++ depends on GCC_VERSION > 100300 ++ help ++ Select this for AMD Family 19h Zen 3 processors. ++ ++ Enables -march=znver3 ++ + config MCRUSOE + bool "Crusoe" + depends on X86_32 +@@ -270,7 +356,7 @@ config MPSC + in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one. + + config MCORE2 +- bool "Core 2/newer Xeon" ++ bool "Intel Core 2" + help + + Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and +@@ -278,6 +364,8 @@ config MCORE2 + family in /proc/cpuinfo. Newer ones have 6 and older ones 15 + (not a typo) + ++ Enables -march=core2 ++ + config MATOM + bool "Intel Atom" + help +@@ -287,6 +375,182 @@ config MATOM + accordingly optimized code. Use a recent GCC with specific Atom + support in order to fully benefit from selecting this option. + ++config MNEHALEM ++ bool "Intel Nehalem" ++ select X86_P6_NOP ++ help ++ ++ Select this for 1st Gen Core processors in the Nehalem family. ++ ++ Enables -march=nehalem ++ ++config MWESTMERE ++ bool "Intel Westmere" ++ select X86_P6_NOP ++ help ++ ++ Select this for the Intel Westmere formerly Nehalem-C family. ++ ++ Enables -march=westmere ++ ++config MSILVERMONT ++ bool "Intel Silvermont" ++ select X86_P6_NOP ++ help ++ ++ Select this for the Intel Silvermont platform. ++ ++ Enables -march=silvermont ++ ++config MGOLDMONT ++ bool "Intel Goldmont" ++ select X86_P6_NOP ++ help ++ ++ Select this for the Intel Goldmont platform including Apollo Lake and Denverton. ++ ++ Enables -march=goldmont ++ ++config MGOLDMONTPLUS ++ bool "Intel Goldmont Plus" ++ select X86_P6_NOP ++ help ++ ++ Select this for the Intel Goldmont Plus platform including Gemini Lake. ++ ++ Enables -march=goldmont-plus ++ ++config MSANDYBRIDGE ++ bool "Intel Sandy Bridge" ++ select X86_P6_NOP ++ help ++ ++ Select this for 2nd Gen Core processors in the Sandy Bridge family. ++ ++ Enables -march=sandybridge ++ ++config MIVYBRIDGE ++ bool "Intel Ivy Bridge" ++ select X86_P6_NOP ++ help ++ ++ Select this for 3rd Gen Core processors in the Ivy Bridge family. ++ ++ Enables -march=ivybridge ++ ++config MHASWELL ++ bool "Intel Haswell" ++ select X86_P6_NOP ++ help ++ ++ Select this for 4th Gen Core processors in the Haswell family. ++ ++ Enables -march=haswell ++ ++config MBROADWELL ++ bool "Intel Broadwell" ++ select X86_P6_NOP ++ help ++ ++ Select this for 5th Gen Core processors in the Broadwell family. ++ ++ Enables -march=broadwell ++ ++config MSKYLAKE ++ bool "Intel Skylake" ++ select X86_P6_NOP ++ help ++ ++ Select this for 6th Gen Core processors in the Skylake family. ++ ++ Enables -march=skylake ++ ++config MSKYLAKEX ++ bool "Intel Skylake X" ++ select X86_P6_NOP ++ help ++ ++ Select this for 6th Gen Core processors in the Skylake X family. ++ ++ Enables -march=skylake-avx512 ++ ++config MCANNONLAKE ++ bool "Intel Cannon Lake" ++ select X86_P6_NOP ++ help ++ ++ Select this for 8th Gen Core processors ++ ++ Enables -march=cannonlake ++ ++config MICELAKE ++ bool "Intel Ice Lake" ++ select X86_P6_NOP ++ help ++ ++ Select this for 10th Gen Core processors in the Ice Lake family. ++ ++ Enables -march=icelake-client ++ ++config MCASCADELAKE ++ bool "Intel Cascade Lake" ++ select X86_P6_NOP ++ help ++ ++ Select this for Xeon processors in the Cascade Lake family. ++ ++ Enables -march=cascadelake ++ ++config MCOOPERLAKE ++ bool "Intel Cooper Lake" ++ depends on GCC_VERSION > 100100 ++ select X86_P6_NOP ++ help ++ ++ Select this for Xeon processors in the Cooper Lake family. ++ ++ Enables -march=cooperlake ++ ++config MTIGERLAKE ++ bool "Intel Tiger Lake" ++ depends on GCC_VERSION > 100100 ++ select X86_P6_NOP ++ help ++ ++ Select this for third-generation 10 nm process processors in the Tiger Lake family. ++ ++ Enables -march=tigerlake ++ ++config MSAPPHIRERAPIDS ++ bool "Intel Sapphire Rapids" ++ depends on GCC_VERSION > 110000 ++ select X86_P6_NOP ++ help ++ ++ Select this for third-generation 10 nm process processors in the Sapphire Rapids family. ++ ++ Enables -march=sapphirerapids ++ ++config MROCKETLAKE ++ bool "Intel Rocket Lake" ++ depends on GCC_VERSION > 110000 ++ select X86_P6_NOP ++ help ++ ++ Select this for eleventh-generation processors in the Rocket Lake family. ++ ++ Enables -march=rocketlake ++ ++config MALDERLAKE ++ bool "Intel Alder Lake" ++ depends on GCC_VERSION > 110000 ++ select X86_P6_NOP ++ help ++ ++ Select this for twelfth-generation processors in the Alder Lake family. ++ ++ Enables -march=alderlake ++ + config GENERIC_CPU + bool "Generic-x86-64" + depends on X86_64 +@@ -294,6 +558,50 @@ config GENERIC_CPU + Generic x86-64 CPU. + Run equally well on all x86-64 CPUs. + ++config GENERIC_CPU2 ++ bool "Generic-x86-64-v2" ++ depends on GCC_VERSION > 110000 ++ depends on X86_64 ++ help ++ Generic x86-64 CPU. ++ Run equally well on all x86-64 CPUs with min support of x86-64-v2. ++ ++config GENERIC_CPU3 ++ bool "Generic-x86-64-v3" ++ depends on GCC_VERSION > 110000 ++ depends on X86_64 ++ help ++ Generic x86-64-v3 CPU with v3 instructions. ++ Run equally well on all x86-64 CPUs with min support of x86-64-v3. ++ ++config GENERIC_CPU4 ++ bool "Generic-x86-64-v4" ++ depends on GCC_VERSION > 110000 ++ depends on X86_64 ++ help ++ Generic x86-64 CPU with v4 instructions. ++ Run equally well on all x86-64 CPUs with min support of x86-64-v4. ++ ++config MNATIVE_INTEL ++ bool "Intel-Native optimizations autodetected by GCC" ++ help ++ ++ GCC 4.2 and above support -march=native, which automatically detects ++ the optimum settings to use based on your processor. Do NOT use this ++ for AMD CPUs. Intel Only! ++ ++ Enables -march=native ++ ++config MNATIVE_AMD ++ bool "AMD-Native optimizations autodetected by GCC" ++ help ++ ++ GCC 4.2 and above support -march=native, which automatically detects ++ the optimum settings to use based on your processor. Do NOT use this ++ for Intel CPUs. AMD Only! ++ ++ Enables -march=native ++ + endchoice + + config X86_GENERIC +@@ -318,7 +626,7 @@ config X86_INTERNODE_CACHE_SHIFT + config X86_L1_CACHE_SHIFT + int + default "7" if MPENTIUM4 || MPSC +- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU ++ default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD || X86_GENERIC || GENERIC_CPU || GENERIC_CPU2 || GENERIC_CPU3 || GENERIC_CPU4 + default "4" if MELAN || M486SX || M486 || MGEODEGX1 + default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX + +@@ -336,11 +644,11 @@ config X86_ALIGNMENT_16 + + config X86_INTEL_USERCOPY + def_bool y +- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 ++ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL + + config X86_USE_PPRO_CHECKSUM + def_bool y +- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM ++ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD + + config X86_USE_3DNOW + def_bool y +@@ -360,26 +668,26 @@ config X86_USE_3DNOW + config X86_P6_NOP + def_bool y + depends on X86_64 +- depends on (MCORE2 || MPENTIUM4 || MPSC) ++ depends on (MCORE2 || MPENTIUM4 || MPSC || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL) + + config X86_TSC + def_bool y +- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64 ++ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD) || X86_64 + + config X86_CMPXCHG64 + def_bool y +- depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586TSC || M586MMX || MATOM || MGEODE_LX || MGEODEGX1 || MK6 || MK7 || MK8 ++ depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586TSC || M586MMX || MATOM || MGEODE_LX || MGEODEGX1 || MK6 || MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD + + # this should be set for all -march=.. options where the compiler + # generates cmov. + config X86_CMOV + def_bool y +- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX) ++ depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD) + + config X86_MINIMUM_CPU_FAMILY + int + default "64" if X86_64 +- default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MCRUSOE || MCORE2 || MK7 || MK8) ++ default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MCRUSOE || MCORE2 || MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD) + default "5" if X86_32 && X86_CMPXCHG64 + default "4" + +diff --git a/arch/x86/Makefile b/arch/x86/Makefile +index 9a85eae37b17..facf9a278fe3 100644 +--- a/arch/x86/Makefile ++++ b/arch/x86/Makefile +@@ -113,11 +113,48 @@ else + # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu) + cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8) + cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona) +- +- cflags-$(CONFIG_MCORE2) += \ +- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic)) +- cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \ +- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic)) ++ cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3) ++ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10) ++ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona) ++ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1) ++ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2) ++ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1) ++ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2) ++ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-mno-tbm) ++ cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3) ++ cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-mno-tbm) ++ cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4) ++ cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-mno-tbm) ++ cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1) ++ cflags-$(CONFIG_MZEN2) += $(call cc-option,-march=znver2) ++ cflags-$(CONFIG_MZEN3) += $(call cc-option,-march=znver3) ++ ++ cflags-$(CONFIG_MNATIVE_INTEL) += $(call cc-option,-march=native) ++ cflags-$(CONFIG_MNATIVE_AMD) += $(call cc-option,-march=native) ++ cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell) ++ cflags-$(CONFIG_MCORE2) += $(call cc-option,-march=core2) ++ cflags-$(CONFIG_MNEHALEM) += $(call cc-option,-march=nehalem) ++ cflags-$(CONFIG_MWESTMERE) += $(call cc-option,-march=westmere) ++ cflags-$(CONFIG_MSILVERMONT) += $(call cc-option,-march=silvermont) ++ cflags-$(CONFIG_MGOLDMONT) += $(call cc-option,-march=goldmont) ++ cflags-$(CONFIG_MGOLDMONTPLUS) += $(call cc-option,-march=goldmont-plus) ++ cflags-$(CONFIG_MSANDYBRIDGE) += $(call cc-option,-march=sandybridge) ++ cflags-$(CONFIG_MIVYBRIDGE) += $(call cc-option,-march=ivybridge) ++ cflags-$(CONFIG_MHASWELL) += $(call cc-option,-march=haswell) ++ cflags-$(CONFIG_MBROADWELL) += $(call cc-option,-march=broadwell) ++ cflags-$(CONFIG_MSKYLAKE) += $(call cc-option,-march=skylake) ++ cflags-$(CONFIG_MSKYLAKEX) += $(call cc-option,-march=skylake-avx512) ++ cflags-$(CONFIG_MCANNONLAKE) += $(call cc-option,-march=cannonlake) ++ cflags-$(CONFIG_MICELAKE) += $(call cc-option,-march=icelake-client) ++ cflags-$(CONFIG_MCASCADELAKE) += $(call cc-option,-march=cascadelake) ++ cflags-$(CONFIG_MCOOPERLAKE) += $(call cc-option,-march=cooperlake) ++ cflags-$(CONFIG_MTIGERLAKE) += $(call cc-option,-march=tigerlake) ++ cflags-$(CONFIG_MSAPPHIRERAPIDS) += $(call cc-option,-march=sapphirerapids) ++ cflags-$(CONFIG_MROCKETLAKE) += $(call cc-option,-march=rocketlake) ++ cflags-$(CONFIG_MALDERLAKE) += $(call cc-option,-march=alderlake) ++ cflags-$(CONFIG_GENERIC_CPU2) += $(call cc-option,-march=x86-64-v2) ++ cflags-$(CONFIG_GENERIC_CPU3) += $(call cc-option,-march=x86-64-v3) ++ cflags-$(CONFIG_GENERIC_CPU4) += $(call cc-option,-march=x86-64-v4) + cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic) + KBUILD_CFLAGS += $(cflags-y) + +diff --git a/arch/x86/include/asm/vermagic.h b/arch/x86/include/asm/vermagic.h +index 75884d2cdec3..4e6a08d4c7e5 100644 +--- a/arch/x86/include/asm/vermagic.h ++++ b/arch/x86/include/asm/vermagic.h +@@ -17,6 +17,48 @@ + #define MODULE_PROC_FAMILY "586MMX " + #elif defined CONFIG_MCORE2 + #define MODULE_PROC_FAMILY "CORE2 " ++#elif defined CONFIG_MNATIVE_INTEL ++#define MODULE_PROC_FAMILY "NATIVE_INTEL " ++#elif defined CONFIG_MNATIVE_AMD ++#define MODULE_PROC_FAMILY "NATIVE_AMD " ++#elif defined CONFIG_MNEHALEM ++#define MODULE_PROC_FAMILY "NEHALEM " ++#elif defined CONFIG_MWESTMERE ++#define MODULE_PROC_FAMILY "WESTMERE " ++#elif defined CONFIG_MSILVERMONT ++#define MODULE_PROC_FAMILY "SILVERMONT " ++#elif defined CONFIG_MGOLDMONT ++#define MODULE_PROC_FAMILY "GOLDMONT " ++#elif defined CONFIG_MGOLDMONTPLUS ++#define MODULE_PROC_FAMILY "GOLDMONTPLUS " ++#elif defined CONFIG_MSANDYBRIDGE ++#define MODULE_PROC_FAMILY "SANDYBRIDGE " ++#elif defined CONFIG_MIVYBRIDGE ++#define MODULE_PROC_FAMILY "IVYBRIDGE " ++#elif defined CONFIG_MHASWELL ++#define MODULE_PROC_FAMILY "HASWELL " ++#elif defined CONFIG_MBROADWELL ++#define MODULE_PROC_FAMILY "BROADWELL " ++#elif defined CONFIG_MSKYLAKE ++#define MODULE_PROC_FAMILY "SKYLAKE " ++#elif defined CONFIG_MSKYLAKEX ++#define MODULE_PROC_FAMILY "SKYLAKEX " ++#elif defined CONFIG_MCANNONLAKE ++#define MODULE_PROC_FAMILY "CANNONLAKE " ++#elif defined CONFIG_MICELAKE ++#define MODULE_PROC_FAMILY "ICELAKE " ++#elif defined CONFIG_MCASCADELAKE ++#define MODULE_PROC_FAMILY "CASCADELAKE " ++#elif defined CONFIG_MCOOPERLAKE ++#define MODULE_PROC_FAMILY "COOPERLAKE " ++#elif defined CONFIG_MTIGERLAKE ++#define MODULE_PROC_FAMILY "TIGERLAKE " ++#elif defined CONFIG_MSAPPHIRERAPIDS ++#define MODULE_PROC_FAMILY "SAPPHIRERAPIDS " ++#elif defined CONFIG_ROCKETLAKE ++#define MODULE_PROC_FAMILY "ROCKETLAKE " ++#elif defined CONFIG_MALDERLAKE ++#define MODULE_PROC_FAMILY "ALDERLAKE " + #elif defined CONFIG_MATOM + #define MODULE_PROC_FAMILY "ATOM " + #elif defined CONFIG_M686 +@@ -35,6 +77,30 @@ + #define MODULE_PROC_FAMILY "K7 " + #elif defined CONFIG_MK8 + #define MODULE_PROC_FAMILY "K8 " ++#elif defined CONFIG_MK8SSE3 ++#define MODULE_PROC_FAMILY "K8SSE3 " ++#elif defined CONFIG_MK10 ++#define MODULE_PROC_FAMILY "K10 " ++#elif defined CONFIG_MBARCELONA ++#define MODULE_PROC_FAMILY "BARCELONA " ++#elif defined CONFIG_MBOBCAT ++#define MODULE_PROC_FAMILY "BOBCAT " ++#elif defined CONFIG_MBULLDOZER ++#define MODULE_PROC_FAMILY "BULLDOZER " ++#elif defined CONFIG_MPILEDRIVER ++#define MODULE_PROC_FAMILY "PILEDRIVER " ++#elif defined CONFIG_MSTEAMROLLER ++#define MODULE_PROC_FAMILY "STEAMROLLER " ++#elif defined CONFIG_MJAGUAR ++#define MODULE_PROC_FAMILY "JAGUAR " ++#elif defined CONFIG_MEXCAVATOR ++#define MODULE_PROC_FAMILY "EXCAVATOR " ++#elif defined CONFIG_MZEN ++#define MODULE_PROC_FAMILY "ZEN " ++#elif defined CONFIG_MZEN2 ++#define MODULE_PROC_FAMILY "ZEN2 " ++#elif defined CONFIG_MZEN3 ++#define MODULE_PROC_FAMILY "ZEN3 " + #elif defined CONFIG_MELAN + #define MODULE_PROC_FAMILY "ELAN " + #elif defined CONFIG_MCRUSOE +-- +2.31.1 + @@ -2,7 +2,7 @@ pkgbase=linux-g14 pkgver=5.12.4.arch1 -pkgrel=2 +pkgrel=4 pkgdesc='Linux' _srctag=v${pkgver%.*}-${pkgver##*.} url="https://lab.retarded.farm/zappel/asus-rog-zephyrus-g14/" @@ -12,6 +12,7 @@ makedepends=( bc kmod libelf pahole cpio tar xz xmlto git + "gcc>=11.0" ) options=('!strip') _srcname=archlinux-linux @@ -19,10 +20,12 @@ _fedora_kernel_commit_id=29f433a6b9ba268b0202ac8200cf2ce38d6071b7 source=( "$_srcname::git+https://git.archlinux.org/linux.git?signed#tag=$_srctag" config # the main kernel config file + "choose-gcc-optimization.sh" "sys-kernel_arch-sources-g14_files_6008-HID-asus-Filter-keyboard-EC-for-old-ROG-keyboard.patch" "sys-kernel_arch-sources-g14_files-6010-acpi_unused.patch" "https://gitlab.com/asus-linux/fedora-kernel/-/archive/$_fedora_kernel_commit_id/fedora-kernel-$_fedora_kernel_commit_id.zip" "5.12.4--Add-jack-toggle-support-for-headphones-on-Asus-ROG-Z.patch" + "5.8+--more-uarches-for-kernel.patch"::"https://raw.githubusercontent.com/graysky2/kernel_gcc_patch/master/more-uarches-for-kernel-5.8%2B.patch" ) validpgpkeys=( 'ABAF11C65A2970B130ABE3C479BE3E4300411886' # Linus Torvalds @@ -32,10 +35,24 @@ validpgpkeys=( sha256sums=('SKIP' 'bcb8a47c2396af9a2afcd26d1200f9424d2af0fa6f6749d3c09417a919f5c60c' + '1ac18cad2578df4a70f9346f7c6fccbb62f042a0ee0594817fdef9f2704904ee' 'd9f5742fed4406396698897aa042d4d5fdbfd7c51add7483a777f9ab41901aac' 'c384049787c8f0008accf9c4d053eb407b76242fe522e1aed1fe8a9c59f9d996' 'ce2a5e79ed29c701529f0aa2d854bab79d9f5cbdd173e13774f6e1f4e8ae585f' - 'f52aadc1ebcdc118bb50769e4f5a4c036521c09ffecba48cb34392e1a687ac0a') + 'f52aadc1ebcdc118bb50769e4f5a4c036521c09ffecba48cb34392e1a687ac0a' + '9083b94bf9f547cceeed9fe2f37fb201e42d5b00734a86e4ea528447a59d4b9a') + +# notable microarch levels: +# +# 14, Zen2 +# 15, Zen3 +# 38, Skylake (Comet Lake laptops) +# 93, x86-64-v3 (package default) +# 98, Intel Native +# 99, AMD Native +if [ -z ${_microarchitecture+x} ]; then + _microarchitecture=93 +fi _fedora_kernel_patch_skip_list=( # fedora kernel patches to skip @@ -71,7 +88,7 @@ prepare() { echo "Setting version..." scripts/setlocalversion --save-scmversion - echo "-$pkgrel" > localversion.10-pkgrel + echo "-$pkgrel" > localversion.99-pkgrel echo "${pkgbase#linux}" > localversion.20-pkgname local src @@ -113,6 +130,10 @@ prepare() { echo "Setting config..." cp ../config .config + + # let user choose microarchitecture optimization in GCC + sh ${srcdir}/choose-gcc-optimization.sh $_microarchitecture + make olddefconfig make -s kernelrelease > version diff --git a/choose-gcc-optimization.sh b/choose-gcc-optimization.sh new file mode 100755 index 000000000000..f10eec54b81d --- /dev/null +++ b/choose-gcc-optimization.sh @@ -0,0 +1,139 @@ +#!/usr/bin/env bash + +. /usr/share/makepkg/util/message.sh +colorize + +Detect_CPU=$(gcc -c -Q -march=native --help=target | grep march | awk '{print $2}' | head -1) + +msg "Detected CPU architecture: $Detect_CPU" + +cat << EOF + + Available CPU microarchitectures: + + 1) AMD K6/K6-II/K6-III + 2) AMD Athlon/Duron/K7 + 3) AMD Opteron/Athlon64/Hammer/K8 + 4) AMD Opteron/Athlon64/Hammer/K8 with SSE3 + 5) AMD 61xx/7x50/PhenomX3/X4/II/K10 + 6) AMD Family 10h (Barcelona) + 7) AMD Family 14h (Bobcat) + 8) AMD Family 16h (Jaguar) + 9) AMD Family 15h (Bulldozer) + 10) AMD Family 15h (Piledriver) + 11) AMD Family 15h (Steamroller) + 12) AMD Family 15h (Excavator) + 13) AMD Family 17h (Zen) + 14) AMD Family 17h (Zen 2) + 15) AMD Family 19h Zen 3 processors (Zen 3) + 16) Transmeta Crusoe + 17) Transmeta Efficeon + 18) IDT Winchip C6 + 19) Winchip-2/Winchip-2A/Winchip-3 + 20) AMD Elan + 21) Geode GX1 (Cyrix MediaGX) + 22) AMD Geode GX and LX + 23) Cyrix III or C3 + 24) VIA C3 "Nehemiah" + 25) VIA C7 + 26) Intel Pentium 4, Pentium D and older Nocona/Dempsey Xeon CPUs with Intel 64bit + 27) Intel Atom + 28) Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx) + 29) Intel 1st Gen Core i3/i5/i7-family (Nehalem) + 30) Intel 1.5 Gen Core i3/i5/i7-family (Westmere) + 31) Intel Silvermont + 32) Intel Goldmont (Apollo Lake and Denverton) + 33) Intel Goldmont Plus (Gemini Lake) + 34) Intel 2nd Gen Core i3/i5/i7-family (Sandybridge) + 35) Intel 3rd Gen Core i3/i5/i7-family (Ivybridge) + 36) Intel 4th Gen Core i3/i5/i7-family (Haswell) + 37) Intel 5th Gen Core i3/i5/i7-family (Broadwell) + 38) Intel 6th Gen Core i3/i5/i7-family (Skylake) + 39) Intel 6th Gen Core i7/i9-family (Skylake X) + 40) Intel 8th Gen Core i3/i5/i7-family (Cannon Lake) + 41) Intel 8th Gen Core i7/i9-family (Ice Lake) + 42) Xeon processors in the Cascade Lake family + 43) Intel Xeon (Cooper Lake) + 44) Intel 3rd Gen 10nm++ i3/i5/i7/i9-family (Tiger Lake) + 45) Intel Sapphire Rapids + 46) Intel Rocket Lake + 47) Intel Alder Lake + + 92) Generic-x86-64-v2 (Nehalem and newer) + 93) Generic-x86-64-v3 (Haswell and newer) + 94) Generic-x86-64-v4 (AVX512 CPUs) + + 98) Intel-Native optimizations autodetected by GCC + 99) AMD-Native optimizations autodetected by GCC + + 0) Generic (default) + +EOF + +sleep 1 +answer=$1 + +case $answer in + 1) Microarchitecture=CONFIG_MK6 ;; + 2) Microarchitecture=CONFIG_MK7 ;; + 3) Microarchitecture=CONFIG_MK8 ;; + 4) Microarchitecture=CONFIG_MK8SSE3 ;; + 5) Microarchitecture=CONFIG_MK10 ;; + 6) Microarchitecture=CONFIG_MBARCELONA ;; + 7) Microarchitecture=CONFIG_MBOBCAT ;; + 8) Microarchitecture=CONFIG_MJAGUAR ;; + 9) Microarchitecture=CONFIG_MBULLDOZER ;; + 10) Microarchitecture=CONFIG_MPILEDRIVER ;; + 11) Microarchitecture=CONFIG_MSTEAMROLLER ;; + 12) Microarchitecture=CONFIG_MEXCAVATOR ;; + 13) Microarchitecture=CONFIG_MZEN ;; + 14) Microarchitecture=CONFIG_MZEN2 ;; + 15) Microarchitecture=CONFIG_MZEN3 ;; + 16) Microarchitecture=CONFIG_MCRUSOE ;; + 17) Microarchitecture=CONFIG_MEFFICEON ;; + 18) Microarchitecture=CONFIG_MWINCHIPC6 ;; + 19) Microarchitecture=CONFIG_MWINCHIP3D ;; + 20) Microarchitecture=CONFIG_MELAN ;; + 21) Microarchitecture=CONFIG_MGEODEGX1 ;; + 22) Microarchitecture=CONFIG_MGEODE_LX ;; + 23) Microarchitecture=CONFIG_MCYRIXIII ;; + 24) Microarchitecture=CONFIG_MVIAC3_2 ;; + 25) Microarchitecture=CONFIG_MVIAC7 ;; + 26) Microarchitecture=CONFIG_MPSC ;; + 27) Microarchitecture=CONFIG_MATOM ;; + 28) Microarchitecture=CONFIG_MCORE2 ;; + 29) Microarchitecture=CONFIG_MNEHALEM ;; + 30) Microarchitecture=CONFIG_MWESTMERE ;; + 31) Microarchitecture=CONFIG_MSILVERMONT ;; + 32) Microarchitecture=CONFIG_MGOLDMONT ;; + 33) Microarchitecture=CONFIG_MGOLDMONTPLUS ;; + 34) Microarchitecture=CONFIG_MSANDYBRIDGE ;; + 35) Microarchitecture=CONFIG_MIVYBRIDGE ;; + 36) Microarchitecture=CONFIG_MHASWELL ;; + 37) Microarchitecture=CONFIG_MBROADWELL ;; + 38) Microarchitecture=CONFIG_MSKYLAKE ;; + 39) Microarchitecture=CONFIG_MSKYLAKEX ;; + 40) Microarchitecture=CONFIG_MCANNONLAKE ;; + 41) Microarchitecture=CONFIG_MICELAKE ;; + 42) Microarchitecture=CONFIG_MCASCADELAKE ;; + 43) Microarchitecture=CONFIG_MCOOPERLAKE ;; + 44) Microarchitecture=CONFIG_MTIGERLAKE ;; + 45) Microarchitecture=CONFIG_MSAPPHIRERAPIDS ;; + 46) Microarchitecture=CONFIG_MROCKETLAKE ;; + 47) Microarchitecture=CONFIG_MALDERLAKE ;; + 92) Microarchitecture=CONFIG_GENERIC_CPU2 ;; + 93) Microarchitecture=CONFIG_GENERIC_CPU3 ;; + 94) Microarchitecture=CONFIG_GENERIC_CPU4 ;; + 98) Microarchitecture=CONFIG_MNATIVE_INTEL ;; + 99) Microarchitecture=CONFIG_MNATIVE_AMD ;; + *) default=CONFIG_GENERIC_CPU ;; +esac + +warning "According to PKGBUILD variable _microarchitecture, your choice is $answer" +msg "Building this package for microarchitecture: $Microarchitecture$default" +sleep 5 + +sed -e 's|^CONFIG_GENERIC_CPU=y|# CONFIG_GENERIC_CPU is not set|g' -i .config +sed -e "s|^# $Microarchitecture is not set|$Microarchitecture=y|g" -i .config + +echo |