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authorarchdevlab2024-08-15 01:11:25 -0400
committerarchdevlab2024-08-15 01:11:25 -0400
commit876812aa42f55ecc1405ccdd728e7a371338e6ca (patch)
tree6dfb59657752235e1a629789b3cc2afd730a2391
parent782e6e9866c310f5a1005837296f26c11c65b6bb (diff)
downloadaur-876812aa42f55ecc1405ccdd728e7a371338e6ca.tar.gz
remove some bad patches
-rw-r--r--0001-cpufreq-intel_pstate-Update-Arrow-Lake-EPPs.patch28
-rw-r--r--0001-drm-i915-display-correct-dual-pps-handling-for-MTL_P.patch57
2 files changed, 0 insertions, 85 deletions
diff --git a/0001-cpufreq-intel_pstate-Update-Arrow-Lake-EPPs.patch b/0001-cpufreq-intel_pstate-Update-Arrow-Lake-EPPs.patch
deleted file mode 100644
index 22b808ed3c32..000000000000
--- a/0001-cpufreq-intel_pstate-Update-Arrow-Lake-EPPs.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 1b9f883484537db7cdfead69c0c45274d5ed36c5 Mon Sep 17 00:00:00 2001
-From: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
-Date: Thu, 6 Jun 2024 11:27:48 -0700
-Subject: [PATCH] cpufreq: intel_pstate: Update Arrow Lake EPPs
-
-Use the same default EPPs as Meteor Lake generation.
-
-Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
----
- drivers/cpufreq/intel_pstate.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
-index c84e2d448..6cb5943f3 100644
---- a/drivers/cpufreq/intel_pstate.c
-+++ b/drivers/cpufreq/intel_pstate.c
-@@ -3394,6 +3394,8 @@ static const struct x86_cpu_id intel_epp_default[] = {
- X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
- 179, 64, 16)),
-+ X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
-+ 179, 64, 16)),
- {}
- };
-
---
-2.46.0
-
diff --git a/0001-drm-i915-display-correct-dual-pps-handling-for-MTL_P.patch b/0001-drm-i915-display-correct-dual-pps-handling-for-MTL_P.patch
deleted file mode 100644
index 82175755e036..000000000000
--- a/0001-drm-i915-display-correct-dual-pps-handling-for-MTL_P.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From bf77393c27cb9ea6abba24a2c9057ffe80566ed0 Mon Sep 17 00:00:00 2001
-From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
-Date: Thu, 1 Aug 2024 16:41:41 +0530
-Subject: [PATCH] drm/i915/display: correct dual pps handling for MTL_PCH+
-
-On the PCH side the second PPS was introduced in ICP+.Add condition
-On MTL_PCH and greater platform also having the second PPS.
-
-Note that DG1/2 south block only has the single PPS, so need
-to exclude the fake DG1/2 PCHs
-
-Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11488
-Fixes: 93cbc1accbce ("drm/i915/mtl: Add fake PCH for Meteor Lake")
-Cc: <stable@vger.kernel.org> # v6.9+
-Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Link: https://patchwork.freedesktop.org/patch/msgid/20240801111141.574854-1-dnyaneshwar.bhadane@intel.com
-(cherry picked from commit da1878b61c8d480c361ba6a39ce8a31c80b65826)
-Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
-Cherry-picked-for: https://gitlab.archlinux.org/archlinux/packaging/packages/linux/-/issues/72
----
- drivers/gpu/drm/i915/display/intel_backlight.c | 3 +++
- drivers/gpu/drm/i915/display/intel_pps.c | 3 +++
- 2 files changed, 6 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c b/drivers/gpu/drm/i915/display/intel_backlight.c
-index 071668bfe..6c3333136 100644
---- a/drivers/gpu/drm/i915/display/intel_backlight.c
-+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
-@@ -1449,6 +1449,9 @@ bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
-
- static int cnp_num_backlight_controllers(struct drm_i915_private *i915)
- {
-+ if (INTEL_PCH_TYPE(i915) >= PCH_MTL)
-+ return 2;
-+
- if (INTEL_PCH_TYPE(i915) >= PCH_DG1)
- return 1;
-
-diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
-index 0ccbf9a85..eca07436d 100644
---- a/drivers/gpu/drm/i915/display/intel_pps.c
-+++ b/drivers/gpu/drm/i915/display/intel_pps.c
-@@ -351,6 +351,9 @@ static int intel_num_pps(struct drm_i915_private *i915)
- if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
- return 2;
-
-+ if (INTEL_PCH_TYPE(i915) >= PCH_MTL)
-+ return 2;
-+
- if (INTEL_PCH_TYPE(i915) >= PCH_DG1)
- return 1;
-
---
-2.46.0
-