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authorSuperBo2017-04-14 10:55:04 +0700
committerSuperBo2017-04-14 10:55:04 +0700
commit206b410774e218ee71e81f5423e7dd5555bb49ac (patch)
tree7bdcfad091050f1ba8ba90cb2f215a7c72a44de9
parentb25e4971f2cf9cecd64f31f6cb2e4e78790f2f35 (diff)
downloadaur-206b410774e218ee71e81f5423e7dd5555bb49ac.tar.gz
Update to 4.9 LTS branch
-rw-r--r--.SRCINFO45
-rw-r--r--0001-sdhci-revert.patch25
-rw-r--r--0002-surface-wifi.patch136
-rw-r--r--0002-surface4-type-cover.patch370
-rw-r--r--0003-add-ipts.patch5933
-rw-r--r--0003-surface-cover.patch119
-rw-r--r--0004-i2c-hid-fix.patch43
-rw-r--r--0004-surface-pro4-button.patch80
-rw-r--r--0005-HID-multitouch-Add-MT_QUIRK_NOT_SEEN_MEANS_UP.patch42
-rw-r--r--0006-HID-multitouch-Ignore-invalid-reports.patch38
-rw-r--r--90-linux.hook (renamed from 99-linux.hook)0
-rw-r--r--PKGBUILD74
-rw-r--r--config1235
-rw-r--r--config.x86_641195
-rw-r--r--linux-lts.install4
-rw-r--r--linux-lts.preset2
16 files changed, 7928 insertions, 1413 deletions
diff --git a/.SRCINFO b/.SRCINFO
index b4ac5e36c29..e14d7b176b0 100644
--- a/.SRCINFO
+++ b/.SRCINFO
@@ -1,5 +1,5 @@
pkgbase = linux-lts-surface4
- pkgver = 4.4.51
+ pkgver = 4.9.20
pkgrel = 1
url = https://www.kernel.org/
arch = i686
@@ -10,39 +10,34 @@ pkgbase = linux-lts-surface4
makedepends = kmod
makedepends = inetutils
makedepends = bc
+ makedepends = libelf
options = !strip
- source = https://www.kernel.org/pub/linux/kernel/v4.x/linux-4.4.tar.xz
- source = https://www.kernel.org/pub/linux/kernel/v4.x/linux-4.4.tar.sign
- source = https://www.kernel.org/pub/linux/kernel/v4.x/patch-4.4.51.xz
- source = https://www.kernel.org/pub/linux/kernel/v4.x/patch-4.4.51.sign
+ source = https://www.kernel.org/pub/linux/kernel/v4.x/linux-4.9.tar.xz
+ source = https://www.kernel.org/pub/linux/kernel/v4.x/linux-4.9.tar.sign
+ source = https://www.kernel.org/pub/linux/kernel/v4.x/patch-4.9.20.xz
+ source = https://www.kernel.org/pub/linux/kernel/v4.x/patch-4.9.20.sign
source = config
source = config.x86_64
- source = 99-linux.hook
+ source = 90-linux.hook
source = linux-lts.preset
source = change-default-console-loglevel.patch
- source = 0001-sdhci-revert.patch
- source = 0002-surface-wifi.patch
- source = 0003-surface-cover.patch
- source = 0004-surface-pro4-button.patch
- source = 0005-HID-multitouch-Add-MT_QUIRK_NOT_SEEN_MEANS_UP.patch
- source = 0006-HID-multitouch-Ignore-invalid-reports.patch
+ source = 0002-surface4-type-cover.patch
+ source = 0003-add-ipts.patch
+ source = 0004-i2c-hid-fix.patch
validpgpkeys = ABAF11C65A2970B130ABE3C479BE3E4300411886
validpgpkeys = 647F28654894E3BD457199BE38DBBDC86092693E
- sha256sums = 401d7c8fef594999a460d10c72c5a94e9c2e1022f16795ec51746b0d165418b2
+ sha256sums = 029098dcffab74875e086ae970e3828456838da6e0ba22ce3f64ef764f3d7f1a
sha256sums = SKIP
- sha256sums = dded5f71d8533a38e8aafad224e0fe5f7d3a4eed1cfc1a79c321581e148821e8
+ sha256sums = fb856acd9195e7d83ef9971ec7be55eca0d6fdf0fbfbe9a8f3bb04590d44b51f
sha256sums = SKIP
- sha256sums = e8d200b125b4391020c2bc1f43bf8f3a372f0bbdaf9bad71b31574edab7f908f
- sha256sums = 236fc805c543cb774785f630bf37c7fdc2ff7c9904bb240ff70e0b7213058de5
+ sha256sums = 53f57faf59621f1db6d97ef5d2e5141ab47278c34ae0308ca7196ad4021149a4
+ sha256sums = 93f63b05fb6792c16ffda86ce99ab488223347a4a46ea61f9a28523a0289e357
sha256sums = 834bd254b56ab71d73f59b3221f056c72f559553c04718e350ab2a3e2991afe0
- sha256sums = 9e9e7ee3476e55e68390eda7e983fa18d44e76db5521f023fd2b388b1150bc40
+ sha256sums = 1f036f7464da54ae510630f0edb69faa115287f86d9f17641197ffda8cfd49e0
sha256sums = 1256b241cd477b265a3c2d64bdc19ffe3c9bbcee82ea3994c590c2c76e767d99
- sha256sums = 5313df7cb5b4d005422bd4cd0dae956b2dadba8f3db904275aaf99ac53894375
- sha256sums = c59a18d38d75fec7e9cc3b4efb6a997b3714c3156f6f80a6915bd16db409cde9
- sha256sums = 243be112ad418060b7c94361f6664e17cf17a854b77dc65a3e53b16881b4785f
- sha256sums = 1a34eae36a3f686f1bc158d7d13564f009e30b8866c919d7fe14590e872f095d
- sha256sums = 47a80bb6e1f113ccf2b3eff0b277a398b84b54f2100ddf42e31b94ea04654f49
- sha256sums = a9ce07b6533d86c3ffae8d5240d9c58b18778d0c5fed8ed97bde98ae43c4df71
+ sha256sums = 814f395fb39b5da77699ec5480d8176f6e9eefd5dd50c157945ceba6169a0658
+ sha256sums = c6c6645a1a0e58ed32daf283f3cebafb5c195a2b4091bd1208eda073692ca383
+ sha256sums = e0337e929f2eb3689332ada9ee0766a9cb06b0cf6ba3dd16416e72009ec91eb9
pkgname = linux-lts-surface4
pkgdesc = The Linux-lts-surface4 kernel and modules for Microsoft Surface Pro 4
@@ -55,8 +50,8 @@ pkgname = linux-lts-surface4
backup = etc/mkinitcpio.d/linux-lts-surface4.preset
pkgname = linux-lts-surface4-headers
- pkgdesc = Header files and scripts for building modules for Linux-lts-surface4 kernel for Microsoft Surface Pro 4
+ pkgdesc = Header files and scripts for building modules for Linux-lts-surface4 kernel
pkgname = linux-lts-surface4-docs
- pkgdesc = Kernel hackers manual - HTML documentation that comes with the Linux-lts-surface4 kernel for Microsoft Surface Pro 4
+ pkgdesc = Kernel hackers manual - HTML documentation that comes with the Linux-lts-surface4 kernel
diff --git a/0001-sdhci-revert.patch b/0001-sdhci-revert.patch
deleted file mode 100644
index 5d4afd64461..00000000000
--- a/0001-sdhci-revert.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-index 2cadf08..b48565e 100644
---- a/drivers/mmc/host/sdhci.c
-+++ b/drivers/mmc/host/sdhci.c
-@@ -1895,9 +1895,9 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
- tuning_count = host->tuning_count;
-
- /*
-- * The Host Controller needs tuning only in case of SDR104 mode
-- * and for SDR50 mode when Use Tuning for SDR50 is set in the
-- * Capabilities register.
-+ * The Host Controller needs tuning in case of SDR104 and DDR50
-+ * mode, and for SDR50 mode when Use Tuning for SDR50 is set in
-+ * the Capabilities register.
- * If the Host Controller supports the HS200 mode then the
- * tuning function has to be executed.
- */
-@@ -1917,6 +1917,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
- break;
-
- case MMC_TIMING_UHS_SDR104:
-+ case MMC_TIMING_UHS_DDR50:
- break;
-
- case MMC_TIMING_UHS_SDR50:
-generated by cgit v0.11.2 at 2016-01-01 22:11:38 (GMT)
diff --git a/0002-surface-wifi.patch b/0002-surface-wifi.patch
deleted file mode 100644
index 3c293b543b0..00000000000
--- a/0002-surface-wifi.patch
+++ /dev/null
@@ -1,136 +0,0 @@
---- a/drivers/net/wireless/mwifiex/cfg80211.c
-+++ a/drivers/net/wireless/mwifiex/cfg80211.c
-@@ -394,6 +394,8 @@ mwifiex_cfg80211_set_power_mgmt(struct wiphy *wiphy,
- "info: ignore timeout value for IEEE Power Save\n");
-
- ps_mode = enabled;
-+mwifiex_dbg(priv->adapter, ERROR, "jpw: hacking ps_mode to false\n");
-+ ps_mode = 0;
-
- return mwifiex_drv_set_power(priv, &ps_mode);
- }
---- a/drivers/net/wireless/mwifiex/pcie.c
-+++ a/drivers/net/wireless/mwifiex/pcie.c
-@@ -428,6 +428,8 @@ static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
- */
- static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
- {
-+// mwifiex_dbg(adapter, ERROR,
-+// "disable_host_int");
- if (mwifiex_pcie_ok_to_access_hw(adapter)) {
- if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
- 0x00000000)) {
-@@ -436,6 +438,9 @@ static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
- return -1;
- }
- }
-+ else
-+ mwifiex_dbg(adapter, ERROR,
-+ "Did NOT really disable host interrupt.\n");
-
- return 0;
- }
-@@ -448,6 +453,8 @@ static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
- */
- static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
- {
-+// mwifiex_dbg(adapter, ERROR,
-+// "enable_host_int");
- if (mwifiex_pcie_ok_to_access_hw(adapter)) {
- /* Simply write the mask to the register */
- if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
-@@ -1600,6 +1607,9 @@ static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
-
- mwifiex_dbg(adapter, CMD,
- "info: Rx CMD Response\n");
-+// mwifiex_dbg(adapter, ERROR,
-+// "jpw: %s skb %p, skb->len %d, skb->data_len %d, skb->head %p, skb->data %p, skb->tail %d, skb->end %d\n",
-+// __func__, skb, skb->len, skb->data_len, skb->head, skb->data, skb->tail, skb->end);
-
- mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE);
-
-@@ -1612,6 +1622,14 @@ static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
-
- pkt_len = *((__le16 *)skb->data);
- rx_len = le16_to_cpu(pkt_len);
-+ if (rx_len == 0) {
-+ mwifiex_dbg(adapter, ERROR,
-+ "0 byte cmdrsp\n");
-+ mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
-+ PCI_DMA_FROMDEVICE);
-+ return 0;
-+ }
-+
- skb_trim(skb, rx_len);
- skb_pull(skb, INTF_HEADER_LEN);
-
-@@ -1678,6 +1696,9 @@ static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
- struct pcie_service_card *card = adapter->card;
-
- if (skb) {
-+// mwifiex_dbg(adapter, ERROR,
-+// "jpw: %s skb %p, skb->len %d, skb->data_len %d, skb->head %p, skb->data %p, skb->tail %d, skb->end %d\n",
-+// __func__, skb, skb->len, skb->data_len, skb->head, skb->data, skb->tail, skb->end);
- card->cmdrsp_buf = skb;
- skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
- if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
-@@ -2195,6 +2216,7 @@ static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter)
- pcie_ireg = adapter->int_status;
- adapter->int_status = 0;
- spin_unlock_irqrestore(&adapter->int_lock, flags);
-+ mwifiex_dbg(adapter, INTR, "popped ireg: 0x%08x\n", pcie_ireg);
-
- while (pcie_ireg & HOST_INTR_MASK) {
- if (pcie_ireg & HOST_INTR_DNLD_DONE) {
-@@ -2234,7 +2256,7 @@ static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter)
- if (ret)
- return ret;
- }
--
-+#if defined(JPW_EXPERIMENT_1)
- if (mwifiex_pcie_ok_to_access_hw(adapter)) {
- if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
- &pcie_ireg)) {
-@@ -2254,6 +2276,7 @@ static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter)
- }
-
- }
-+#endif
- }
- mwifiex_dbg(adapter, INTR,
- "info: cmd_sent=%d data_sent=%d\n",
---- a/drivers/net/wireless/mwifiex/sta_cmd.c
-+++ a/drivers/net/wireless/mwifiex/sta_cmd.c
-@@ -2237,7 +2237,7 @@ int mwifiex_sta_init_cmd(struct mwifiex_private *priv, u8 first_sta, bool init)
- if (ret)
- return -1;
-
-- if (priv->bss_type != MWIFIEX_BSS_TYPE_UAP) {
-+ if (0 && priv->bss_type != MWIFIEX_BSS_TYPE_UAP) {
- /* Enable IEEE PS by default */
- priv->adapter->ps_mode = MWIFIEX_802_11_POWER_MODE_PSP;
- ret = mwifiex_send_cmd(priv,
-@@ -2300,7 +2300,7 @@ int mwifiex_sta_init_cmd(struct mwifiex_private *priv, u8 first_sta, bool init)
- if (ret)
- return -1;
-
-- if (!disable_auto_ds &&
-+ if (0 && !disable_auto_ds &&
- first_sta && priv->adapter->iface_type != MWIFIEX_USB &&
- priv->bss_type != MWIFIEX_BSS_TYPE_UAP) {
- /* Enable auto deep sleep */
---- a/drivers/net/wireless/mwifiex/util.c
-+++ a/drivers/net/wireless/mwifiex/util.c
-@@ -406,8 +406,11 @@ mwifiex_process_mgmt_packet(struct mwifiex_private *priv,
- u16 pkt_len;
- struct ieee80211_hdr *ieee_hdr;
-
-- if (!skb)
-+ if (!skb) {
-+ mwifiex_dbg(priv->adapter, ERROR,
-+ "no skb");
- return -1;
-+ }
-
- if (!priv->mgmt_frame_mask ||
- priv->wdev.iftype == NL80211_IFTYPE_UNSPECIFIED) {
diff --git a/0002-surface4-type-cover.patch b/0002-surface4-type-cover.patch
new file mode 100644
index 00000000000..bcf8a972166
--- /dev/null
+++ b/0002-surface4-type-cover.patch
@@ -0,0 +1,370 @@
+diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
+index 2b89c701076f..bd8b833f7fb4 100644
+--- a/drivers/hid/hid-core.c
++++ b/drivers/hid/hid-core.c
+@@ -724,12 +724,7 @@ static void hid_scan_collection(struct hid_parser *parser, unsigned type)
+ hid->group = HID_GROUP_SENSOR_HUB;
+
+ if (hid->vendor == USB_VENDOR_ID_MICROSOFT &&
+- (hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3 ||
+- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2 ||
+- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP ||
+- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP ||
+- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_3 ||
+- hid->product == USB_DEVICE_ID_MS_POWER_COVER) &&
++ hid->product == USB_DEVICE_ID_MS_POWER_COVER &&
+ hid->group == HID_GROUP_MULTITOUCH)
+ hid->group = HID_GROUP_GENERIC;
+
+@@ -1980,11 +1975,6 @@ static const struct hid_device_id hid_have_special_driver[] = {
+ { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K) },
+ { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0) },
+ { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_OFFICE_KB) },
+- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3) },
+- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2) },
+- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP) },
+- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP) },
+- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3) },
+ { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_7K) },
+ { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_600) },
+ { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3KV1) },
+diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
+index 575aa65436d1..3c92c7aefe33 100644
+--- a/drivers/hid/hid-ids.h
++++ b/drivers/hid/hid-ids.h
+@@ -718,8 +718,9 @@
+ #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3 0x07dc
+ #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2 0x07e2
+ #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP 0x07dd
++#define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4 0x07e4
++#define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2 0x07e8
+ #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP 0x07e9
+-#define USB_DEVICE_ID_MS_TYPE_COVER_3 0x07de
+ #define USB_DEVICE_ID_MS_POWER_COVER 0x07da
+
+ #define USB_VENDOR_ID_MOJO 0x8282
+diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c
+index fb9ace1cef8b..55db58459531 100644
+--- a/drivers/hid/hid-input.c
++++ b/drivers/hid/hid-input.c
+@@ -1468,6 +1468,31 @@ static void hidinput_cleanup_hidinput(struct hid_device *hid,
+ kfree(hidinput);
+ }
+
++static struct hid_input *hidinput_match(struct hid_report *report)
++{
++ struct hid_device *hid = report->device;
++ struct hid_input *hidinput;
++
++ list_for_each_entry(hidinput, &hid->inputs, list) {
++ if (hidinput->report &&
++ hidinput->report->id == report->id)
++ return hidinput;
++ }
++
++ return NULL;
++}
++
++static inline void hidinput_configure_usages(struct hid_input *hidinput,
++ struct hid_report *report)
++{
++ int i, j;
++
++ for (i = 0; i < report->maxfield; i++)
++ for (j = 0; j < report->field[i]->maxusage; j++)
++ hidinput_configure_usage(hidinput, report->field[i],
++ report->field[i]->usage + j);
++}
++
+ /*
+ * Register the input device; print a message.
+ * Configure the input layer interface
+@@ -1478,8 +1503,8 @@ int hidinput_connect(struct hid_device *hid, unsigned int force)
+ {
+ struct hid_driver *drv = hid->driver;
+ struct hid_report *report;
+- struct hid_input *hidinput = NULL;
+- int i, j, k;
++ struct hid_input *next, *hidinput = NULL;
++ int i, k;
+
+ INIT_LIST_HEAD(&hid->inputs);
+ INIT_WORK(&hid->led_work, hidinput_led_worker);
+@@ -1509,43 +1534,40 @@ int hidinput_connect(struct hid_device *hid, unsigned int force)
+ if (!report->maxfield)
+ continue;
+
++ /*
++ * Find the previous hidinput report attached
++ * to this report id.
++ */
++ if (hid->quirks & HID_QUIRK_MULTI_INPUT)
++ hidinput = hidinput_match(report);
++
+ if (!hidinput) {
+ hidinput = hidinput_allocate(hid);
+ if (!hidinput)
+ goto out_unwind;
+ }
+
+- for (i = 0; i < report->maxfield; i++)
+- for (j = 0; j < report->field[i]->maxusage; j++)
+- hidinput_configure_usage(hidinput, report->field[i],
+- report->field[i]->usage + j);
+-
+- if ((hid->quirks & HID_QUIRK_NO_EMPTY_INPUT) &&
+- !hidinput_has_been_populated(hidinput))
+- continue;
++ hidinput_configure_usages(hidinput, report);
+
+- if (hid->quirks & HID_QUIRK_MULTI_INPUT) {
+- /* This will leave hidinput NULL, so that it
+- * allocates another one if we have more inputs on
+- * the same interface. Some devices (e.g. Happ's
+- * UGCI) cram a lot of unrelated inputs into the
+- * same interface. */
++ if (hid->quirks & HID_QUIRK_MULTI_INPUT)
+ hidinput->report = report;
+- if (drv->input_configured &&
+- drv->input_configured(hid, hidinput))
+- goto out_cleanup;
+- if (input_register_device(hidinput->input))
+- goto out_cleanup;
+- hidinput = NULL;
+- }
+ }
+ }
+
+- if (hidinput && (hid->quirks & HID_QUIRK_NO_EMPTY_INPUT) &&
+- !hidinput_has_been_populated(hidinput)) {
+- /* no need to register an input device not populated */
+- hidinput_cleanup_hidinput(hid, hidinput);
+- hidinput = NULL;
++ list_for_each_entry_safe(hidinput, next, &hid->inputs, list) {
++ if ((hid->quirks & HID_QUIRK_NO_EMPTY_INPUT) &&
++ !hidinput_has_been_populated(hidinput)) {
++ /* no need to register an input device not populated */
++ hidinput_cleanup_hidinput(hid, hidinput);
++ continue;
++ }
++
++ if (drv->input_configured &&
++ drv->input_configured(hid, hidinput))
++ goto out_unwind;
++ if (input_register_device(hidinput->input))
++ goto out_unwind;
++ hidinput->registered = true;
+ }
+
+ if (list_empty(&hid->inputs)) {
+@@ -1553,20 +1575,8 @@ int hidinput_connect(struct hid_device *hid, unsigned int force)
+ goto out_unwind;
+ }
+
+- if (hidinput) {
+- if (drv->input_configured &&
+- drv->input_configured(hid, hidinput))
+- goto out_cleanup;
+- if (input_register_device(hidinput->input))
+- goto out_cleanup;
+- }
+-
+ return 0;
+
+-out_cleanup:
+- list_del(&hidinput->list);
+- input_free_device(hidinput->input);
+- kfree(hidinput);
+ out_unwind:
+ /* unwind the ones we already registered */
+ hidinput_disconnect(hid);
+@@ -1583,7 +1593,10 @@ void hidinput_disconnect(struct hid_device *hid)
+
+ list_for_each_entry_safe(hidinput, next, &hid->inputs, list) {
+ list_del(&hidinput->list);
+- input_unregister_device(hidinput->input);
++ if (hidinput->registered)
++ input_unregister_device(hidinput->input);
++ else
++ input_free_device(hidinput->input);
+ kfree(hidinput);
+ }
+
+diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c
+index c6cd392e9f99..96e7d3231d2f 100644
+--- a/drivers/hid/hid-microsoft.c
++++ b/drivers/hid/hid-microsoft.c
+@@ -274,16 +274,6 @@ static const struct hid_device_id ms_devices[] = {
+ .driver_data = MS_NOGET },
+ { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_MOUSE_4500),
+ .driver_data = MS_DUPLICATE_USAGES },
+- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3),
+- .driver_data = MS_HIDINPUT },
+- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2),
+- .driver_data = MS_HIDINPUT },
+- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP),
+- .driver_data = MS_HIDINPUT },
+- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP),
+- .driver_data = MS_HIDINPUT },
+- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3),
+- .driver_data = MS_HIDINPUT },
+ { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER),
+ .driver_data = MS_HIDINPUT },
+ { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_KEYBOARD),
+diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
+index fb6f1f447279..89e9032ab1e7 100644
+--- a/drivers/hid/hid-multitouch.c
++++ b/drivers/hid/hid-multitouch.c
+@@ -108,6 +108,7 @@ struct mt_device {
+ int cc_value_index; /* contact count value index in the field */
+ unsigned last_slot_field; /* the last field of a slot */
+ unsigned mt_report_id; /* the report ID of the multitouch device */
++ unsigned long initial_quirks; /* initial quirks state */
+ __s16 inputmode; /* InputMode HID feature, -1 if non-existent */
+ __s16 inputmode_index; /* InputMode HID feature index in the report */
+ __s16 maxcontact_report_id; /* Maximum Contact Number HID feature,
+@@ -318,13 +319,10 @@ static void mt_get_feature(struct hid_device *hdev, struct hid_report *report)
+ u8 *buf;
+
+ /*
+- * Only fetch the feature report if initial reports are not already
+- * been retrieved. Currently this is only done for Windows 8 touch
+- * devices.
++ * Do not fetch the feature report if the device has been explicitly
++ * marked as non-capable.
+ */
+- if (!(hdev->quirks & HID_QUIRK_NO_INIT_REPORTS))
+- return;
+- if (td->mtclass.name != MT_CLS_WIN_8)
++ if (td->initial_quirks & HID_QUIRK_NO_INIT_REPORTS)
+ return;
+
+ buf = hid_alloc_report_buf(report, GFP_KERNEL);
+@@ -842,7 +840,9 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,
+ if (!td->mtclass.export_all_inputs &&
+ field->application != HID_DG_TOUCHSCREEN &&
+ field->application != HID_DG_PEN &&
+- field->application != HID_DG_TOUCHPAD)
++ field->application != HID_DG_TOUCHPAD &&
++ field->application != HID_GD_KEYBOARD &&
++ field->application != HID_CP_CONSUMER_CONTROL)
+ return -1;
+
+ /*
+@@ -1083,36 +1083,6 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)
+ }
+ }
+
+- /* This allows the driver to correctly support devices
+- * that emit events over several HID messages.
+- */
+- hdev->quirks |= HID_QUIRK_NO_INPUT_SYNC;
+-
+- /*
+- * This allows the driver to handle different input sensors
+- * that emits events through different reports on the same HID
+- * device.
+- */
+- hdev->quirks |= HID_QUIRK_MULTI_INPUT;
+- hdev->quirks |= HID_QUIRK_NO_EMPTY_INPUT;
+-
+- /*
+- * Handle special quirks for Windows 8 certified devices.
+- */
+- if (id->group == HID_GROUP_MULTITOUCH_WIN_8)
+- /*
+- * Some multitouch screens do not like to be polled for input
+- * reports. Fortunately, the Win8 spec says that all touches
+- * should be sent during each report, making the initialization
+- * of input reports unnecessary.
+- *
+- * In addition some touchpads do not behave well if we read
+- * all feature reports from them. Instead we prevent
+- * initial report fetching and then selectively fetch each
+- * report we are interested in.
+- */
+- hdev->quirks |= HID_QUIRK_NO_INIT_REPORTS;
+-
+ td = devm_kzalloc(&hdev->dev, sizeof(struct mt_device), GFP_KERNEL);
+ if (!td) {
+ dev_err(&hdev->dev, "cannot allocate multitouch data\n");
+@@ -1136,6 +1106,39 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)
+ if (id->vendor == HID_ANY_ID && id->product == HID_ANY_ID)
+ td->serial_maybe = true;
+
++ /*
++ * Store the initial quirk state
++ */
++ td->initial_quirks = hdev->quirks;
++
++ /* This allows the driver to correctly support devices
++ * that emit events over several HID messages.
++ */
++ hdev->quirks |= HID_QUIRK_NO_INPUT_SYNC;
++
++ /*
++ * This allows the driver to handle different input sensors
++ * that emits events through different reports on the same HID
++ * device.
++ */
++ hdev->quirks |= HID_QUIRK_MULTI_INPUT;
++ hdev->quirks |= HID_QUIRK_NO_EMPTY_INPUT;
++
++ /*
++ * Some multitouch screens do not like to be polled for input
++ * reports. Fortunately, the Win8 spec says that all touches
++ * should be sent during each report, making the initialization
++ * of input reports unnecessary. For Win7 devices, well, let's hope
++ * they will still be happy (this is only be a problem if a touch
++ * was already there while probing the device).
++ *
++ * In addition some touchpads do not behave well if we read
++ * all feature reports from them. Instead we prevent
++ * initial report fetching and then selectively fetch each
++ * report we are interested in.
++ */
++ hdev->quirks |= HID_QUIRK_NO_INIT_REPORTS;
++
+ ret = hid_parse(hdev);
+ if (ret != 0)
+ return ret;
+@@ -1204,8 +1207,11 @@ static int mt_resume(struct hid_device *hdev)
+
+ static void mt_remove(struct hid_device *hdev)
+ {
++ struct mt_device *td = hid_get_drvdata(hdev);
++
+ sysfs_remove_group(&hdev->dev.kobj, &mt_attribute_group);
+ hid_hw_stop(hdev);
++ hdev->quirks = td->initial_quirks;
+ }
+
+ /*
+diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
+index e6cfd323babc..5c8ea9ac276f 100644
+--- a/drivers/hid/usbhid/hid-quirks.c
++++ b/drivers/hid/usbhid/hid-quirks.c
+@@ -98,11 +98,6 @@ static const struct hid_blacklist {
+ { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_SURFACE_PRO_2, HID_QUIRK_NO_INIT_REPORTS },
+ { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_2, HID_QUIRK_NO_INIT_REPORTS },
+ { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TOUCH_COVER_2, HID_QUIRK_NO_INIT_REPORTS },
+- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3, HID_QUIRK_NO_INIT_REPORTS },
+- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2, HID_QUIRK_NO_INIT_REPORTS },
+- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP, HID_QUIRK_NO_INIT_REPORTS },
+- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP, HID_QUIRK_NO_INIT_REPORTS },
+- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3, HID_QUIRK_NO_INIT_REPORTS },
+ { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER, HID_QUIRK_NO_INIT_REPORTS },
+ { USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GT683R_LED_PANEL, HID_QUIRK_NO_INIT_REPORTS },
+ { USB_VENDOR_ID_NEXIO, USB_DEVICE_ID_NEXIO_MULTITOUCH_PTI0750, HID_QUIRK_NO_INIT_REPORTS },
+diff --git a/include/linux/hid.h b/include/linux/hid.h
+index b2ec82712baa..596b9232c19e 100644
+--- a/include/linux/hid.h
++++ b/include/linux/hid.h
+@@ -479,6 +479,7 @@ struct hid_input {
+ struct list_head list;
+ struct hid_report *report;
+ struct input_dev *input;
++ bool registered;
+ };
+
+ enum hid_type {
diff --git a/0003-add-ipts.patch b/0003-add-ipts.patch
new file mode 100644
index 00000000000..24f5152a034
--- /dev/null
+++ b/0003-add-ipts.patch
@@ -0,0 +1,5933 @@
+diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
+index a998c2b..eb4796b 100644
+--- a/drivers/gpu/drm/i915/Makefile
++++ b/drivers/gpu/drm/i915/Makefile
+@@ -107,6 +107,9 @@ i915-y += dvo_ch7017.o \
+ intel_sdvo.o \
+ intel_tv.o
+
++# intel precise touch & stylus
++i915-y += intel_ipts.o
++
+ # virtual gpu code
+ i915-y += i915_vgpu.o
+
+diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
+index 18dfdd5..33c8e4b 100644
+--- a/drivers/gpu/drm/i915/i915_drv.c
++++ b/drivers/gpu/drm/i915/i915_drv.c
+@@ -49,6 +49,7 @@
+ #include "i915_trace.h"
+ #include "i915_vgpu.h"
+ #include "intel_drv.h"
++#include "intel_ipts.h"
+
+ static struct drm_driver driver;
+
+@@ -633,6 +634,10 @@ static int i915_load_modeset_init(struct drm_device *dev)
+
+ drm_kms_helper_poll_init(dev);
+
++pr_info(">> let init ipts\n");
++ if (INTEL_GEN(dev) >= 9 && i915.enable_guc_submission)
++ intel_ipts_init(dev);
++
+ return 0;
+
+ cleanup_gem:
+@@ -1269,6 +1274,9 @@ void i915_driver_unload(struct drm_device *dev)
+ struct drm_i915_private *dev_priv = to_i915(dev);
+ struct pci_dev *pdev = dev_priv->drm.pdev;
+
++ if (INTEL_GEN(dev) >= 9 && i915.enable_guc_submission)
++ intel_ipts_cleanup(dev);
++
+ intel_fbdev_fini(dev);
+
+ if (i915_gem_suspend(dev))
+diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
+index 685e9e06..7eeb03e 100644
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -3407,6 +3407,8 @@ struct drm_i915_gem_object *
+ i915_gem_alloc_context_obj(struct drm_device *dev, size_t size);
+ struct i915_gem_context *
+ i915_gem_context_create_gvt(struct drm_device *dev);
++struct i915_gem_context *
++i915_gem_context_create_ipts(struct drm_device *dev);
+
+ static inline struct i915_gem_context *
+ i915_gem_context_lookup(struct drm_i915_file_private *file_priv, u32 id)
+diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
+index df10f4e9..baea2e9 100644
+--- a/drivers/gpu/drm/i915/i915_gem_context.c
++++ b/drivers/gpu/drm/i915/i915_gem_context.c
+@@ -405,6 +405,17 @@ i915_gem_context_create_gvt(struct drm_device *dev)
+ return ctx;
+ }
+
++struct i915_gem_context *i915_gem_context_create_ipts(struct drm_device *dev)
++{
++ struct i915_gem_context *ctx;
++
++ BUG_ON(!mutex_is_locked(&dev->struct_mutex));
++
++ ctx = i915_gem_create_context(dev, NULL);
++
++ return ctx;
++}
++
+ static void i915_gem_context_unpin(struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine)
+ {
+diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
+index 3106dcc..6a5065e 100644
+--- a/drivers/gpu/drm/i915/i915_guc_submission.c
++++ b/drivers/gpu/drm/i915/i915_guc_submission.c
+@@ -333,7 +333,13 @@ static void guc_ctx_desc_init(struct intel_guc *guc,
+
+ memset(&desc, 0, sizeof(desc));
+
+- desc.attribute = GUC_CTX_DESC_ATTR_ACTIVE | GUC_CTX_DESC_ATTR_KERNEL;
++ desc.attribute = GUC_CTX_DESC_ATTR_ACTIVE;
++ if ((client->priority == GUC_CTX_PRIORITY_KMD_NORMAL) ||
++ (client->priority == GUC_CTX_PRIORITY_KMD_HIGH)) {
++ desc.attribute |= GUC_CTX_DESC_ATTR_KERNEL;
++ } else {
++ desc.attribute |= GUC_CTX_DESC_ATTR_PCH;
++ }
+ desc.context_id = client->ctx_index;
+ desc.priority = client->priority;
+ desc.db_id = client->doorbell_id;
+@@ -1098,6 +1104,47 @@ int intel_guc_suspend(struct drm_device *dev)
+ return host2guc_action(guc, data, ARRAY_SIZE(data));
+ }
+
++int i915_guc_ipts_submission_enable(struct drm_i915_private *dev_priv,
++ struct i915_gem_context *ctx)
++{
++ struct intel_guc *guc = &dev_priv->guc;
++ struct i915_guc_client *client;
++
++ /* client for execbuf submission */
++ client = guc_client_alloc(dev_priv,
++ INTEL_INFO(dev_priv)->ring_mask,
++ GUC_CTX_PRIORITY_NORMAL,
++ ctx);
++ if (!client) {
++ DRM_ERROR("Failed to create normal GuC client!\n");
++ return -ENOMEM;
++ }
++
++ guc->ipts_client = client;
++ host2guc_sample_forcewake(guc, client);
++ guc_init_doorbell_hw(guc);
++
++ return 0;
++}
++
++void i915_guc_ipts_submission_disable(struct drm_i915_private *dev_priv)
++{
++ struct intel_guc *guc = &dev_priv->guc;
++
++ if (!guc->ipts_client)
++ return;
++
++ guc_client_free(dev_priv, guc->ipts_client);
++ guc->ipts_client = NULL;
++}
++
++void i915_guc_ipts_reacquire_doorbell(struct drm_i915_private *dev_priv)
++{
++ struct intel_guc *guc = &dev_priv->guc;
++
++ if (host2guc_allocate_doorbell(guc, guc->ipts_client))
++ DRM_ERROR("Not able to reacquire IPTS doorbell\n");
++}
+
+ /**
+ * intel_guc_resume() - notify GuC resuming from suspend state
+diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
+index 3fc286c..d48d0f1 100644
+--- a/drivers/gpu/drm/i915/i915_irq.c
++++ b/drivers/gpu/drm/i915/i915_irq.c
+@@ -36,6 +36,7 @@
+ #include "i915_drv.h"
+ #include "i915_trace.h"
+ #include "intel_drv.h"
++#include "intel_ipts.h"
+
+ /**
+ * DOC: interrupt handling
+@@ -1288,6 +1289,8 @@ gen8_cs_irq_handler(struct intel_engine_cs *engine, u32 iir, int test_shift)
+ notify_ring(engine);
+ if (iir & (GT_CONTEXT_SWITCH_INTERRUPT << test_shift))
+ tasklet_schedule(&engine->irq_tasklet);
++ if (iir & (GT_RENDER_PIPECTL_NOTIFY_INTERRUPT << test_shift))
++ intel_ipts_notify_complete();
+ }
+
+ static irqreturn_t gen8_gt_irq_ack(struct drm_i915_private *dev_priv,
+@@ -3680,7 +3683,8 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
+ {
+ /* These are interrupts we'll toggle with the ring mask register */
+ uint32_t gt_interrupts[] = {
+- GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
++ GT_RENDER_PIPECTL_NOTIFY_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
++ GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
+ GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
+ GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT |
+ GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT,
+diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
+index 768ad89..d1d99e3 100644
+--- a/drivers/gpu/drm/i915/i915_params.c
++++ b/drivers/gpu/drm/i915/i915_params.c
+@@ -55,8 +55,8 @@ struct i915_params i915 __read_mostly = {
+ .verbose_state_checks = 1,
+ .nuclear_pageflip = 0,
+ .edp_vswing = 0,
+- .enable_guc_loading = 0,
+- .enable_guc_submission = 0,
++ .enable_guc_loading = 2,
++ .enable_guc_submission = 2,
+ .guc_log_level = -1,
+ .enable_dp_mst = true,
+ .inject_load_failure = 0,
+@@ -209,12 +209,12 @@ MODULE_PARM_DESC(edp_vswing,
+ module_param_named_unsafe(enable_guc_loading, i915.enable_guc_loading, int, 0400);
+ MODULE_PARM_DESC(enable_guc_loading,
+ "Enable GuC firmware loading "
+- "(-1=auto, 0=never [default], 1=if available, 2=required)");
++ "(-1=auto, 0=never, 1=if available, 2=required [default])");
+
+ module_param_named_unsafe(enable_guc_submission, i915.enable_guc_submission, int, 0400);
+ MODULE_PARM_DESC(enable_guc_submission,
+ "Enable GuC submission "
+- "(-1=auto, 0=never [default], 1=if available, 2=required)");
++ "(-1=auto, 0=never, 1=if available, 2=required [default])");
+
+ module_param_named(guc_log_level, i915.guc_log_level, int, 0400);
+ MODULE_PARM_DESC(guc_log_level,
+diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
+index 5cdf7aa..0b8dd19 100644
+--- a/drivers/gpu/drm/i915/intel_guc.h
++++ b/drivers/gpu/drm/i915/intel_guc.h
+@@ -133,6 +133,7 @@ struct intel_guc {
+ struct ida ctx_ids;
+
+ struct i915_guc_client *execbuf_client;
++ struct i915_guc_client *ipts_client;
+
+ DECLARE_BITMAP(doorbell_bitmap, GUC_MAX_DOORBELLS);
+ uint32_t db_cacheline; /* Cyclic counter mod pagesize */
+@@ -163,5 +164,9 @@ int i915_guc_wq_reserve(struct drm_i915_gem_request *rq);
+ void i915_guc_wq_unreserve(struct drm_i915_gem_request *request);
+ void i915_guc_submission_disable(struct drm_i915_private *dev_priv);
+ void i915_guc_submission_fini(struct drm_i915_private *dev_priv);
++int i915_guc_ipts_submission_enable(struct drm_i915_private *dev_priv,
++ struct i915_gem_context *ctx);
++void i915_guc_ipts_submission_disable(struct drm_i915_private *dev_priv);
++void i915_guc_ipts_reacquire_doorbell(struct drm_i915_private *dev_priv);
+
+ #endif
+diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
+index 6fd39ef..5a21181 100644
+--- a/drivers/gpu/drm/i915/intel_guc_loader.c
++++ b/drivers/gpu/drm/i915/intel_guc_loader.c
+@@ -126,7 +126,8 @@ static void guc_interrupts_capture(struct drm_i915_private *dev_priv)
+ I915_WRITE(RING_MODE_GEN7(engine), irqs);
+
+ /* route USER_INTERRUPT to Host, all others are sent to GuC. */
+- irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
++ irqs = (GT_RENDER_USER_INTERRUPT | GT_RENDER_PIPECTL_NOTIFY_INTERRUPT)
++ << GEN8_RCS_IRQ_SHIFT |
+ GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;
+ /* These three registers have the same bit definitions */
+ I915_WRITE(GUC_BCS_RCS_IER, ~irqs);
+diff --git a/drivers/gpu/drm/i915/intel_ipts.c b/drivers/gpu/drm/i915/intel_ipts.c
+new file mode 100644
+index 0000000..f4a2440
+--- /dev/null
++++ b/drivers/gpu/drm/i915/intel_ipts.c
+@@ -0,0 +1,621 @@
++/*
++ * Copyright 2016 Intel Corporation
++ *
++ * Permission is hereby granted, free of charge, to any person obtaining a
++ * copy of this software and associated documentation files (the "Software"),
++ * to deal in the Software without restriction, including without limitation
++ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
++ * and/or sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following conditions:
++ *
++ * The above copyright notice and this permission notice (including the next
++ * paragraph) shall be included in all copies or substantial portions of the
++ * Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
++ * IN THE SOFTWARE.
++ *
++ */
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/module.h>
++#include <linux/intel_ipts_if.h>
++#include <drm/drmP.h>
++
++#include "i915_drv.h"
++
++#define SUPPORTED_IPTS_INTERFACE_VERSION 1
++
++#define REACQUIRE_DB_THRESHOLD 8
++#define DB_LOST_CHECK_STEP1_INTERVAL 2000 /* ms */
++#define DB_LOST_CHECK_STEP2_INTERVAL 500 /* ms */
++
++/* intel IPTS ctx for ipts support */
++typedef struct intel_ipts {
++ struct drm_device *dev;
++ struct i915_gem_context *ipts_context;
++ intel_ipts_callback_t ipts_clbks;
++
++ /* buffers' list */
++ struct {
++ spinlock_t lock;
++ struct list_head list;
++ } buffers;
++
++ void *data;
++
++ struct delayed_work reacquire_db_work;
++ intel_ipts_wq_info_t wq_info;
++ u32 old_tail;
++ u32 old_head;
++ bool need_reacquire_db;
++
++ bool connected;
++ bool initialized;
++} intel_ipts_t;
++
++intel_ipts_t intel_ipts;
++
++typedef struct intel_ipts_object {
++ struct list_head list;
++ struct drm_i915_gem_object *gem_obj;
++ void *cpu_addr;
++} intel_ipts_object_t;
++
++static intel_ipts_object_t *ipts_object_create(size_t size, u32 flags)
++{
++ intel_ipts_object_t *obj = NULL;
++ struct drm_i915_gem_object *gem_obj = NULL;
++ int ret = 0;
++
++ obj = kzalloc(sizeof(*obj), GFP_KERNEL);
++ if (!obj)
++ return NULL;
++
++ size = roundup(size, PAGE_SIZE);
++ if (size == 0) {
++ ret = -EINVAL;
++ goto err_out;
++ }
++
++ /* Allocate the new object */
++ gem_obj = i915_gem_object_create(intel_ipts.dev, size);
++ if (gem_obj == NULL) {
++ ret = -ENOMEM;
++ goto err_out;
++ }
++
++ if (flags & IPTS_BUF_FLAG_CONTIGUOUS) {
++ ret = i915_gem_object_attach_phys(gem_obj, PAGE_SIZE);
++ if (ret) {
++ pr_info(">> ipts no contiguous : %d\n", ret);
++ goto err_out;
++ }
++ }
++
++ obj->gem_obj = gem_obj;
++
++ spin_lock(&intel_ipts.buffers.lock);
++ list_add_tail(&obj->list, &intel_ipts.buffers.list);
++ spin_unlock(&intel_ipts.buffers.lock);
++
++ return obj;
++
++err_out:
++ if (gem_obj)
++ i915_gem_free_object(&gem_obj->base);
++
++ if (obj)
++ kfree(obj);
++
++ return NULL;
++}
++
++static void ipts_object_free(intel_ipts_object_t* obj)
++{
++ spin_lock(&intel_ipts.buffers.lock);
++ list_del(&obj->list);
++ spin_unlock(&intel_ipts.buffers.lock);
++
++ i915_gem_free_object(&obj->gem_obj->base);
++ kfree(obj);
++}
++
++static int ipts_object_pin(intel_ipts_object_t* obj,
++ struct i915_gem_context *ipts_ctx)
++{
++ struct i915_address_space *vm = NULL;
++ struct i915_vma *vma = NULL;
++ struct drm_i915_private *dev_priv = intel_ipts.dev->dev_private;
++ int ret = 0;
++
++ if (ipts_ctx->ppgtt) {
++ vm = &ipts_ctx->ppgtt->base;
++ } else {
++ vm = &dev_priv->ggtt.base;
++ }
++
++ vma = i915_gem_obj_lookup_or_create_vma(obj->gem_obj, vm, NULL);
++ if (IS_ERR(vma)) {
++ DRM_ERROR("cannot find or create vma\n");
++ return -1;
++ }
++
++ ret = i915_vma_pin(vma, 0, PAGE_SIZE, PIN_USER);
++
++ return ret;
++}
++
++static void ipts_object_unpin(intel_ipts_object_t *obj)
++{
++ /* TBD: Add support */
++}
++
++static void* ipts_object_map(intel_ipts_object_t *obj)
++{
++
++ return i915_gem_object_pin_map(obj->gem_obj, I915_MAP_WB);
++}
++
++static void ipts_object_unmap(intel_ipts_object_t* obj)
++{
++ i915_gem_object_unpin_map(obj->gem_obj);
++ obj->cpu_addr = NULL;
++}
++
++static int create_ipts_context(void)
++{
++ struct i915_gem_context *ipts_ctx = NULL;
++ struct drm_i915_private *dev_priv = intel_ipts.dev->dev_private;
++ int ret = 0;
++
++ /* Initialize the context right away.*/
++ ret = i915_mutex_lock_interruptible(intel_ipts.dev);
++ if (ret) {
++ DRM_ERROR("i915_mutex_lock_interruptible failed \n");
++ return ret;
++ }
++
++ ipts_ctx = i915_gem_context_create_ipts(intel_ipts.dev);
++ if (IS_ERR(ipts_ctx)) {
++ DRM_ERROR("Failed to create IPTS context (error %ld)\n",
++ PTR_ERR(ipts_ctx));
++ ret = PTR_ERR(ipts_ctx);
++ goto err_unlock;
++ }
++
++ ret = execlists_context_deferred_alloc(ipts_ctx, &dev_priv->engine[RCS]);
++ if (ret) {
++ DRM_DEBUG("lr context allocation failed : %d\n", ret);
++ goto err_ctx;
++ }
++
++ ret = intel_lr_context_pin(ipts_ctx, &dev_priv->engine[RCS]);
++ if (ret) {
++ DRM_DEBUG("lr context pinning failed : %d\n", ret);
++ goto err_ctx;
++ }
++
++ /* Release the mutex */
++ mutex_unlock(&intel_ipts.dev->struct_mutex);
++
++ spin_lock_init(&intel_ipts.buffers.lock);
++ INIT_LIST_HEAD(&intel_ipts.buffers.list);
++
++ intel_ipts.ipts_context = ipts_ctx;
++
++ return 0;
++
++err_ctx:
++ if (ipts_ctx)
++ i915_gem_context_put(ipts_ctx);
++
++err_unlock:
++ mutex_unlock(&intel_ipts.dev->struct_mutex);
++
++ return ret;
++}
++
++static void destroy_ipts_context(void)
++{
++ struct i915_gem_context *ipts_ctx = NULL;
++ struct drm_i915_private *dev_priv = intel_ipts.dev->dev_private;
++ int ret = 0;
++
++ ipts_ctx = intel_ipts.ipts_context;
++
++ /* Initialize the context right away.*/
++ ret = i915_mutex_lock_interruptible(intel_ipts.dev);
++ if (ret) {
++ DRM_ERROR("i915_mutex_lock_interruptible failed \n");
++ return;
++ }
++
++ intel_lr_context_unpin(ipts_ctx, &dev_priv->engine[RCS]);
++ i915_gem_context_put(ipts_ctx);
++
++ mutex_unlock(&intel_ipts.dev->struct_mutex);
++}
++
++int intel_ipts_notify_complete(void)
++{
++ if (intel_ipts.ipts_clbks.workload_complete)
++ intel_ipts.ipts_clbks.workload_complete(intel_ipts.data);
++
++ return 0;
++}
++
++int intel_ipts_notify_backlight_status(bool backlight_on)
++{
++ if (intel_ipts.ipts_clbks.notify_gfx_status) {
++ if (backlight_on) {
++ intel_ipts.ipts_clbks.notify_gfx_status(
++ IPTS_NOTIFY_STA_BACKLIGHT_ON,
++ intel_ipts.data);
++ schedule_delayed_work(&intel_ipts.reacquire_db_work,
++ msecs_to_jiffies(DB_LOST_CHECK_STEP1_INTERVAL));
++ } else {
++ intel_ipts.ipts_clbks.notify_gfx_status(
++ IPTS_NOTIFY_STA_BACKLIGHT_OFF,
++ intel_ipts.data);
++ cancel_delayed_work(&intel_ipts.reacquire_db_work);
++ }
++ }
++
++ return 0;
++}
++
++static void intel_ipts_reacquire_db(intel_ipts_t *intel_ipts_p)
++{
++ int ret = 0;
++
++ ret = i915_mutex_lock_interruptible(intel_ipts_p->dev);
++ if (ret) {
++ DRM_ERROR("i915_mutex_lock_interruptible failed \n");
++ return;
++ }
++
++ /* Reacquire the doorbell */
++ i915_guc_ipts_reacquire_doorbell(intel_ipts_p->dev->dev_private);
++
++ mutex_unlock(&intel_ipts_p->dev->struct_mutex);
++
++ return;
++}
++
++static int intel_ipts_get_wq_info(uint64_t gfx_handle,
++ intel_ipts_wq_info_t *wq_info)
++{
++ if (gfx_handle != (uint64_t)&intel_ipts) {
++ DRM_ERROR("invalid gfx handle\n");
++ return -EINVAL;
++ }
++
++ *wq_info = intel_ipts.wq_info;
++
++ intel_ipts_reacquire_db(&intel_ipts);
++ schedule_delayed_work(&intel_ipts.reacquire_db_work,
++ msecs_to_jiffies(DB_LOST_CHECK_STEP1_INTERVAL));
++
++ return 0;
++}
++
++static int set_wq_info(void)
++{
++ struct drm_i915_private *dev_priv = intel_ipts.dev->dev_private;
++ struct intel_guc *guc = &dev_priv->guc;
++ struct i915_guc_client *client;
++ struct guc_process_desc *desc;
++ void *base = NULL;
++ intel_ipts_wq_info_t *wq_info;
++ u64 phy_base = 0;
++
++ wq_info = &intel_ipts.wq_info;
++
++ client = guc->ipts_client;
++ if (!client) {
++ DRM_ERROR("IPTS GuC client is NOT available\n");
++ return -EINVAL;
++ }
++
++ base = client->client_base;
++ desc = (struct guc_process_desc *)((u64)base + client->proc_desc_offset);
++
++ desc->wq_base_addr = (u64)base + client->wq_offset;
++ desc->db_base_addr = (u64)base + client->doorbell_offset;
++
++ /* IPTS expects physical addresses to pass it to ME */
++ phy_base = sg_dma_address(client->vma->pages->sgl);
++
++ wq_info->db_addr = desc->db_base_addr;
++ wq_info->db_phy_addr = phy_base + client->doorbell_offset;
++ wq_info->db_cookie_offset = offsetof(struct guc_doorbell_info, cookie);
++ wq_info->wq_addr = desc->wq_base_addr;
++ wq_info->wq_phy_addr = phy_base + client->wq_offset;
++ wq_info->wq_head_addr = (u64)&desc->head;
++ wq_info->wq_head_phy_addr = phy_base + client->proc_desc_offset +
++ offsetof(struct guc_process_desc, head);
++ wq_info->wq_tail_addr = (u64)&desc->tail;
++ wq_info->wq_tail_phy_addr = phy_base + client->proc_desc_offset +
++ offsetof(struct guc_process_desc, tail);
++ wq_info->wq_size = desc->wq_size_bytes;
++
++ return 0;
++}
++
++static int intel_ipts_init_wq(void)
++{
++ int ret = 0;
++
++ ret = i915_mutex_lock_interruptible(intel_ipts.dev);
++ if (ret) {
++ DRM_ERROR("i915_mutex_lock_interruptible failed\n");
++ return ret;
++ }
++
++ /* disable IPTS submission */
++ i915_guc_ipts_submission_disable(intel_ipts.dev->dev_private);
++
++ /* enable IPTS submission */
++ ret = i915_guc_ipts_submission_enable(intel_ipts.dev->dev_private,
++ intel_ipts.ipts_context);
++ if (ret) {
++ DRM_ERROR("i915_guc_ipts_submission_enable failed : %d\n", ret);
++ goto out;
++ }
++
++ ret = set_wq_info();
++ if (ret) {
++ DRM_ERROR("set_wq_info failed\n");
++ goto out;
++ }
++
++out:
++ mutex_unlock(&intel_ipts.dev->struct_mutex);
++
++ return ret;
++}
++
++static void intel_ipts_release_wq(void)
++{
++ int ret = 0;
++
++ ret = i915_mutex_lock_interruptible(intel_ipts.dev);
++ if (ret) {
++ DRM_ERROR("i915_mutex_lock_interruptible failed\n");
++ return;
++ }
++
++ /* disable IPTS submission */
++ i915_guc_ipts_submission_disable(intel_ipts.dev->dev_private);
++
++ mutex_unlock(&intel_ipts.dev->struct_mutex);
++}
++
++static int intel_ipts_map_buffer(u64 gfx_handle, intel_ipts_mapbuffer_t *mapbuf)
++{
++ intel_ipts_object_t* obj;
++ struct i915_gem_context *ipts_ctx = NULL;
++ struct drm_i915_private *dev_priv = intel_ipts.dev->dev_private;
++ struct i915_address_space *vm = NULL;
++ struct i915_vma *vma = NULL;
++ int ret = 0;
++
++ if (gfx_handle != (uint64_t)&intel_ipts) {
++ DRM_ERROR("invalid gfx handle\n");
++ return -EINVAL;
++ }
++
++ /* Acquire mutex first */
++ ret = i915_mutex_lock_interruptible(intel_ipts.dev);
++ if (ret) {
++ DRM_ERROR("i915_mutex_lock_interruptible failed \n");
++ return -EINVAL;
++ }
++
++ obj = ipts_object_create(mapbuf->size, mapbuf->flags);
++ if (!obj)
++ return -ENOMEM;
++
++ ipts_ctx = intel_ipts.ipts_context;
++ ret = ipts_object_pin(obj, ipts_ctx);
++ if (ret) {
++ DRM_ERROR("Not able to pin iTouch obj\n");
++ ipts_object_free(obj);
++ mutex_unlock(&intel_ipts.dev->struct_mutex);
++ return -ENOMEM;
++ }
++
++ if (mapbuf->flags & IPTS_BUF_FLAG_CONTIGUOUS) {
++ obj->cpu_addr = obj->gem_obj->phys_handle->vaddr;
++ } else {
++ obj->cpu_addr = ipts_object_map(obj);
++ }
++
++ if (ipts_ctx->ppgtt) {
++ vm = &ipts_ctx->ppgtt->base;
++ } else {
++ vm = &dev_priv->ggtt.base;
++ }
++
++ vma = i915_gem_obj_lookup_or_create_vma(obj->gem_obj, vm, NULL);
++ if (IS_ERR(vma)) {
++ DRM_ERROR("cannot find or create vma\n");
++ return -EINVAL;
++ }
++
++ mapbuf->gfx_addr = (void*)vma->node.start;
++ mapbuf->cpu_addr = (void*)obj->cpu_addr;
++ mapbuf->buf_handle = (u64)obj;
++ if (mapbuf->flags & IPTS_BUF_FLAG_CONTIGUOUS) {
++ mapbuf->phy_addr = (u64)obj->gem_obj->phys_handle->busaddr;
++ }
++
++ /* Release the mutex */
++ mutex_unlock(&intel_ipts.dev->struct_mutex);
++
++ return 0;
++}
++
++static int intel_ipts_unmap_buffer(uint64_t gfx_handle, uint64_t buf_handle)
++{
++ intel_ipts_object_t* obj = (intel_ipts_object_t*)buf_handle;
++
++ if (gfx_handle != (uint64_t)&intel_ipts) {
++ DRM_ERROR("invalid gfx handle\n");
++ return -EINVAL;
++ }
++
++ if (!obj->gem_obj->phys_handle)
++ ipts_object_unmap(obj);
++ ipts_object_unpin(obj);
++ ipts_object_free(obj);
++
++ return 0;
++}
++
++int intel_ipts_connect(intel_ipts_connect_t *ipts_connect)
++{
++ int ret = 0;
++
++ if (!intel_ipts.initialized)
++ return -EIO;
++
++ if (ipts_connect && ipts_connect->if_version <=
++ SUPPORTED_IPTS_INTERFACE_VERSION) {
++
++ /* return gpu operations for ipts */
++ ipts_connect->ipts_ops.get_wq_info = intel_ipts_get_wq_info;
++ ipts_connect->ipts_ops.map_buffer = intel_ipts_map_buffer;
++ ipts_connect->ipts_ops.unmap_buffer = intel_ipts_unmap_buffer;
++ ipts_connect->gfx_version = INTEL_INFO(intel_ipts.dev)->gen;
++ ipts_connect->gfx_handle = (uint64_t)&intel_ipts;
++
++ /* save callback and data */
++ intel_ipts.data = ipts_connect->data;
++ intel_ipts.ipts_clbks = ipts_connect->ipts_cb;
++
++ intel_ipts.connected = true;
++ } else {
++ ret = -EINVAL;
++ }
++
++ return ret;
++}
++EXPORT_SYMBOL_GPL(intel_ipts_connect);
++
++void intel_ipts_disconnect(uint64_t gfx_handle)
++{
++ if (!intel_ipts.initialized)
++ return;
++
++ if (gfx_handle != (uint64_t)&intel_ipts ||
++ intel_ipts.connected == false) {
++ DRM_ERROR("invalid gfx handle\n");
++ return;
++ }
++
++ intel_ipts.data = 0;
++ memset(&intel_ipts.ipts_clbks, 0, sizeof(intel_ipts_callback_t));
++
++ intel_ipts.connected = false;
++}
++EXPORT_SYMBOL_GPL(intel_ipts_disconnect);
++
++static void reacquire_db_work_func(struct work_struct *work)
++{
++ struct delayed_work *d_work = container_of(work, struct delayed_work,
++ work);
++ intel_ipts_t *intel_ipts_p = container_of(d_work, intel_ipts_t,
++ reacquire_db_work);
++ u32 head;
++ u32 tail;
++ u32 size;
++ u32 load;
++
++ head = *(u32*)intel_ipts_p->wq_info.wq_head_addr;
++ tail = *(u32*)intel_ipts_p->wq_info.wq_tail_addr;
++ size = intel_ipts_p->wq_info.wq_size;
++
++ if (head >= tail)
++ load = head - tail;
++ else
++ load = head + size - tail;
++
++ if (load < REACQUIRE_DB_THRESHOLD) {
++ intel_ipts_p->need_reacquire_db = false;
++ goto reschedule_work;
++ }
++
++ if (intel_ipts_p->need_reacquire_db) {
++ if (intel_ipts_p->old_head == head && intel_ipts_p->old_tail == tail)
++ intel_ipts_reacquire_db(intel_ipts_p);
++ intel_ipts_p->need_reacquire_db = false;
++ } else {
++ intel_ipts_p->old_head = head;
++ intel_ipts_p->old_tail = tail;
++ intel_ipts_p->need_reacquire_db = true;
++
++ /* recheck */
++ schedule_delayed_work(&intel_ipts_p->reacquire_db_work,
++ msecs_to_jiffies(DB_LOST_CHECK_STEP2_INTERVAL));
++ return;
++ }
++
++reschedule_work:
++ schedule_delayed_work(&intel_ipts_p->reacquire_db_work,
++ msecs_to_jiffies(DB_LOST_CHECK_STEP1_INTERVAL));
++}
++
++/**
++ * intel_ipts_init - Initialize ipts support
++ * @dev: drm device
++ *
++ * Setup the required structures for ipts.
++ */
++int intel_ipts_init(struct drm_device *dev)
++{
++ int ret = 0;
++
++ intel_ipts.dev = dev;
++ INIT_DELAYED_WORK(&intel_ipts.reacquire_db_work, reacquire_db_work_func);
++
++ ret = create_ipts_context();
++ if (ret)
++ return -ENOMEM;
++
++ ret = intel_ipts_init_wq();
++ if (ret)
++ return ret;
++
++ intel_ipts.initialized = true;
++ DRM_DEBUG_DRIVER("Intel iTouch framework initialized\n");
++
++ return ret;
++}
++
++void intel_ipts_cleanup(struct drm_device *dev)
++{
++ intel_ipts_object_t *obj, *n;
++
++ if (intel_ipts.dev == dev) {
++ list_for_each_entry_safe(obj, n, &intel_ipts.buffers.list, list) {
++ list_del(&obj->list);
++
++ if (!obj->gem_obj->phys_handle)
++ ipts_object_unmap(obj);
++ ipts_object_unpin(obj);
++ i915_gem_free_object(&obj->gem_obj->base);
++ kfree(obj);
++ }
++
++ intel_ipts_release_wq();
++ destroy_ipts_context();
++ cancel_delayed_work(&intel_ipts.reacquire_db_work);
++ }
++}
+diff --git a/drivers/gpu/drm/i915/intel_ipts.h b/drivers/gpu/drm/i915/intel_ipts.h
+new file mode 100644
+index 0000000..a6965d1
+--- /dev/null
++++ b/drivers/gpu/drm/i915/intel_ipts.h
+@@ -0,0 +1,34 @@
++/*
++ * Copyright © 2016 Intel Corporation
++ *
++ * Permission is hereby granted, free of charge, to any person obtaining a
++ * copy of this software and associated documentation files (the "Software"),
++ * to deal in the Software without restriction, including without limitation
++ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
++ * and/or sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following conditions:
++ *
++ * The above copyright notice and this permission notice (including the next
++ * paragraph) shall be included in all copies or substantial portions of the
++ * Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
++ * IN THE SOFTWARE.
++ *
++ */
++#ifndef _INTEL_IPTS_H_
++#define _INTEL_IPTS_H_
++
++struct drm_device;
++
++int intel_ipts_init(struct drm_device *dev);
++void intel_ipts_cleanup(struct drm_device *dev);
++int intel_ipts_notify_backlight_status(bool backlight_on);
++int intel_ipts_notify_complete(void);
++
++#endif //_INTEL_IPTS_H_
+diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
+index 0adb879..7e69bce 100644
+--- a/drivers/gpu/drm/i915/intel_lrc.c
++++ b/drivers/gpu/drm/i915/intel_lrc.c
+@@ -228,10 +228,6 @@ enum {
+
+ #define WA_TAIL_DWORDS 2
+
+-static int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
+- struct intel_engine_cs *engine);
+-static int intel_lr_context_pin(struct i915_gem_context *ctx,
+- struct intel_engine_cs *engine);
+ static void execlists_init_reg_state(u32 *reg_state,
+ struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine,
+@@ -712,7 +708,7 @@ intel_logical_ring_advance(struct drm_i915_gem_request *request)
+ return 0;
+ }
+
+-static int intel_lr_context_pin(struct i915_gem_context *ctx,
++int intel_lr_context_pin(struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine)
+ {
+ struct intel_context *ce = &ctx->engine[engine->id];
+@@ -1809,7 +1805,8 @@ int logical_render_ring_init(struct intel_engine_cs *engine)
+ int ret;
+
+ logical_ring_setup(engine);
+-
++ engine->irq_keep_mask |= GT_RENDER_PIPECTL_NOTIFY_INTERRUPT
++ << GEN8_RCS_IRQ_SHIFT;
+ if (HAS_L3_DPF(dev_priv))
+ engine->irq_keep_mask |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
+
+@@ -2097,7 +2094,7 @@ uint32_t intel_lr_context_size(struct intel_engine_cs *engine)
+ return ret;
+ }
+
+-static int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
++int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine)
+ {
+ struct drm_i915_gem_object *ctx_obj;
+diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
+index 4fed816..acac3f5 100644
+--- a/drivers/gpu/drm/i915/intel_lrc.h
++++ b/drivers/gpu/drm/i915/intel_lrc.h
+@@ -82,6 +82,10 @@ int intel_engines_init(struct drm_device *dev);
+ struct i915_gem_context;
+
+ uint32_t intel_lr_context_size(struct intel_engine_cs *engine);
++int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
++ struct intel_engine_cs *engine);
++int intel_lr_context_pin(struct i915_gem_context *ctx,
++ struct intel_engine_cs *engine);
+ void intel_lr_context_unpin(struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine);
+
+diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
+index be4b4d5..6ba5e21 100644
+--- a/drivers/gpu/drm/i915/intel_panel.c
++++ b/drivers/gpu/drm/i915/intel_panel.c
+@@ -34,6 +34,7 @@
+ #include <linux/moduleparam.h>
+ #include <linux/pwm.h>
+ #include "intel_drv.h"
++#include "intel_ipts.h"
+
+ #define CRC_PMIC_PWM_PERIOD_NS 21333
+
+@@ -714,6 +715,9 @@ static void lpt_disable_backlight(struct intel_connector *connector)
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ u32 tmp;
+
++ if (INTEL_GEN(connector->base.dev) >= 9 && i915.enable_guc_submission)
++ intel_ipts_notify_backlight_status(false);
++
+ intel_panel_actually_set_backlight(connector, 0);
+
+ /*
+@@ -883,6 +887,9 @@ static void lpt_enable_backlight(struct intel_connector *connector)
+
+ /* This won't stick until the above enable. */
+ intel_panel_actually_set_backlight(connector, panel->backlight.level);
++
++ if (INTEL_GEN(connector->base.dev) >= 9 && i915.enable_guc_submission)
++ intel_ipts_notify_backlight_status(true);
+ }
+
+ static void pch_enable_backlight(struct intel_connector *connector)
+diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
+index 89e9032..3abad23 100644
+--- a/drivers/hid/hid-multitouch.c
++++ b/drivers/hid/hid-multitouch.c
+@@ -548,8 +548,12 @@ static int mt_touch_input_mapping(struct hid_device *hdev, struct hid_input *hi,
+ if (field->index >= field->report->maxfield ||
+ usage->usage_index >= field->report_count)
+ return 1;
+- td->cc_index = field->index;
+- td->cc_value_index = usage->usage_index;
++
++ if (td->cc_index < 0) {
++ td->cc_index = field->index;
++ td->cc_value_index = usage->usage_index;
++ }
++
+ return 1;
+ case HID_DG_CONTACTMAX:
+ /* we don't set td->last_slot_field as contactcount and
+@@ -842,7 +846,9 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,
+ field->application != HID_DG_PEN &&
+ field->application != HID_DG_TOUCHPAD &&
+ field->application != HID_GD_KEYBOARD &&
+- field->application != HID_CP_CONSUMER_CONTROL)
++ field->application != HID_CP_CONSUMER_CONTROL &&
++ field->application != HID_GD_MOUSE &&
++ field->logical != HID_DG_TOUCHSCREEN)
+ return -1;
+
+ /*
+@@ -1023,6 +1029,10 @@ static int mt_input_configured(struct hid_device *hdev, struct hid_input *hi)
+ suffix = "Pen";
+ /* force BTN_STYLUS to allow tablet matching in udev */
+ __set_bit(BTN_STYLUS, hi->input->keybit);
++ } else if (hi->report->field[0]->logical == HID_DG_TOUCHSCREEN) {
++ suffix = "SingleTouch";
++ /* force BTN_STYLUS to allow tablet matching in udev */
++ __set_bit(BTN_STYLUS, hi->input->keybit);
+ } else {
+ switch (field->application) {
+ case HID_GD_KEYBOARD:
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 64971ba..88132a2 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -773,6 +773,7 @@ source "drivers/misc/ti-st/Kconfig"
+ source "drivers/misc/lis3lv02d/Kconfig"
+ source "drivers/misc/altera-stapl/Kconfig"
+ source "drivers/misc/mei/Kconfig"
++source "drivers/misc/ipts/Kconfig"
+ source "drivers/misc/vmw_vmci/Kconfig"
+ source "drivers/misc/mic/Kconfig"
+ source "drivers/misc/genwqe/Kconfig"
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index 3198336..7760d02 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -44,6 +44,7 @@ obj-y += lis3lv02d/
+ obj-$(CONFIG_USB_SWITCH_FSA9480) += fsa9480.o
+ obj-$(CONFIG_ALTERA_STAPL) +=altera-stapl/
+ obj-$(CONFIG_INTEL_MEI) += mei/
++obj-$(CONFIG_INTEL_IPTS) += ipts/
+ obj-$(CONFIG_VMWARE_VMCI) += vmw_vmci/
+ obj-$(CONFIG_LATTICE_ECP3_CONFIG) += lattice-ecp3-config.o
+ obj-$(CONFIG_SRAM) += sram.o
+diff --git a/drivers/misc/ipts/Kconfig b/drivers/misc/ipts/Kconfig
+new file mode 100644
+index 0000000..360ed38
+--- /dev/null
++++ b/drivers/misc/ipts/Kconfig
+@@ -0,0 +1,9 @@
++config INTEL_IPTS
++ tristate "Intel Precise Touch & Stylus"
++ select INTEL_MEI
++ depends on X86 && PCI && HID
++ help
++ Intel Precise Touch & Stylus support
++ Supported SoCs:
++ Intel Skylake
++ Intel Kabylake
+diff --git a/drivers/misc/ipts/Makefile b/drivers/misc/ipts/Makefile
+new file mode 100644
+index 0000000..1783e9c
+--- /dev/null
++++ b/drivers/misc/ipts/Makefile
+@@ -0,0 +1,13 @@
++#
++# Makefile - Intel Precise Touch & Stylus device driver
++# Copyright (c) 2016, Intel Corporation.
++#
++
++obj-$(CONFIG_INTEL_IPTS)+= intel-ipts.o
++intel-ipts-objs += ipts-mei.o
++intel-ipts-objs += ipts-hid.o
++intel-ipts-objs += ipts-msg-handler.o
++intel-ipts-objs += ipts-kernel.o
++intel-ipts-objs += ipts-resource.o
++intel-ipts-objs += ipts-gfx.o
++intel-ipts-$(CONFIG_DEBUG_FS) += ipts-dbgfs.o
+diff --git a/drivers/misc/ipts/ipts-binary-spec.h b/drivers/misc/ipts/ipts-binary-spec.h
+new file mode 100644
+index 0000000..87d4bc4
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-binary-spec.h
+@@ -0,0 +1,118 @@
++/*
++ *
++ * Intel Precise Touch & Stylus binary spec
++ * Copyright (c) 2016 Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ */
++
++#ifndef _IPTS_BINARY_SPEC_H
++#define _IPTS_BINARY_SPEC_H
++
++#define IPTS_BIN_HEADER_VERSION 2
++
++#pragma pack(1)
++
++/* we support 16 output buffers(1:feedback, 15:HID) */
++#define MAX_NUM_OUTPUT_BUFFERS 16
++
++typedef enum {
++ IPTS_BIN_KERNEL,
++ IPTS_BIN_RO_DATA,
++ IPTS_BIN_RW_DATA,
++ IPTS_BIN_SENSOR_FRAME,
++ IPTS_BIN_OUTPUT,
++ IPTS_BIN_DYNAMIC_STATE_HEAP,
++ IPTS_BIN_PATCH_LOCATION_LIST,
++ IPTS_BIN_ALLOCATION_LIST,
++ IPTS_BIN_COMMAND_BUFFER_PACKET,
++ IPTS_BIN_TAG,
++} ipts_bin_res_type_t;
++
++typedef struct ipts_bin_header {
++ char str[4];
++ unsigned int version;
++
++#if IPTS_BIN_HEADER_VERSION > 1
++ unsigned int gfxcore;
++ unsigned int revid;
++#endif
++} ipts_bin_header_t;
++
++typedef struct ipts_bin_alloc {
++ unsigned int handle;
++ unsigned int reserved;
++} ipts_bin_alloc_t;
++
++typedef struct ipts_bin_alloc_list {
++ unsigned int num;
++ ipts_bin_alloc_t alloc[];
++} ipts_bin_alloc_list_t;
++
++typedef struct ipts_bin_cmdbuf {
++ unsigned int size;
++ char data[];
++} ipts_bin_cmdbuf_t;
++
++typedef struct ipts_bin_res {
++ unsigned int handle;
++ ipts_bin_res_type_t type;
++ unsigned int initialize;
++ unsigned int aligned_size;
++ unsigned int size;
++ char data[];
++} ipts_bin_res_t;
++
++typedef enum {
++ IPTS_INPUT,
++ IPTS_OUTPUT,
++ IPTS_CONFIGURATION,
++ IPTS_CALIBRATION,
++ IPTS_FEATURE,
++} ipts_bin_io_buffer_type_t;
++
++typedef struct ipts_bin_io_header {
++ char str[10];
++ unsigned short type;
++} ipts_bin_io_header_t;
++
++typedef struct ipts_bin_res_list {
++ unsigned int num;
++ ipts_bin_res_t res[];
++} ipts_bin_res_list_t;
++
++typedef struct ipts_bin_patch {
++ unsigned int index;
++ unsigned int reserved1[2];
++ unsigned int alloc_offset;
++ unsigned int patch_offset;
++ unsigned int reserved2;
++} ipts_bin_patch_t;
++
++typedef struct ipts_bin_patch_list {
++ unsigned int num;
++ ipts_bin_patch_t patch[];
++} ipts_bin_patch_list_t;
++
++typedef struct ipts_bin_guc_wq_info {
++ unsigned int batch_offset;
++ unsigned int size;
++ char data[];
++} ipts_bin_guc_wq_info_t;
++
++typedef struct ipts_bin_bufid_patch {
++ unsigned int imm_offset;
++ unsigned int mem_offset;
++} ipts_bin_bufid_patch_t;
++
++#pragma pack()
++
++#endif /* _IPTS_BINARY_SPEC_H */
+diff --git a/drivers/misc/ipts/ipts-dbgfs.c b/drivers/misc/ipts/ipts-dbgfs.c
+new file mode 100644
+index 0000000..1c5c92f
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-dbgfs.c
+@@ -0,0 +1,152 @@
++/*
++ * Intel Precise Touch & Stylus device driver
++ * Copyright (c) 2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ */
++#include <linux/debugfs.h>
++#include <linux/ctype.h>
++#include <linux/uaccess.h>
++
++#include "ipts.h"
++#include "ipts-sensor-regs.h"
++#include "ipts-msg-handler.h"
++#include "ipts-state.h"
++
++const char sensor_mode_fmt[] = "sensor mode : %01d\n";
++const char ipts_status_fmt[] = "sensor mode : %01d\nipts state : %01d\n";
++
++static ssize_t ipts_dbgfs_mode_read(struct file *fp, char __user *ubuf,
++ size_t cnt, loff_t *ppos)
++{
++ ipts_info_t *ipts = fp->private_data;
++ char mode[80];
++ int len = 0;
++
++ if (cnt < sizeof(sensor_mode_fmt) - 3)
++ return -EINVAL;
++
++ len = scnprintf(mode, 80, sensor_mode_fmt, ipts->sensor_mode);
++ if (len < 0)
++ return -EIO;
++
++ return simple_read_from_buffer(ubuf, cnt, ppos, mode, len);
++}
++
++static ssize_t ipts_dbgfs_mode_write(struct file *fp, const char __user *ubuf,
++ size_t cnt, loff_t *ppos)
++{
++ ipts_info_t *ipts = fp->private_data;
++ ipts_state_t state;
++ int sensor_mode, len;
++ char mode[3];
++
++ if (cnt == 0 || cnt > 3)
++ return -EINVAL;
++
++ state = ipts_get_state(ipts);
++ if (state != IPTS_STA_RAW_DATA_STARTED && state != IPTS_STA_HID_STARTED) {
++ return -EIO;
++ }
++
++ len = cnt;
++ if (copy_from_user(mode, ubuf, len))
++ return -EFAULT;
++
++ while(len > 0 && (isspace(mode[len-1]) || mode[len-1] == '\n'))
++ len--;
++ mode[len] = '\0';
++
++ if (sscanf(mode, "%d", &sensor_mode) != 1)
++ return -EINVAL;
++
++ if (sensor_mode != TOUCH_SENSOR_MODE_RAW_DATA &&
++ sensor_mode != TOUCH_SENSOR_MODE_HID) {
++ return -EINVAL;
++ }
++
++ if (sensor_mode == ipts->sensor_mode)
++ return 0;
++
++ ipts_switch_sensor_mode(ipts, sensor_mode);
++
++ return cnt;
++}
++
++static const struct file_operations ipts_mode_dbgfs_fops = {
++ .open = simple_open,
++ .read = ipts_dbgfs_mode_read,
++ .write = ipts_dbgfs_mode_write,
++ .llseek = generic_file_llseek,
++};
++
++static ssize_t ipts_dbgfs_status_read(struct file *fp, char __user *ubuf,
++ size_t cnt, loff_t *ppos)
++{
++ ipts_info_t *ipts = fp->private_data;
++ char status[256];
++ int len = 0;
++
++ if (cnt < sizeof(ipts_status_fmt) - 3)
++ return -EINVAL;
++
++ len = scnprintf(status, 256, ipts_status_fmt, ipts->sensor_mode,
++ ipts->state);
++ if (len < 0)
++ return -EIO;
++
++ return simple_read_from_buffer(ubuf, cnt, ppos, status, len);
++}
++
++static const struct file_operations ipts_status_dbgfs_fops = {
++ .open = simple_open,
++ .read = ipts_dbgfs_status_read,
++ .llseek = generic_file_llseek,
++};
++
++void ipts_dbgfs_deregister(ipts_info_t* ipts)
++{
++ if (!ipts->dbgfs_dir)
++ return;
++
++ debugfs_remove_recursive(ipts->dbgfs_dir);
++ ipts->dbgfs_dir = NULL;
++}
++
++int ipts_dbgfs_register(ipts_info_t* ipts, const char *name)
++{
++ struct dentry *dir, *f;
++
++ dir = debugfs_create_dir(name, NULL);
++ if (!dir)
++ return -ENOMEM;
++
++ f = debugfs_create_file("mode", S_IRUSR | S_IWUSR, dir,
++ ipts, &ipts_mode_dbgfs_fops);
++ if (!f) {
++ ipts_err(ipts, "debugfs mode creation failed\n");
++ goto err;
++ }
++
++ f = debugfs_create_file("status", S_IRUSR, dir,
++ ipts, &ipts_status_dbgfs_fops);
++ if (!f) {
++ ipts_err(ipts, "debugfs status creation failed\n");
++ goto err;
++ }
++
++ ipts->dbgfs_dir = dir;
++
++ return 0;
++err:
++ ipts_dbgfs_deregister(ipts);
++ return -ENODEV;
++}
+diff --git a/drivers/misc/ipts/ipts-gfx.c b/drivers/misc/ipts/ipts-gfx.c
+new file mode 100644
+index 0000000..5172777
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-gfx.c
+@@ -0,0 +1,184 @@
++/*
++ *
++ * Intel Integrated Touch Gfx Interface Layer
++ * Copyright (c) 2016 Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ */
++#include <linux/kthread.h>
++#include <linux/delay.h>
++#include <linux/intel_ipts_if.h>
++
++#include "ipts.h"
++#include "ipts-msg-handler.h"
++#include "ipts-state.h"
++
++static void gfx_processing_complete(void *data)
++{
++ ipts_info_t *ipts = data;
++
++ if (ipts_get_state(ipts) == IPTS_STA_RAW_DATA_STARTED) {
++ schedule_work(&ipts->raw_data_work);
++ return;
++ }
++
++ ipts_dbg(ipts, "not ready to handle gfx event\n");
++}
++
++static void notify_gfx_status(u32 status, void *data)
++{
++ ipts_info_t *ipts = data;
++
++ ipts->gfx_status = status;
++ schedule_work(&ipts->gfx_status_work);
++}
++
++static int connect_gfx(ipts_info_t *ipts)
++{
++ int ret = 0;
++ intel_ipts_connect_t ipts_connect;
++
++ ipts_connect.if_version = IPTS_INTERFACE_V1;
++ ipts_connect.ipts_cb.workload_complete = gfx_processing_complete;
++ ipts_connect.ipts_cb.notify_gfx_status = notify_gfx_status;
++ ipts_connect.data = (void*)ipts;
++
++ ret = intel_ipts_connect(&ipts_connect);
++ if (ret)
++ return ret;
++
++ /* TODO: gfx version check */
++ ipts->gfx_info.gfx_handle = ipts_connect.gfx_handle;
++ ipts->gfx_info.ipts_ops = ipts_connect.ipts_ops;
++
++ return ret;
++}
++
++static void disconnect_gfx(ipts_info_t *ipts)
++{
++ intel_ipts_disconnect(ipts->gfx_info.gfx_handle);
++}
++
++#ifdef RUN_DBG_THREAD
++#include "../mei/mei_dev.h"
++
++static struct task_struct *dbg_thread;
++
++static void ipts_print_dbg_info(ipts_info_t* ipts)
++{
++ char fw_sts_str[MEI_FW_STATUS_STR_SZ];
++ u32 *db, *head, *tail;
++ intel_ipts_wq_info_t* wq_info;
++
++ wq_info = &ipts->resource.wq_info;
++
++ mei_fw_status_str(ipts->cldev->bus, fw_sts_str, MEI_FW_STATUS_STR_SZ);
++ pr_info(">> tdt : fw status : %s\n", fw_sts_str);
++
++ db = (u32*)wq_info->db_addr;
++ head = (u32*)wq_info->wq_head_addr;
++ tail = (u32*)wq_info->wq_tail_addr;
++ pr_info(">> == DB s:%x, c:%x ==\n", *db, *(db+1));
++ pr_info(">> == WQ h:%u, t:%u ==\n", *head, *tail);
++}
++
++static int ipts_dbg_thread(void *data)
++{
++ ipts_info_t *ipts = (ipts_info_t *)data;
++
++ pr_info(">> start debug thread\n");
++
++ while (!kthread_should_stop()) {
++ if (ipts_get_state(ipts) != IPTS_STA_RAW_DATA_STARTED) {
++ pr_info("state is not IPTS_STA_RAW_DATA_STARTED : %d\n",
++ ipts_get_state(ipts));
++ msleep(5000);
++ continue;
++ }
++
++ ipts_print_dbg_info(ipts);
++
++ msleep(3000);
++ }
++
++ return 0;
++}
++#endif
++
++int ipts_open_gpu(ipts_info_t *ipts)
++{
++ int ret = 0;
++
++ ret = connect_gfx(ipts);
++ if (ret) {
++ ipts_dbg(ipts, "cannot connect GPU\n");
++ return ret;
++ }
++
++ ret = ipts->gfx_info.ipts_ops.get_wq_info(ipts->gfx_info.gfx_handle,
++ &ipts->resource.wq_info);
++ if (ret) {
++ ipts_dbg(ipts, "error in get_wq_info\n");
++ return ret;
++ }
++
++#ifdef RUN_DBG_THREAD
++ dbg_thread = kthread_run(ipts_dbg_thread, (void *)ipts, "ipts_debug");
++#endif
++
++ return 0;
++}
++
++void ipts_close_gpu(ipts_info_t *ipts)
++{
++ disconnect_gfx(ipts);
++
++#ifdef RUN_DBG_THREAD
++ kthread_stop(dbg_thread);
++#endif
++}
++
++intel_ipts_mapbuffer_t *ipts_map_buffer(ipts_info_t *ipts, u32 size, u32 flags)
++{
++ intel_ipts_mapbuffer_t *buf;
++ u64 handle;
++ int ret;
++
++ buf = devm_kzalloc(&ipts->cldev->dev, sizeof(*buf), GFP_KERNEL);
++ if (!buf)
++ return NULL;
++
++ buf->size = size;
++ buf->flags = flags;
++
++ handle = ipts->gfx_info.gfx_handle;
++ ret = ipts->gfx_info.ipts_ops.map_buffer(handle, buf);
++ if (ret) {
++ devm_kfree(&ipts->cldev->dev, buf);
++ return NULL;
++ }
++
++ return buf;
++}
++
++void ipts_unmap_buffer(ipts_info_t *ipts, intel_ipts_mapbuffer_t *buf)
++{
++ u64 handle;
++ int ret;
++
++ if (!buf)
++ return;
++
++ handle = ipts->gfx_info.gfx_handle;
++ ret = ipts->gfx_info.ipts_ops.unmap_buffer(handle, buf->buf_handle);
++
++ devm_kfree(&ipts->cldev->dev, buf);
++}
+diff --git a/drivers/misc/ipts/ipts-gfx.h b/drivers/misc/ipts/ipts-gfx.h
+new file mode 100644
+index 0000000..03a5f35
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-gfx.h
+@@ -0,0 +1,24 @@
++/*
++ * Intel Precise Touch & Stylus gpu wrapper
++ * Copyright (c) 2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ */
++
++
++#ifndef _IPTS_GFX_H_
++#define _IPTS_GFX_H_
++
++int ipts_open_gpu(ipts_info_t *ipts);
++void ipts_close_gpu(ipts_info_t *ipts);
++intel_ipts_mapbuffer_t *ipts_map_buffer(ipts_info_t *ipts, u32 size, u32 flags);
++void ipts_unmap_buffer(ipts_info_t *ipts, intel_ipts_mapbuffer_t *buf);
++
++#endif // _IPTS_GFX_H_
+diff --git a/drivers/misc/ipts/ipts-hid.c b/drivers/misc/ipts/ipts-hid.c
+new file mode 100644
+index 0000000..cc3ad0d
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-hid.c
+@@ -0,0 +1,455 @@
++/*
++ * Intel Precise Touch & Stylus HID driver
++ *
++ * Copyright (c) 2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ */
++
++#include <linux/module.h>
++#include <linux/firmware.h>
++#include <linux/hid.h>
++#include <linux/vmalloc.h>
++
++#include "ipts.h"
++#include "ipts-resource.h"
++#include "ipts-sensor-regs.h"
++#include "ipts-msg-handler.h"
++
++#define BUS_MEI 0x44
++
++#define HID_DESC_INTEL "intel/ipts/intel_desc.bin"
++#define HID_DESC_VENDOR "intel/ipts/vendor_desc.bin"
++MODULE_FIRMWARE(HID_DESC_INTEL);
++MODULE_FIRMWARE(HID_DESC_VENDOR);
++
++typedef enum output_buffer_payload_type {
++ OUTPUT_BUFFER_PAYLOAD_ERROR = 0,
++ OUTPUT_BUFFER_PAYLOAD_HID_INPUT_REPORT,
++ OUTPUT_BUFFER_PAYLOAD_HID_FEATURE_REPORT,
++ OUTPUT_BUFFER_PAYLOAD_KERNEL_LOAD,
++ OUTPUT_BUFFER_PAYLOAD_FEEDBACK_BUFFER
++} output_buffer_payload_type_t;
++
++typedef struct kernel_output_buffer_header {
++ u16 length;
++ u8 payload_type;
++ u8 reserved1;
++ touch_hid_private_data_t hid_private_data;
++ u8 reserved2[28];
++ u8 data[0];
++} kernel_output_buffer_header_t;
++
++typedef struct kernel_output_payload_error {
++ u16 severity;
++ u16 source;
++ u8 code[4];
++ char string[128];
++} kernel_output_payload_error_t;
++
++static int ipts_hid_get_hid_descriptor(ipts_info_t *ipts, u8 **desc, int *size)
++{
++ u8 *buf;
++ int hid_size = 0, ret = 0;
++ const struct firmware *intel_desc = NULL;
++ const struct firmware *vendor_desc = NULL;
++ const char *intel_desc_path = HID_DESC_INTEL;
++ const char *vendor_desc_path = HID_DESC_VENDOR;
++
++ ret = request_firmware(&intel_desc, intel_desc_path, &ipts->cldev->dev);
++ if (ret) {
++ goto no_hid;
++ }
++ hid_size = intel_desc->size;
++
++ ret = request_firmware(&vendor_desc, vendor_desc_path, &ipts->cldev->dev);
++ if (ret) {
++ ipts_dbg(ipts, "error in reading HID Vendor Descriptor\n");
++ } else {
++ hid_size += vendor_desc->size;
++ }
++
++ ipts_dbg(ipts, "hid size = %d\n", hid_size);
++ buf = vmalloc(hid_size);
++ if (buf == NULL) {
++ ret = -ENOMEM;
++ goto no_mem;
++ }
++
++ memcpy(buf, intel_desc->data, intel_desc->size);
++ if (vendor_desc) {
++ memcpy(&buf[intel_desc->size], vendor_desc->data,
++ vendor_desc->size);
++ release_firmware(vendor_desc);
++ }
++
++ release_firmware(intel_desc);
++
++ *desc = buf;
++ *size = hid_size;
++
++ return 0;
++no_mem :
++ if (vendor_desc)
++ release_firmware(vendor_desc);
++ release_firmware(intel_desc);
++
++no_hid :
++ return ret;
++}
++
++static int ipts_hid_parse(struct hid_device *hid)
++{
++ ipts_info_t *ipts = hid->driver_data;
++ int ret = 0, size;
++ u8 *buf;
++
++ ipts_dbg(ipts, "ipts_hid_parse() start\n");
++ ret = ipts_hid_get_hid_descriptor(ipts, &buf, &size);
++ if (ret != 0) {
++ ipts_dbg(ipts, "ipts_hid_ipts_get_hid_descriptor ret %d\n", ret);
++ return -EIO;
++ }
++
++ ret = hid_parse_report(hid, buf, size);
++ vfree(buf);
++ if (ret) {
++ ipts_err(ipts, "hid_parse_report error : %d\n", ret);
++ goto out;
++ }
++
++ ipts->hid_desc_ready = true;
++out:
++ return ret;
++}
++
++static int ipts_hid_start(struct hid_device *hid)
++{
++ return 0;
++}
++
++static void ipts_hid_stop(struct hid_device *hid)
++{
++ return;
++}
++
++static int ipts_hid_open(struct hid_device *hid)
++{
++ return 0;
++}
++
++static void ipts_hid_close(struct hid_device *hid)
++{
++ ipts_info_t *ipts = hid->driver_data;
++
++ ipts->hid_desc_ready = false;
++
++ return;
++}
++
++static int ipts_hid_send_hid2me_feedback(ipts_info_t *ipts, u32 fb_data_type,
++ __u8 *buf, size_t count)
++{
++ ipts_buffer_info_t *fb_buf;
++ touch_feedback_hdr_t *feedback;
++ u8 *payload;
++ int header_size;
++ ipts_state_t state;
++
++ header_size = sizeof(touch_feedback_hdr_t);
++
++ if (count > ipts->resource.hid2me_buffer_size - header_size)
++ return -EINVAL;
++
++ state = ipts_get_state(ipts);
++ if (state != IPTS_STA_RAW_DATA_STARTED && state != IPTS_STA_HID_STARTED)
++ return 0;
++
++ fb_buf = ipts_get_hid2me_buffer(ipts);
++ feedback = (touch_feedback_hdr_t *)fb_buf->addr;
++ payload = fb_buf->addr + header_size;
++ memset(feedback, 0, header_size);
++
++ feedback->feedback_data_type = fb_data_type;
++ feedback->feedback_cmd_type = TOUCH_FEEDBACK_CMD_TYPE_NONE;
++ feedback->payload_size_bytes = count;
++ feedback->buffer_id = TOUCH_HID_2_ME_BUFFER_ID;
++ feedback->protocol_ver = 0;
++ feedback->reserved[0] = 0xAC;
++
++ /* copy payload */
++ memcpy(payload, buf, count);
++
++ ipts_send_feedback(ipts, TOUCH_HID_2_ME_BUFFER_ID, 0);
++
++ return 0;
++}
++
++static int ipts_hid_raw_request(struct hid_device *hid,
++ unsigned char report_number, __u8 *buf,
++ size_t count, unsigned char report_type,
++ int reqtype)
++{
++ ipts_info_t *ipts = hid->driver_data;
++ u32 fb_data_type;
++
++ ipts_dbg(ipts, "hid raw request => report %d, request %d\n",
++ (int)report_type, reqtype);
++
++ if (report_type != HID_FEATURE_REPORT)
++ return 0;
++
++ switch (reqtype) {
++ case HID_REQ_GET_REPORT:
++ fb_data_type = TOUCH_FEEDBACK_DATA_TYPE_GET_FEATURES;
++ break;
++ case HID_REQ_SET_REPORT:
++ fb_data_type = TOUCH_FEEDBACK_DATA_TYPE_SET_FEATURES;
++ break;
++ default:
++ ipts_err(ipts, "raw request not supprted: %d\n", reqtype);
++ return -EIO;
++ }
++
++ return ipts_hid_send_hid2me_feedback(ipts, fb_data_type, buf, count);
++}
++
++static int ipts_hid_output_report(struct hid_device *hid,
++ __u8 *buf, size_t count)
++{
++ ipts_info_t *ipts = hid->driver_data;
++ u32 fb_data_type;
++
++ ipts_dbg(ipts, "hid output report\n");
++
++ fb_data_type = TOUCH_FEEDBACK_DATA_TYPE_OUTPUT_REPORT;
++
++ return ipts_hid_send_hid2me_feedback(ipts, fb_data_type, buf, count);
++}
++
++static struct hid_ll_driver ipts_hid_ll_driver = {
++ .parse = ipts_hid_parse,
++ .start = ipts_hid_start,
++ .stop = ipts_hid_stop,
++ .open = ipts_hid_open,
++ .close = ipts_hid_close,
++ .raw_request = ipts_hid_raw_request,
++ .output_report = ipts_hid_output_report,
++};
++
++int ipts_hid_init(ipts_info_t *ipts)
++{
++ int ret = 0;
++ struct hid_device *hid;
++
++ hid = hid_allocate_device();
++ if (IS_ERR(hid)) {
++ ret = PTR_ERR(hid);
++ goto err_dev;
++ }
++
++ hid->driver_data = ipts;
++ hid->ll_driver = &ipts_hid_ll_driver;
++ hid->dev.parent = &ipts->cldev->dev;
++ hid->bus = BUS_MEI;
++ hid->version = ipts->device_info.fw_rev;
++ hid->vendor = ipts->device_info.vendor_id;
++ hid->product = ipts->device_info.device_id;
++
++ snprintf(hid->phys, sizeof(hid->phys), "heci3");
++ snprintf(hid->name, sizeof(hid->name),
++ "%s %04hX:%04hX", "ipts", hid->vendor, hid->product);
++
++ ret = hid_add_device(hid);
++ if (ret) {
++ if (ret != -ENODEV)
++ ipts_err(ipts, "can't add hid device: %d\n", ret);
++ goto err_mem_free;
++ }
++
++ ipts->hid = hid;
++
++ return 0;
++
++err_mem_free:
++ hid_destroy_device(hid);
++err_dev:
++ return ret;
++}
++
++void ipts_hid_release(ipts_info_t *ipts)
++{
++ struct hid_device *hid = ipts->hid;
++ hid_destroy_device(hid);
++}
++
++int ipts_handle_hid_data(ipts_info_t *ipts,
++ touch_sensor_hid_ready_for_data_rsp_data_t *hid_rsp)
++{
++ touch_raw_data_hdr_t *raw_header;
++ ipts_buffer_info_t *buffer_info;
++ touch_feedback_hdr_t *feedback;
++ u8 *raw_data;
++ int touch_data_buffer_index;
++ int transaction_id;
++ int ret = 0;
++
++ touch_data_buffer_index = (int)hid_rsp->touch_data_buffer_index;
++ buffer_info = ipts_get_touch_data_buffer_hid(ipts);
++ raw_header = (touch_raw_data_hdr_t *)buffer_info->addr;
++ transaction_id = raw_header->hid_private_data.transaction_id;
++
++ raw_data = (u8*)raw_header + sizeof(touch_raw_data_hdr_t);
++ if (raw_header->data_type == TOUCH_RAW_DATA_TYPE_HID_REPORT) {
++ memcpy(ipts->hid_input_report, raw_data,
++ raw_header->raw_data_size_bytes);
++
++ ret = hid_input_report(ipts->hid, HID_INPUT_REPORT,
++ (u8*)ipts->hid_input_report,
++ raw_header->raw_data_size_bytes, 1);
++ if (ret) {
++ ipts_err(ipts, "error in hid_input_report : %d\n", ret);
++ }
++ } else if (raw_header->data_type == TOUCH_RAW_DATA_TYPE_GET_FEATURES) {
++ /* TODO: implement together with "get feature ioctl" */
++ } else if (raw_header->data_type == TOUCH_RAW_DATA_TYPE_ERROR) {
++ touch_error_t *touch_err = (touch_error_t *)raw_data;
++
++ ipts_err(ipts, "error type : %d, me fw error : %x, err reg : %x\n",
++ touch_err->touch_error_type,
++ touch_err->touch_me_fw_error.value,
++ touch_err->touch_error_register.reg_value);
++ }
++
++ /* send feedback data for HID mode */
++ buffer_info = ipts_get_feedback_buffer(ipts, touch_data_buffer_index);
++ feedback = (touch_feedback_hdr_t *)buffer_info->addr;
++ memset(feedback, 0, sizeof(touch_feedback_hdr_t));
++ feedback->feedback_cmd_type = TOUCH_FEEDBACK_CMD_TYPE_NONE;
++ feedback->payload_size_bytes = 0;
++ feedback->buffer_id = touch_data_buffer_index;
++ feedback->protocol_ver = 0;
++ feedback->reserved[0] = 0xAC;
++
++ ret = ipts_send_feedback(ipts, touch_data_buffer_index, transaction_id);
++
++ return ret;
++}
++
++static int handle_outputs(ipts_info_t *ipts, int parallel_idx)
++{
++ kernel_output_buffer_header_t *out_buf_hdr;
++ ipts_buffer_info_t *output_buf, *fb_buf = NULL;
++ u8 *input_report, *payload;
++ u32 transaction_id;
++ int i, payload_size, ret = 0, header_size;
++
++ header_size = sizeof(kernel_output_buffer_header_t);
++ output_buf = ipts_get_output_buffers_by_parallel_id(ipts, parallel_idx);
++ for (i = 0; i < ipts->resource.num_of_outputs; i++) {
++ out_buf_hdr = (kernel_output_buffer_header_t*)output_buf[i].addr;
++ if (out_buf_hdr->length < header_size)
++ continue;
++
++ payload_size = out_buf_hdr->length - header_size;
++ payload = out_buf_hdr->data;
++
++ switch(out_buf_hdr->payload_type) {
++ case OUTPUT_BUFFER_PAYLOAD_HID_INPUT_REPORT:
++ input_report = ipts->hid_input_report;
++ memcpy(input_report, payload, payload_size);
++ hid_input_report(ipts->hid, HID_INPUT_REPORT,
++ input_report, payload_size, 1);
++ break;
++ case OUTPUT_BUFFER_PAYLOAD_HID_FEATURE_REPORT:
++ ipts_dbg(ipts, "output hid feature report\n");
++ break;
++ case OUTPUT_BUFFER_PAYLOAD_KERNEL_LOAD:
++ ipts_dbg(ipts, "output kernel load\n");
++ break;
++ case OUTPUT_BUFFER_PAYLOAD_FEEDBACK_BUFFER:
++ {
++ /* send feedback data for raw data mode */
++ fb_buf = ipts_get_feedback_buffer(ipts,
++ parallel_idx);
++ transaction_id = out_buf_hdr->
++ hid_private_data.transaction_id;
++ memcpy(fb_buf->addr, payload, payload_size);
++ break;
++ }
++ case OUTPUT_BUFFER_PAYLOAD_ERROR:
++ {
++ kernel_output_payload_error_t *err_payload;
++
++ if (payload_size == 0)
++ break;
++
++ err_payload =
++ (kernel_output_payload_error_t*)payload;
++
++ ipts_err(ipts, "error : severity : %d,"
++ " source : %d,"
++ " code : %d:%d:%d:%d\n"
++ "string %s\n",
++ err_payload->severity,
++ err_payload->source,
++ err_payload->code[0],
++ err_payload->code[1],
++ err_payload->code[2],
++ err_payload->code[3],
++ err_payload->string);
++
++ break;
++ }
++ default:
++ ipts_err(ipts, "invalid output buffer payload\n");
++ break;
++ }
++ }
++
++ if (fb_buf) {
++ ret = ipts_send_feedback(ipts, parallel_idx, transaction_id);
++ if (ret)
++ return ret;
++ }
++
++ return 0;
++}
++
++static int handle_output_buffers(ipts_info_t *ipts, int cur_idx, int end_idx)
++{
++ int max_num_of_buffers = ipts_get_num_of_parallel_buffers(ipts);
++
++ do {
++ cur_idx++; /* cur_idx has last completed so starts with +1 */
++ cur_idx %= max_num_of_buffers;
++ handle_outputs(ipts, cur_idx);
++ } while (cur_idx != end_idx);
++
++ return 0;
++}
++
++int ipts_handle_processed_data(ipts_info_t *ipts)
++{
++ int ret = 0;
++ int current_buffer_idx;
++ int last_buffer_idx;
++
++ current_buffer_idx = *ipts->last_submitted_id;
++ last_buffer_idx = ipts->last_buffer_completed;
++
++ if (current_buffer_idx == last_buffer_idx)
++ return 0;
++
++ ipts->last_buffer_completed = current_buffer_idx;
++ handle_output_buffers(ipts, last_buffer_idx, current_buffer_idx);
++
++ return ret;
++}
+diff --git a/drivers/misc/ipts/ipts-hid.h b/drivers/misc/ipts/ipts-hid.h
+new file mode 100644
+index 0000000..f1b22c9
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-hid.h
+@@ -0,0 +1,34 @@
++/*
++ * Intel Precise Touch & Stylus HID definition
++ *
++ * Copyright (c) 2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ */
++
++#ifndef _IPTS_HID_H_
++#define _IPTS_HID_H_
++
++#define BUS_MEI 0x44
++
++#if 0 /* TODO : we have special report ID. will implement them */
++#define WRITE_CHANNEL_REPORT_ID 0xa
++#define READ_CHANNEL_REPORT_ID 0xb
++#define CONFIG_CHANNEL_REPORT_ID 0xd
++#define VENDOR_INFO_REPORT_ID 0xF
++#define SINGLE_TOUCH_REPORT_ID 0x40
++#endif
++
++int ipts_hid_init(ipts_info_t *ipts);
++void ipts_hid_release(ipts_info_t *ipts);
++int ipts_handle_hid_data(ipts_info_t *ipts,
++ touch_sensor_hid_ready_for_data_rsp_data_t *hid_rsp);
++
++#endif /* _IPTS_HID_H_ */
+diff --git a/drivers/misc/ipts/ipts-kernel.c b/drivers/misc/ipts/ipts-kernel.c
+new file mode 100644
+index 0000000..ca5e24c
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-kernel.c
+@@ -0,0 +1,1050 @@
++#include <linux/module.h>
++#include <linux/firmware.h>
++#include <linux/vmalloc.h>
++#include <linux/intel_ipts_if.h>
++
++#include "ipts.h"
++#include "ipts-resource.h"
++#include "ipts-binary-spec.h"
++#include "ipts-state.h"
++#include "ipts-msg-handler.h"
++#include "ipts-gfx.h"
++
++#define MAX_IOCL_FILE_NAME_LEN 80
++#define MAX_IOCL_FILE_PATH_LEN 256
++
++#pragma pack(1)
++typedef struct bin_data_file_info {
++ u32 io_buffer_type;
++ u32 flags;
++ char file_name[MAX_IOCL_FILE_NAME_LEN];
++} bin_data_file_info_t;
++
++typedef struct bin_fw_info {
++ char fw_name[MAX_IOCL_FILE_NAME_LEN];
++
++ /* list of parameters to load a kernel */
++ s32 vendor_output; /* output index. -1 for no use */
++ u32 num_of_data_files;
++ bin_data_file_info_t data_file[];
++} bin_fw_info_t;
++
++typedef struct bin_fw_list {
++ u32 num_of_fws;
++ bin_fw_info_t fw_info[];
++} bin_fw_list_t;
++#pragma pack()
++
++/* OpenCL kernel */
++typedef struct bin_workload {
++ int cmdbuf_index;
++ int iobuf_input;
++ int iobuf_output[MAX_NUM_OUTPUT_BUFFERS];
++} bin_workload_t;
++
++typedef struct bin_buffer {
++ unsigned int handle;
++ intel_ipts_mapbuffer_t *buf;
++ bool no_unmap; /* only releasing vendor kernel unmaps output buffers */
++} bin_buffer_t;
++
++typedef struct bin_alloc_info {
++ bin_buffer_t *buffs;
++ int num_of_allocations;
++ int num_of_outputs;
++
++ int num_of_buffers;
++} bin_alloc_info_t;
++
++typedef struct bin_guc_wq_item {
++ unsigned int batch_offset;
++ unsigned int size;
++ char data[];
++} bin_guc_wq_item_t;
++
++typedef struct bin_kernel_info {
++ bin_workload_t *wl;
++ bin_alloc_info_t *alloc_info;
++ bin_guc_wq_item_t *guc_wq_item;
++ ipts_bin_bufid_patch_t bufid_patch;
++
++ bool is_vendor; /* 1: vendor, 0: postprocessing */
++} bin_kernel_info_t;
++
++typedef struct bin_kernel_list {
++ intel_ipts_mapbuffer_t *bufid_buf;
++ int num_of_kernels;
++ bin_kernel_info_t kernels[];
++} bin_kernel_list_t;
++
++typedef struct bin_parse_info {
++ u8 *data;
++ int size;
++ int parsed;
++
++ bin_fw_info_t *fw_info;
++
++ /* only used by postprocessing */
++ bin_kernel_info_t *vendor_kernel;
++ u32 interested_vendor_output; /* interested vendor output index */
++} bin_parse_info_t;
++
++#define BDW_SURFACE_BASE_ADDRESS 0x6101000e
++#define SURFACE_STATE_OFFSET_WORD 4
++#define SBA_OFFSET_BYTES 16384
++#define LASTSUBMITID_DEFAULT_VALUE -1
++
++#define IPTS_FW_PATH_FMT "intel/ipts/%s"
++#define IPTS_FW_CONFIG_FILE "intel/ipts/ipts_fw_config.bin"
++
++MODULE_FIRMWARE(IPTS_FW_CONFIG_FILE);
++
++#define IPTS_INPUT_ON ((u32)1 << IPTS_INPUT)
++#define IPTS_OUTPUT_ON ((u32)1 << IPTS_OUTPUT)
++#define IPTS_CONFIGURATION_ON ((u32)1 << IPTS_CONFIGURATION)
++#define IPTS_CALIBRATION_ON ((u32)1 << IPTS_CALIBRATION)
++#define IPTS_FEATURE_ON ((u32)1 << IPTS_FEATURE)
++
++#define DATA_FILE_FLAG_SHARE 0x00000001
++#define DATA_FILE_FLAG_ALLOC_CONTIGUOUS 0x00000002
++
++static int bin_read_fw(ipts_info_t *ipts, const char *fw_name,
++ u8* data, int size)
++{
++ const struct firmware *fw = NULL;
++ char fw_path[MAX_IOCL_FILE_PATH_LEN];
++ int ret = 0;
++
++ snprintf(fw_path, MAX_IOCL_FILE_PATH_LEN, IPTS_FW_PATH_FMT, fw_name);
++ ret = request_firmware(&fw, fw_path, &ipts->cldev->dev);
++ if (ret) {
++ ipts_err(ipts, "cannot read fw %s\n", fw_path);
++ return ret;
++ }
++
++ if (fw->size > size) {
++ ipts_dbg(ipts, "too small buffer to contain fw data\n");
++ ret = -EINVAL;
++ goto rel_return;
++ }
++
++ memcpy(data, fw->data, fw->size);
++
++rel_return:
++ release_firmware(fw);
++
++ return ret;
++}
++
++
++static bin_data_file_info_t* bin_get_data_file_info(bin_fw_info_t* fw_info,
++ u32 io_buffer_type)
++{
++ int i;
++
++ for (i = 0; i < fw_info->num_of_data_files; i++) {
++ if (fw_info->data_file[i].io_buffer_type == io_buffer_type)
++ break;
++ }
++
++ if (i == fw_info->num_of_data_files)
++ return NULL;
++
++ return &fw_info->data_file[i];
++}
++
++static inline bool is_shared_data(const bin_data_file_info_t *data_file)
++{
++ if (data_file)
++ return (!!(data_file->flags & DATA_FILE_FLAG_SHARE));
++
++ return false;
++}
++
++static inline bool is_alloc_cont_data(const bin_data_file_info_t *data_file)
++{
++ if (data_file)
++ return (!!(data_file->flags & DATA_FILE_FLAG_ALLOC_CONTIGUOUS));
++
++ return false;
++}
++
++static inline bool is_parsing_vendor_kernel(const bin_parse_info_t *parse_info)
++{
++ /* vendor_kernel == null while loading itself(vendor kernel) */
++ return parse_info->vendor_kernel == NULL;
++}
++
++static int bin_read_allocation_list(ipts_info_t *ipts,
++ bin_parse_info_t *parse_info,
++ bin_alloc_info_t *alloc_info)
++{
++ ipts_bin_alloc_list_t *alloc_list;
++ int alloc_idx, parallel_idx, num_of_parallels, buf_idx, num_of_buffers;
++ int parsed, size;
++
++ parsed = parse_info->parsed;
++ size = parse_info->size;
++
++ alloc_list = (ipts_bin_alloc_list_t *)&parse_info->data[parsed];
++
++ /* validation check */
++ if (sizeof(alloc_list->num) > size - parsed)
++ return -EINVAL;
++
++ /* read the number of aloocations */
++ parsed += sizeof(alloc_list->num);
++
++ /* validation check */
++ if (sizeof(alloc_list->alloc[0]) * alloc_list->num > size - parsed)
++ return -EINVAL;
++
++ num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
++ num_of_buffers = num_of_parallels * alloc_list->num + num_of_parallels;
++
++ alloc_info->buffs = vmalloc(sizeof(bin_buffer_t) * num_of_buffers);
++ if (alloc_info->buffs == NULL)
++ return -ENOMEM;
++
++ memset(alloc_info->buffs, 0, sizeof(bin_buffer_t) * num_of_buffers);
++ for (alloc_idx = 0; alloc_idx < alloc_list->num; alloc_idx++) {
++ for (parallel_idx = 0; parallel_idx < num_of_parallels;
++ parallel_idx++) {
++ buf_idx = alloc_idx + (parallel_idx * alloc_list->num);
++ alloc_info->buffs[buf_idx].handle =
++ alloc_list->alloc[alloc_idx].handle;
++
++ }
++
++ parsed += sizeof(alloc_list->alloc[0]);
++ }
++
++ parse_info->parsed = parsed;
++ alloc_info->num_of_allocations = alloc_list->num;
++ alloc_info->num_of_buffers = num_of_buffers;
++
++ ipts_dbg(ipts, "number of allocations = %d, buffers = %d\n",
++ alloc_info->num_of_allocations,
++ alloc_info->num_of_buffers);
++
++ return 0;
++}
++
++static void patch_SBA(u32 *buf_addr, u64 gpu_addr, int size)
++{
++ u64 *stateBase;
++ u64 SBA;
++ u32 inst;
++ int i;
++
++ SBA = gpu_addr + SBA_OFFSET_BYTES;
++
++ for (i = 0; i < size/4; i++) {
++ inst = buf_addr[i];
++ if (inst == BDW_SURFACE_BASE_ADDRESS) {
++ stateBase = (u64*)&buf_addr[i + SURFACE_STATE_OFFSET_WORD];
++ *stateBase |= SBA;
++ *stateBase |= 0x01; // enable
++ break;
++ }
++ }
++}
++
++static int bin_read_cmd_buffer(ipts_info_t *ipts,
++ bin_parse_info_t *parse_info,
++ bin_alloc_info_t *alloc_info,
++ bin_workload_t *wl)
++{
++ ipts_bin_cmdbuf_t *cmd;
++ intel_ipts_mapbuffer_t *buf;
++ int cmdbuf_idx, size, parsed, parallel_idx, num_of_parallels;
++
++ size = parse_info->size;
++ parsed = parse_info->parsed;
++
++ cmd = (ipts_bin_cmdbuf_t *)&parse_info->data[parsed];
++
++ if (sizeof(cmd->size) > size - parsed)
++ return -EINVAL;
++
++ parsed += sizeof(cmd->size);
++ if (cmd->size > size - parsed)
++ return -EINVAL;
++
++ ipts_dbg(ipts, "cmd buf size = %d\n", cmd->size);
++
++ num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
++ /* command buffers are located after the other allocations */
++ cmdbuf_idx = num_of_parallels * alloc_info->num_of_allocations;
++ for (parallel_idx = 0; parallel_idx < num_of_parallels; parallel_idx++) {
++ buf = ipts_map_buffer(ipts, cmd->size, 0);
++ if (buf == NULL)
++ return -ENOMEM;
++
++ ipts_dbg(ipts, "cmd_idx[%d] = %d, g:0x%p, c:0x%p\n", parallel_idx,
++ cmdbuf_idx, buf->gfx_addr, buf->cpu_addr);
++
++ memcpy((void *)buf->cpu_addr, &(cmd->data[0]), cmd->size);
++ patch_SBA(buf->cpu_addr, (u64)buf->gfx_addr, cmd->size);
++ alloc_info->buffs[cmdbuf_idx].buf = buf;
++ wl[parallel_idx].cmdbuf_index = cmdbuf_idx;
++
++ cmdbuf_idx++;
++ }
++
++ parsed += cmd->size;
++ parse_info->parsed = parsed;
++
++ return 0;
++}
++
++static int bin_find_alloc(ipts_info_t *ipts,
++ bin_alloc_info_t *alloc_info,
++ u32 handle)
++{
++ int i;
++
++ for (i = 0; i < alloc_info->num_of_allocations; i++) {
++ if (alloc_info->buffs[i].handle == handle)
++ return i;
++ }
++
++ return -1;
++}
++
++static intel_ipts_mapbuffer_t* bin_get_vendor_kernel_output(
++ bin_parse_info_t *parse_info,
++ int parallel_idx)
++{
++ bin_kernel_info_t *vendor = parse_info->vendor_kernel;
++ bin_alloc_info_t *alloc_info;
++ int buf_idx, vendor_output_idx;
++
++ alloc_info = vendor->alloc_info;
++ vendor_output_idx = parse_info->interested_vendor_output;
++
++ if (vendor_output_idx >= alloc_info->num_of_outputs)
++ return NULL;
++
++ buf_idx = vendor->wl[parallel_idx].iobuf_output[vendor_output_idx];
++ return alloc_info->buffs[buf_idx].buf;
++}
++
++static int bin_read_res_list(ipts_info_t *ipts,
++ bin_parse_info_t *parse_info,
++ bin_alloc_info_t *alloc_info,
++ bin_workload_t *wl)
++{
++ ipts_bin_res_list_t *res_list;
++ ipts_bin_res_t *res;
++ intel_ipts_mapbuffer_t *buf;
++ bin_data_file_info_t *data_file;
++ u8 *bin_data;
++ int i, size, parsed, parallel_idx, num_of_parallels, output_idx = -1;
++ int buf_idx, num_of_alloc;
++ u32 buf_size, flags, io_buf_type;
++ bool initialize;
++
++ parsed = parse_info->parsed;
++ size = parse_info->size;
++ bin_data = parse_info->data;
++
++ res_list = (ipts_bin_res_list_t *)&parse_info->data[parsed];
++ if (sizeof(res_list->num) > (size - parsed))
++ return -EINVAL;
++ parsed += sizeof(res_list->num);
++ num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
++
++ ipts_dbg(ipts, "number of resources %u\n", res_list->num);
++ for (i = 0; i < res_list->num; i++) {
++ initialize = false;
++ io_buf_type = 0;
++ flags = 0;
++
++ /* initial data */
++ data_file = NULL;
++
++ res = (ipts_bin_res_t *)(&(bin_data[parsed]));
++ if (sizeof(res[0]) > (size - parsed)) {
++ return -EINVAL;
++ }
++
++ ipts_dbg(ipts, "Resource(%d):handle 0x%08x type %u init %u"
++ " size %u alsigned %u\n",
++ i, res->handle, res->type, res->initialize,
++ res->size, res->aligned_size);
++ parsed += sizeof(res[0]);
++
++ if (res->initialize) {
++ if (res->size > (size - parsed)) {
++ return -EINVAL;
++ }
++ parsed += res->size;
++ }
++
++ initialize = res->initialize;
++ if (initialize && res->size > sizeof(ipts_bin_io_header_t)) {
++ ipts_bin_io_header_t *io_hdr;
++ io_hdr = (ipts_bin_io_header_t *)(&res->data[0]);
++ if (strncmp(io_hdr->str, "INTELTOUCH", 10) == 0) {
++ data_file = bin_get_data_file_info(
++ parse_info->fw_info,
++ (u32)io_hdr->type);
++ switch (io_hdr->type) {
++ case IPTS_INPUT:
++ ipts_dbg(ipts, "input detected\n");
++ io_buf_type = IPTS_INPUT_ON;
++ flags = IPTS_BUF_FLAG_CONTIGUOUS;
++ break;
++ case IPTS_OUTPUT:
++ ipts_dbg(ipts, "output detected\n");
++ io_buf_type = IPTS_OUTPUT_ON;
++ output_idx++;
++ break;
++ default:
++ if ((u32)io_hdr->type > 31) {
++ ipts_err(ipts,
++ "invalid io buffer : %u\n",
++ (u32)io_hdr->type);
++ continue;
++ }
++
++ if (is_alloc_cont_data(data_file))
++ flags = IPTS_BUF_FLAG_CONTIGUOUS;
++
++ io_buf_type = ((u32)1 << (u32)io_hdr->type);
++ ipts_dbg(ipts, "special io buffer %u\n",
++ io_hdr->type);
++ break;
++ }
++
++ initialize = false;
++ }
++ }
++
++ num_of_alloc = alloc_info->num_of_allocations;
++ buf_idx = bin_find_alloc(ipts, alloc_info, res->handle);
++ if (buf_idx == -1) {
++ ipts_dbg(ipts, "cannot find alloc info\n");
++ return -EINVAL;
++ }
++ for (parallel_idx = 0; parallel_idx < num_of_parallels;
++ parallel_idx++, buf_idx += num_of_alloc) {
++ if (!res->aligned_size)
++ continue;
++
++ if (!(parallel_idx == 0 ||
++ (io_buf_type && !is_shared_data(data_file))))
++ continue;
++
++ buf_size = res->aligned_size;
++ if (io_buf_type & IPTS_INPUT_ON) {
++ buf_size = max_t(u32,
++ ipts->device_info.frame_size,
++ buf_size);
++ wl[parallel_idx].iobuf_input = buf_idx;
++ } else if (io_buf_type & IPTS_OUTPUT_ON) {
++ wl[parallel_idx].iobuf_output[output_idx] = buf_idx;
++
++ if (!is_parsing_vendor_kernel(parse_info) &&
++ output_idx > 0) {
++ ipts_err(ipts,
++ "postproc with more than one inout"
++ " is not supported : %d\n", output_idx);
++ return -EINVAL;
++ }
++ }
++
++ if (!is_parsing_vendor_kernel(parse_info) &&
++ io_buf_type & IPTS_OUTPUT_ON) {
++ buf = bin_get_vendor_kernel_output(
++ parse_info,
++ parallel_idx);
++ alloc_info->buffs[buf_idx].no_unmap = true;
++ } else
++ buf = ipts_map_buffer(ipts, buf_size, flags);
++
++ if (buf == NULL) {
++ ipts_dbg(ipts, "ipts_map_buffer failed\n");
++ return -ENOMEM;
++ }
++
++ if (initialize) {
++ memcpy((void *)buf->cpu_addr, &(res->data[0]),
++ res->size);
++ } else {
++ if (data_file && strlen(data_file->file_name)) {
++ bin_read_fw(ipts, data_file->file_name,
++ buf->cpu_addr, buf_size);
++ } else if (is_parsing_vendor_kernel(parse_info) ||
++ !(io_buf_type & IPTS_OUTPUT_ON)) {
++ memset((void *)buf->cpu_addr, 0, res->size);
++ }
++ }
++
++ alloc_info->buffs[buf_idx].buf = buf;
++ }
++ }
++
++ alloc_info->num_of_outputs = output_idx + 1;
++ parse_info->parsed = parsed;
++
++ return 0;
++}
++
++static int bin_read_patch_list(ipts_info_t *ipts,
++ bin_parse_info_t *parse_info,
++ bin_alloc_info_t *alloc_info,
++ bin_workload_t *wl)
++{
++ ipts_bin_patch_list_t *patch_list;
++ ipts_bin_patch_t *patch;
++ intel_ipts_mapbuffer_t *cmd = NULL;
++ u8 *batch;
++ int parsed, size, i, parallel_idx, num_of_parallels, cmd_idx, buf_idx;
++ unsigned int gtt_offset;
++
++ parsed = parse_info->parsed;
++ size = parse_info->size;
++ patch_list = (ipts_bin_patch_list_t *)&parse_info->data[parsed];
++
++ if (sizeof(patch_list->num) > (size - parsed)) {
++ return -EFAULT;
++ }
++ parsed += sizeof(patch_list->num);
++
++ num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
++ patch = (ipts_bin_patch_t *)(&patch_list->patch[0]);
++ for (i = 0; i < patch_list->num; i++) {
++ if (sizeof(patch_list->patch[0]) > (size - parsed)) {
++ return -EFAULT;
++ }
++
++ for (parallel_idx = 0; parallel_idx < num_of_parallels;
++ parallel_idx++) {
++ cmd_idx = wl[parallel_idx].cmdbuf_index;
++ buf_idx = patch[i].index + parallel_idx *
++ alloc_info->num_of_allocations;
++
++ if (alloc_info->buffs[buf_idx].buf == NULL) {
++ /* buffer shared */
++ buf_idx = patch[i].index;
++ }
++
++ cmd = alloc_info->buffs[cmd_idx].buf;
++ batch = (char *)(u64)cmd->cpu_addr;
++
++ gtt_offset = 0;
++ if(alloc_info->buffs[buf_idx].buf != NULL) {
++ gtt_offset = (u32)(u64)
++ alloc_info->buffs[buf_idx].buf->gfx_addr;
++ }
++ gtt_offset += patch[i].alloc_offset;
++
++ batch += patch[i].patch_offset;
++ *(u32*)batch = gtt_offset;
++ }
++
++ parsed += sizeof(patch_list->patch[0]);
++ }
++
++ parse_info->parsed = parsed;
++
++ return 0;
++}
++
++static int bin_read_guc_wq_item(ipts_info_t *ipts,
++ bin_parse_info_t *parse_info,
++ bin_guc_wq_item_t **guc_wq_item)
++{
++ ipts_bin_guc_wq_info_t *bin_guc_wq;
++ bin_guc_wq_item_t *item;
++ u8 *wi_data;
++ int size, parsed, hdr_size, wi_size;
++ int i, batch_offset;
++
++ parsed = parse_info->parsed;
++ size = parse_info->size;
++ bin_guc_wq = (ipts_bin_guc_wq_info_t *)&parse_info->data[parsed];
++
++ wi_size = bin_guc_wq->size;
++ wi_data = bin_guc_wq->data;
++ batch_offset = bin_guc_wq->batch_offset;
++ ipts_dbg(ipts, "wi size = %d, bt offset = %d\n", wi_size, batch_offset);
++ for (i = 0; i < wi_size / sizeof(u32); i++) {
++ ipts_dbg(ipts, "wi[%d] = 0x%08x\n", i, *((u32*)wi_data + i));
++ }
++ hdr_size = sizeof(bin_guc_wq->size) + sizeof(bin_guc_wq->batch_offset);
++
++ if (hdr_size > (size - parsed)) {
++ return -EINVAL;
++ }
++ parsed += hdr_size;
++
++ item = vmalloc(sizeof(bin_guc_wq_item_t) + wi_size);
++ if (item == NULL)
++ return -ENOMEM;
++
++ item->size = wi_size;
++ item->batch_offset = batch_offset;
++ memcpy(item->data, wi_data, wi_size);
++
++ *guc_wq_item = item;
++
++ parsed += wi_size;
++ parse_info->parsed = parsed;
++
++ return 0;
++}
++
++static int bin_setup_guc_workqueue(ipts_info_t *ipts,
++ bin_kernel_list_t *kernel_list)
++{
++ bin_alloc_info_t *alloc_info;
++ bin_workload_t *wl;
++ bin_kernel_info_t *kernel;
++ u8 *wq_start, *wq_addr, *wi_data;
++ bin_buffer_t *bin_buf;
++ int wq_size, wi_size, parallel_idx, cmd_idx, k_idx, iter_size;
++ int i, num_of_parallels, batch_offset, k_num, total_workload;
++
++ wq_addr = (u8*)ipts->resource.wq_info.wq_addr;
++ wq_size = ipts->resource.wq_info.wq_size;
++ num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
++ total_workload = ipts_get_wq_item_size(ipts);
++ k_num = kernel_list->num_of_kernels;
++
++ iter_size = total_workload * num_of_parallels;
++ if (wq_size % iter_size) {
++ ipts_err(ipts, "wq item cannot fit into wq\n");
++ return -EINVAL;
++ }
++
++ wq_start = wq_addr;
++ for (parallel_idx = 0; parallel_idx < num_of_parallels;
++ parallel_idx++) {
++ kernel = &kernel_list->kernels[0];
++ for (k_idx = 0; k_idx < k_num; k_idx++, kernel++) {
++ wl = kernel->wl;
++ alloc_info = kernel->alloc_info;
++
++ batch_offset = kernel->guc_wq_item->batch_offset;
++ wi_size = kernel->guc_wq_item->size;
++ wi_data = &kernel->guc_wq_item->data[0];
++
++ cmd_idx = wl[parallel_idx].cmdbuf_index;
++ bin_buf = &alloc_info->buffs[cmd_idx];
++
++ /* Patch the WQ Data with proper batch buffer offset */
++ *(u32*)(wi_data + batch_offset) =
++ (u32)(unsigned long)(bin_buf->buf->gfx_addr);
++
++ memcpy(wq_addr, wi_data, wi_size);
++
++ wq_addr += wi_size;
++ }
++ }
++
++ for (i = 0; i < (wq_size / iter_size) - 1; i++) {
++ memcpy(wq_addr, wq_start, iter_size);
++ wq_addr += iter_size;
++ }
++
++ return 0;
++}
++
++static int bin_read_bufid_patch(ipts_info_t *ipts,
++ bin_parse_info_t *parse_info,
++ ipts_bin_bufid_patch_t *bufid_patch)
++{
++ ipts_bin_bufid_patch_t *patch;
++ int size, parsed;
++
++ parsed = parse_info->parsed;
++ size = parse_info->size;
++ patch = (ipts_bin_bufid_patch_t *)&parse_info->data[parsed];
++
++ if (sizeof(ipts_bin_bufid_patch_t) > (size - parsed)) {
++ ipts_dbg(ipts, "invalid bufid info\n");
++ return -EINVAL;
++ }
++ parsed += sizeof(ipts_bin_bufid_patch_t);
++
++ memcpy(bufid_patch, patch, sizeof(ipts_bin_bufid_patch_t));
++
++ parse_info->parsed = parsed;
++
++ return 0;
++}
++
++static int bin_setup_bufid_buffer(ipts_info_t *ipts, bin_kernel_list_t *kernel_list)
++{
++ intel_ipts_mapbuffer_t *buf, *cmd_buf;
++ bin_kernel_info_t *last_kernel;
++ bin_alloc_info_t *alloc_info;
++ bin_workload_t *wl;
++ u8 *batch;
++ int parallel_idx, num_of_parallels, cmd_idx;
++ u32 mem_offset, imm_offset;
++
++ buf = ipts_map_buffer(ipts, PAGE_SIZE, 0);
++ if (!buf) {
++ return -ENOMEM;
++ }
++
++ last_kernel = &kernel_list->kernels[kernel_list->num_of_kernels - 1];
++
++ mem_offset = last_kernel->bufid_patch.mem_offset;
++ imm_offset = last_kernel->bufid_patch.imm_offset;
++ wl = last_kernel->wl;
++ alloc_info = last_kernel->alloc_info;
++
++ /* Initialize the buffer with default value */
++ *((u32*)buf->cpu_addr) = LASTSUBMITID_DEFAULT_VALUE;
++ ipts->current_buffer_index = LASTSUBMITID_DEFAULT_VALUE;
++ ipts->last_buffer_completed = LASTSUBMITID_DEFAULT_VALUE;
++ ipts->last_submitted_id = (int*)buf->cpu_addr;
++
++ num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
++ for (parallel_idx = 0; parallel_idx < num_of_parallels; parallel_idx++) {
++ cmd_idx = wl[parallel_idx].cmdbuf_index;
++ cmd_buf = alloc_info->buffs[cmd_idx].buf;
++ batch = (u8*)(u64)cmd_buf->cpu_addr;
++
++ *((u32*)(batch + mem_offset)) = (u32)(u64)(buf->gfx_addr);
++ *((u32*)(batch + imm_offset)) = parallel_idx;
++ }
++
++ kernel_list->bufid_buf = buf;
++
++ return 0;
++}
++
++static void unmap_buffers(ipts_info_t *ipts, bin_alloc_info_t *alloc_info)
++{
++ bin_buffer_t *buffs;
++ int i, num_of_buffers;
++
++ num_of_buffers = alloc_info->num_of_buffers;
++ buffs = &alloc_info->buffs[0];
++
++ for (i = 0; i < num_of_buffers; i++) {
++ if (buffs[i].no_unmap != true && buffs[i].buf != NULL)
++ ipts_unmap_buffer(ipts, buffs[i].buf);
++ }
++}
++
++static int load_kernel(ipts_info_t *ipts, bin_parse_info_t *parse_info,
++ bin_kernel_info_t *kernel)
++{
++ ipts_bin_header_t *hdr;
++ bin_workload_t *wl;
++ bin_alloc_info_t *alloc_info;
++ bin_guc_wq_item_t *guc_wq_item = NULL;
++ ipts_bin_bufid_patch_t bufid_patch;
++ int num_of_parallels, ret;
++
++ num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
++
++ /* check header version and magic numbers */
++ hdr = (ipts_bin_header_t *)parse_info->data;
++ if (hdr->version != IPTS_BIN_HEADER_VERSION ||
++ strncmp(hdr->str, "IOCL", 4) != 0) {
++ ipts_err(ipts, "binary header is not correct version = %d, "
++ "string = %c%c%c%c\n", hdr->version,
++ hdr->str[0], hdr->str[1],
++ hdr->str[2], hdr->str[3] );
++ return -EINVAL;
++ }
++
++ parse_info->parsed = sizeof(ipts_bin_header_t);
++ wl = vmalloc(sizeof(bin_workload_t) * num_of_parallels);
++ if (wl == NULL)
++ return -ENOMEM;
++ memset(wl, 0, sizeof(bin_workload_t) * num_of_parallels);
++
++ alloc_info = vmalloc(sizeof(bin_alloc_info_t));
++ if (alloc_info == NULL) {
++ vfree(wl);
++ return -ENOMEM;
++ }
++ memset(alloc_info, 0, sizeof(bin_alloc_info_t));
++
++ ipts_dbg(ipts, "kernel setup(size : %d)\n", parse_info->size);
++
++ ret = bin_read_allocation_list(ipts, parse_info, alloc_info);
++ if (ret) {
++ ipts_dbg(ipts, "error read_allocation_list\n");
++ goto setup_error;
++ }
++
++ ret = bin_read_cmd_buffer(ipts, parse_info, alloc_info, wl);
++ if (ret) {
++ ipts_dbg(ipts, "error read_cmd_buffer\n");
++ goto setup_error;
++ }
++
++ ret = bin_read_res_list(ipts, parse_info, alloc_info, wl);
++ if (ret) {
++ ipts_dbg(ipts, "error read_res_list\n");
++ goto setup_error;
++ }
++
++ ret = bin_read_patch_list(ipts, parse_info, alloc_info, wl);
++ if (ret) {
++ ipts_dbg(ipts, "error read_patch_list\n");
++ goto setup_error;
++ }
++
++ ret = bin_read_guc_wq_item(ipts, parse_info, &guc_wq_item);
++ if (ret) {
++ ipts_dbg(ipts, "error read_guc_workqueue\n");
++ goto setup_error;
++ }
++
++ memset(&bufid_patch, 0, sizeof(bufid_patch));
++ ret = bin_read_bufid_patch(ipts, parse_info, &bufid_patch);
++ if (ret) {
++ ipts_dbg(ipts, "error read_bufid_patch\n");
++ goto setup_error;
++ }
++
++ kernel->wl = wl;
++ kernel->alloc_info = alloc_info;
++ kernel->is_vendor = is_parsing_vendor_kernel(parse_info);
++ kernel->guc_wq_item = guc_wq_item;
++ memcpy(&kernel->bufid_patch, &bufid_patch, sizeof(bufid_patch));
++
++ return 0;
++
++setup_error:
++ vfree(guc_wq_item);
++
++ unmap_buffers(ipts, alloc_info);
++
++ vfree(alloc_info->buffs);
++ vfree(alloc_info);
++ vfree(wl);
++
++ return ret;
++}
++
++void bin_setup_input_output(ipts_info_t *ipts, bin_kernel_list_t *kernel_list)
++{
++ bin_kernel_info_t *vendor_kernel;
++ bin_workload_t *wl;
++ intel_ipts_mapbuffer_t *buf;
++ bin_alloc_info_t *alloc_info;
++ int parallel_idx, num_of_parallels, i, buf_idx;
++
++ vendor_kernel = &kernel_list->kernels[0];
++
++ wl = vendor_kernel->wl;
++ alloc_info = vendor_kernel->alloc_info;
++ ipts->resource.num_of_outputs = alloc_info->num_of_outputs;
++ num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
++
++ for (parallel_idx = 0; parallel_idx < num_of_parallels; parallel_idx++) {
++ buf_idx = wl[parallel_idx].iobuf_input;
++ buf = alloc_info->buffs[buf_idx].buf;
++
++ ipts_dbg(ipts, "in_buf[%d](%d) c:%p, p:%p, g:%p\n",
++ parallel_idx, buf_idx, (void*)buf->cpu_addr,
++ (void*)buf->phy_addr, (void*)buf->gfx_addr);
++
++ ipts_set_input_buffer(ipts, parallel_idx, buf->cpu_addr,
++ buf->phy_addr);
++
++ for (i = 0; i < alloc_info->num_of_outputs; i++) {
++ buf_idx = wl[parallel_idx].iobuf_output[i];
++ buf = alloc_info->buffs[buf_idx].buf;
++
++ ipts_dbg(ipts, "out_buf[%d][%d] c:%p, p:%p, g:%p\n",
++ parallel_idx, i, (void*)buf->cpu_addr,
++ (void*)buf->phy_addr, (void*)buf->gfx_addr);
++
++ ipts_set_output_buffer(ipts, parallel_idx, i,
++ buf->cpu_addr, buf->phy_addr);
++ }
++ }
++}
++
++static void unload_kernel(ipts_info_t *ipts, bin_kernel_info_t *kernel)
++{
++ bin_alloc_info_t *alloc_info = kernel->alloc_info;
++ bin_guc_wq_item_t *guc_wq_item = kernel->guc_wq_item;
++
++ if (guc_wq_item) {
++ vfree(guc_wq_item);
++ }
++
++ if (alloc_info) {
++ unmap_buffers(ipts, alloc_info);
++
++ vfree(alloc_info->buffs);
++ vfree(alloc_info);
++ }
++}
++
++static int setup_kernel(ipts_info_t *ipts, bin_fw_list_t *fw_list)
++{
++ bin_kernel_list_t *kernel_list = NULL;
++ bin_kernel_info_t *kernel = NULL;
++ const struct firmware *fw = NULL;
++ bin_workload_t *wl;
++ bin_fw_info_t *fw_info;
++ char *fw_name, *fw_data;
++ bin_parse_info_t parse_info;
++ int ret = 0, kernel_idx = 0, num_of_kernels = 0;
++ int vendor_output_idx, total_workload = 0;
++ char fw_path[MAX_IOCL_FILE_PATH_LEN];
++
++ num_of_kernels = fw_list->num_of_fws;
++ kernel_list = vmalloc(sizeof(*kernel) * num_of_kernels + sizeof(*kernel_list));
++ if (kernel_list == NULL)
++ return -ENOMEM;
++
++ memset(kernel_list, 0, sizeof(*kernel) * num_of_kernels + sizeof(*kernel_list));
++ kernel_list->num_of_kernels = num_of_kernels;
++ kernel = &kernel_list->kernels[0];
++
++ fw_data = (char *)&fw_list->fw_info[0];
++ for (kernel_idx = 0; kernel_idx < num_of_kernels; kernel_idx++) {
++ fw_info = (bin_fw_info_t *)fw_data;
++ fw_name = &fw_info->fw_name[0];
++ vendor_output_idx = fw_info->vendor_output;
++ snprintf(fw_path, MAX_IOCL_FILE_PATH_LEN, IPTS_FW_PATH_FMT, fw_name);
++ ret = request_firmware(&fw, (const char *)fw_path, &ipts->cldev->dev);
++ if (ret) {
++ ipts_err(ipts, "cannot read fw %s\n", fw_path);
++ goto error_exit;
++ }
++
++ parse_info.data = (u8*)fw->data;
++ parse_info.size = fw->size;
++ parse_info.parsed = 0;
++ parse_info.fw_info = fw_info;
++ parse_info.vendor_kernel = (kernel_idx == 0) ? NULL : &kernel[0];
++ parse_info.interested_vendor_output = vendor_output_idx;
++
++ ret = load_kernel(ipts, &parse_info, &kernel[kernel_idx]);
++ if (ret) {
++ ipts_err(ipts, "do_setup_kernel error : %d\n", ret);
++ release_firmware(fw);
++ goto error_exit;
++ }
++
++ release_firmware(fw);
++
++ total_workload += kernel[kernel_idx].guc_wq_item->size;
++
++ /* advance to the next kernel */
++ fw_data += sizeof(bin_fw_info_t);
++ fw_data += sizeof(bin_data_file_info_t) * fw_info->num_of_data_files;
++ }
++
++ ipts_set_wq_item_size(ipts, total_workload);
++
++ ret = bin_setup_guc_workqueue(ipts, kernel_list);
++ if (ret) {
++ ipts_dbg(ipts, "error setup_guc_workqueue\n");
++ goto error_exit;
++ }
++
++ ret = bin_setup_bufid_buffer(ipts, kernel_list);
++ if (ret) {
++ ipts_dbg(ipts, "error setup_lastbubmit_buffer\n");
++ goto error_exit;
++ }
++
++ bin_setup_input_output(ipts, kernel_list);
++
++ /* workload is not needed during run-time so free them */
++ for (kernel_idx = 0; kernel_idx < num_of_kernels; kernel_idx++) {
++ wl = kernel[kernel_idx].wl;
++ vfree(wl);
++ }
++
++ ipts->kernel_handle = (u64)kernel_list;
++
++ return 0;
++
++error_exit:
++
++ for (kernel_idx = 0; kernel_idx < num_of_kernels; kernel_idx++) {
++ wl = kernel[kernel_idx].wl;
++ vfree(wl);
++ unload_kernel(ipts, &kernel[kernel_idx]);
++ }
++
++ vfree(kernel_list);
++
++ return ret;
++}
++
++
++static void release_kernel(ipts_info_t *ipts)
++{
++ bin_kernel_list_t *kernel_list;
++ bin_kernel_info_t *kernel;
++ int k_idx, k_num;
++
++ kernel_list = (bin_kernel_list_t *)ipts->kernel_handle;
++ k_num = kernel_list->num_of_kernels;
++ kernel = &kernel_list->kernels[0];
++
++ for (k_idx = 0; k_idx < k_num; k_idx++) {
++ unload_kernel(ipts, kernel);
++ kernel++;
++ }
++
++ ipts_unmap_buffer(ipts, kernel_list->bufid_buf);
++
++ vfree(kernel_list);
++ ipts->kernel_handle = 0;
++}
++
++int ipts_init_kernels(ipts_info_t *ipts)
++{
++ const struct firmware *config_fw = NULL;
++ const char *config_fw_path = IPTS_FW_CONFIG_FILE;
++ bin_fw_list_t *fw_list;
++ int ret;
++
++ ret = ipts_open_gpu(ipts);
++ if (ret) {
++ ipts_err(ipts, "open gpu error : %d\n", ret);
++ return ret;
++ }
++
++ ret = request_firmware(&config_fw, config_fw_path, &ipts->cldev->dev);
++ if (ret) {
++ ipts_err(ipts, "request firmware error : %d\n", ret);
++ goto close_gpu;
++ }
++
++ fw_list = (bin_fw_list_t *)config_fw->data;
++ ret = setup_kernel(ipts, fw_list);
++ if (ret) {
++ ipts_err(ipts, "setup kernel error : %d\n", ret);
++ goto close_firmware;
++ }
++
++ release_firmware(config_fw);
++
++ return ret;
++
++close_firmware:
++ release_firmware(config_fw);
++
++close_gpu:
++ ipts_close_gpu(ipts);
++
++ return ret;
++}
++
++void ipts_release_kernels(ipts_info_t *ipts)
++{
++ release_kernel(ipts);
++ ipts_close_gpu(ipts);
++}
+diff --git a/drivers/misc/ipts/ipts-kernel.h b/drivers/misc/ipts/ipts-kernel.h
+new file mode 100644
+index 0000000..0e7f139
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-kernel.h
+@@ -0,0 +1,23 @@
++/*
++ *
++ * Intel Precise Touch & Stylus Linux driver
++ * Copyright (c) 2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ */
++
++#ifndef _ITPS_GFX_H
++#define _ITPS_GFX_H
++
++int ipts_init_kernels(ipts_info_t *ipts);
++void ipts_release_kernels(ipts_info_t *ipts);
++
++#endif
+diff --git a/drivers/misc/ipts/ipts-mei-msgs.h b/drivers/misc/ipts/ipts-mei-msgs.h
+new file mode 100644
+index 0000000..8ca1468
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-mei-msgs.h
+@@ -0,0 +1,585 @@
++/*
++ * Precise Touch HECI Message
++ *
++ * Copyright (c) 2013-2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ */
++
++#ifndef _IPTS_MEI_MSGS_H_
++#define _IPTS_MEI_MSGS_H_
++
++#include "ipts-sensor-regs.h"
++
++#pragma pack(1)
++
++
++// Initial protocol version
++#define TOUCH_HECI_CLIENT_PROTOCOL_VERSION 10
++
++// GUID that identifies the Touch HECI client.
++#define TOUCH_HECI_CLIENT_GUID \
++ {0x3e8d0870, 0x271a, 0x4208, {0x8e, 0xb5, 0x9a, 0xcb, 0x94, 0x02, 0xae, 0x04}}
++
++
++// define C_ASSERT macro to check structure size and fail compile for unexpected mismatch
++#ifndef C_ASSERT
++#define C_ASSERT(e) typedef char __C_ASSERT__[(e)?1:-1]
++#endif
++
++
++// General Type Defines for compatibility with HID driver and BIOS
++#ifndef BIT0
++#define BIT0 1
++#endif
++#ifndef BIT1
++#define BIT1 2
++#endif
++#ifndef BIT2
++#define BIT2 4
++#endif
++
++
++#define TOUCH_SENSOR_GET_DEVICE_INFO_CMD 0x00000001
++#define TOUCH_SENSOR_GET_DEVICE_INFO_RSP 0x80000001
++
++
++#define TOUCH_SENSOR_SET_MODE_CMD 0x00000002
++#define TOUCH_SENSOR_SET_MODE_RSP 0x80000002
++
++
++#define TOUCH_SENSOR_SET_MEM_WINDOW_CMD 0x00000003
++#define TOUCH_SENSOR_SET_MEM_WINDOW_RSP 0x80000003
++
++
++#define TOUCH_SENSOR_QUIESCE_IO_CMD 0x00000004
++#define TOUCH_SENSOR_QUIESCE_IO_RSP 0x80000004
++
++
++#define TOUCH_SENSOR_HID_READY_FOR_DATA_CMD 0x00000005
++#define TOUCH_SENSOR_HID_READY_FOR_DATA_RSP 0x80000005
++
++
++#define TOUCH_SENSOR_FEEDBACK_READY_CMD 0x00000006
++#define TOUCH_SENSOR_FEEDBACK_READY_RSP 0x80000006
++
++
++#define TOUCH_SENSOR_CLEAR_MEM_WINDOW_CMD 0x00000007
++#define TOUCH_SENSOR_CLEAR_MEM_WINDOW_RSP 0x80000007
++
++
++#define TOUCH_SENSOR_NOTIFY_DEV_READY_CMD 0x00000008
++#define TOUCH_SENSOR_NOTIFY_DEV_READY_RSP 0x80000008
++
++
++#define TOUCH_SENSOR_SET_POLICIES_CMD 0x00000009
++#define TOUCH_SENSOR_SET_POLICIES_RSP 0x80000009
++
++
++#define TOUCH_SENSOR_GET_POLICIES_CMD 0x0000000A
++#define TOUCH_SENSOR_GET_POLICIES_RSP 0x8000000A
++
++
++#define TOUCH_SENSOR_RESET_CMD 0x0000000B
++#define TOUCH_SENSOR_RESET_RSP 0x8000000B
++
++
++#define TOUCH_SENSOR_READ_ALL_REGS_CMD 0x0000000C
++#define TOUCH_SENSOR_READ_ALL_REGS_RSP 0x8000000C
++
++
++#define TOUCH_SENSOR_CMD_ERROR_RSP 0x8FFFFFFF // M2H: ME sends this message to indicate previous command was unrecognized/unsupported
++
++
++
++//*******************************************************************
++//
++// Touch Sensor Status Codes
++//
++//*******************************************************************
++typedef enum touch_status
++{
++ TOUCH_STATUS_SUCCESS = 0, // 0 Requested operation was successful
++ TOUCH_STATUS_INVALID_PARAMS, // 1 Invalid parameter(s) sent
++ TOUCH_STATUS_ACCESS_DENIED, // 2 Unable to validate address range
++ TOUCH_STATUS_CMD_SIZE_ERROR, // 3 HECI message incorrect size for specified command
++ TOUCH_STATUS_NOT_READY, // 4 Memory window not set or device is not armed for operation
++ TOUCH_STATUS_REQUEST_OUTSTANDING, // 5 There is already an outstanding message of the same type, must wait for response before sending another request of that type
++ TOUCH_STATUS_NO_SENSOR_FOUND, // 6 Sensor could not be found. Either no sensor is connected, the sensor has not yet initialized, or the system is improperly configured.
++ TOUCH_STATUS_OUT_OF_MEMORY, // 7 Not enough memory/storage for requested operation
++ TOUCH_STATUS_INTERNAL_ERROR, // 8 Unexpected error occurred
++ TOUCH_STATUS_SENSOR_DISABLED, // 9 Used in TOUCH_SENSOR_HID_READY_FOR_DATA_RSP to indicate sensor has been disabled or reset and must be reinitialized.
++ TOUCH_STATUS_COMPAT_CHECK_FAIL, // 10 Used to indicate compatibility revision check between sensor and ME failed, or protocol ver between ME/HID/Kernels failed.
++ TOUCH_STATUS_SENSOR_EXPECTED_RESET, // 11 Indicates sensor went through a reset initiated by ME
++ TOUCH_STATUS_SENSOR_UNEXPECTED_RESET, // 12 Indicates sensor went through an unexpected reset
++ TOUCH_STATUS_RESET_FAILED, // 13 Requested sensor reset failed to complete
++ TOUCH_STATUS_TIMEOUT, // 14 Operation timed out
++ TOUCH_STATUS_TEST_MODE_FAIL, // 15 Test mode pattern did not match expected values
++ TOUCH_STATUS_SENSOR_FAIL_FATAL, // 16 Indicates sensor reported fatal error during reset sequence. Further progress is not possible.
++ TOUCH_STATUS_SENSOR_FAIL_NONFATAL, // 17 Indicates sensor reported non-fatal error during reset sequence. HID/BIOS logs error and attempts to continue.
++ TOUCH_STATUS_INVALID_DEVICE_CAPS, // 18 Indicates sensor reported invalid capabilities, such as not supporting required minimum frequency or I/O mode.
++ TOUCH_STATUS_QUIESCE_IO_IN_PROGRESS, // 19 Indicates that command cannot be complete until ongoing Quiesce I/O flow has completed.
++ TOUCH_STATUS_MAX // 20 Invalid value, never returned
++} touch_status_t;
++C_ASSERT(sizeof(touch_status_t) == 4);
++
++
++
++//*******************************************************************
++//
++// Defines for message structures used for Host to ME communication
++//
++//*******************************************************************
++
++
++typedef enum touch_sensor_mode
++{
++ TOUCH_SENSOR_MODE_HID = 0, // Set mode to HID mode
++ TOUCH_SENSOR_MODE_RAW_DATA, // Set mode to Raw Data mode
++ TOUCH_SENSOR_MODE_SENSOR_DEBUG = 4, // Used like TOUCH_SENSOR_MODE_HID but data coming from sensor is not necessarily a HID packet.
++ TOUCH_SENSOR_MODE_MAX // Invalid value
++} touch_sensor_mode_t;
++C_ASSERT(sizeof(touch_sensor_mode_t) == 4);
++
++typedef struct touch_sensor_set_mode_cmd_data
++{
++ touch_sensor_mode_t sensor_mode; // Indicate desired sensor mode
++ u32 Reserved[3]; // For future expansion
++} touch_sensor_set_mode_cmd_data_t;
++C_ASSERT(sizeof(touch_sensor_set_mode_cmd_data_t) == 16);
++
++
++#define TOUCH_SENSOR_MAX_DATA_BUFFERS 16
++#define TOUCH_HID_2_ME_BUFFER_ID TOUCH_SENSOR_MAX_DATA_BUFFERS
++#define TOUCH_HID_2_ME_BUFFER_SIZE_MAX 1024
++#define TOUCH_INVALID_BUFFER_ID 0xFF
++
++typedef struct touch_sensor_set_mem_window_cmd_data
++{
++ u32 touch_data_buffer_addr_lower[TOUCH_SENSOR_MAX_DATA_BUFFERS]; // Lower 32 bits of Touch Data Buffer physical address. Size of each buffer should be TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.FrameSize
++ u32 touch_data_buffer_addr_upper[TOUCH_SENSOR_MAX_DATA_BUFFERS]; // Upper 32 bits of Touch Data Buffer physical address. Size of each buffer should be TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.FrameSize
++ u32 tail_offset_addr_lower; // Lower 32 bits of Tail Offset physical address
++ u32 tail_offset_addr_upper; // Upper 32 bits of Tail Offset physical address, always 32 bit, increment by WorkQueueItemSize
++ u32 doorbell_cookie_addr_lower; // Lower 32 bits of Doorbell register physical address
++ u32 doorbell_cookie_addr_upper; // Upper 32 bits of Doorbell register physical address, always 32 bit, increment as integer, rollover to 1
++ u32 feedback_buffer_addr_lower[TOUCH_SENSOR_MAX_DATA_BUFFERS]; // Lower 32 bits of Feedback Buffer physical address. Size of each buffer should be TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.FeedbackSize
++ u32 feedback_buffer_addr_upper[TOUCH_SENSOR_MAX_DATA_BUFFERS]; // Upper 32 bits of Feedback Buffer physical address. Size of each buffer should be TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.FeedbackSize
++ u32 hid2me_buffer_addr_lower; // Lower 32 bits of dedicated HID to ME communication buffer. Size is Hid2MeBufferSize.
++ u32 hid2me_buffer_addr_upper; // Upper 32 bits of dedicated HID to ME communication buffer. Size is Hid2MeBufferSize.
++ u32 hid2me_buffer_size; // Size in bytes of Hid2MeBuffer, can be no bigger than TOUCH_HID_2_ME_BUFFER_SIZE_MAX
++ u8 reserved1; // For future expansion
++ u8 work_queue_item_size; // Size in bytes of the GuC Work Queue Item pointed to by TailOffset
++ u16 work_queue_size; // Size in bytes of the entire GuC Work Queue
++ u32 reserved[8]; // For future expansion
++} touch_sensor_set_mem_window_cmd_data_t;
++C_ASSERT(sizeof(touch_sensor_set_mem_window_cmd_data_t) == 320);
++
++
++#define TOUCH_SENSOR_QUIESCE_FLAG_GUC_RESET BIT0 // indicates GuC got reset and ME must re-read GuC data such as TailOffset and Doorbell Cookie values
++
++typedef struct touch_sensor_quiesce_io_cmd_data
++{
++ u32 quiesce_flags; // Optionally set TOUCH_SENSOR_QUIESCE_FLAG_GUC_RESET
++ u32 reserved[2];
++} touch_sensor_quiesce_io_cmd_data_t;
++C_ASSERT(sizeof(touch_sensor_quiesce_io_cmd_data_t) == 12);
++
++
++typedef struct touch_sensor_feedback_ready_cmd_data
++{
++ u8 feedback_index; // Index value from 0 to TOUCH_HID_2_ME_BUFFER_ID used to indicate which Feedback Buffer to use. Using special value TOUCH_HID_2_ME_BUFFER_ID
++ // is an indication to ME to get feedback data from the Hid2Me buffer instead of one of the standard Feedback buffers.
++ u8 reserved1[3]; // For future expansion
++ u32 transaction_id; // Transaction ID that was originally passed to host in TOUCH_HID_PRIVATE_DATA. Used to track round trip of a given transaction for performance measurements.
++ u32 reserved2[2]; // For future expansion
++} touch_sensor_feedback_ready_cmd_data_t;
++C_ASSERT(sizeof(touch_sensor_feedback_ready_cmd_data_t) == 16);
++
++
++#define TOUCH_DEFAULT_DOZE_TIMER_SECONDS 30
++
++typedef enum touch_freq_override
++{
++ TOUCH_FREQ_OVERRIDE_NONE, // Do not apply any override
++ TOUCH_FREQ_OVERRIDE_10MHZ, // Force frequency to 10MHz (not currently supported)
++ TOUCH_FREQ_OVERRIDE_17MHZ, // Force frequency to 17MHz
++ TOUCH_FREQ_OVERRIDE_30MHZ, // Force frequency to 30MHz
++ TOUCH_FREQ_OVERRIDE_50MHZ, // Force frequency to 50MHz (not currently supported)
++ TOUCH_FREQ_OVERRIDE_MAX // Invalid value
++} touch_freq_override_t;
++C_ASSERT(sizeof(touch_freq_override_t) == 4);
++
++typedef enum touch_spi_io_mode_override
++{
++ TOUCH_SPI_IO_MODE_OVERRIDE_NONE, // Do not apply any override
++ TOUCH_SPI_IO_MODE_OVERRIDE_SINGLE, // Force Single I/O
++ TOUCH_SPI_IO_MODE_OVERRIDE_DUAL, // Force Dual I/O
++ TOUCH_SPI_IO_MODE_OVERRIDE_QUAD, // Force Quad I/O
++ TOUCH_SPI_IO_MODE_OVERRIDE_MAX // Invalid value
++} touch_spi_io_mode_override_t;
++C_ASSERT(sizeof(touch_spi_io_mode_override_t) == 4);
++
++// Debug Policy bits used by TOUCH_POLICY_DATA.DebugOverride
++#define TOUCH_DBG_POLICY_OVERRIDE_STARTUP_TIMER_DIS BIT0 // Disable sensor startup timer
++#define TOUCH_DBG_POLICY_OVERRIDE_SYNC_BYTE_DIS BIT1 // Disable Sync Byte check
++#define TOUCH_DBG_POLICY_OVERRIDE_ERR_RESET_DIS BIT2 // Disable error resets
++
++typedef struct touch_policy_data
++{
++ u32 reserved0; // For future expansion.
++ u32 doze_timer :16; // Value in seconds, after which ME will put the sensor into Doze power state if no activity occurs. Set
++ // to 0 to disable Doze mode (not recommended). Value will be set to TOUCH_DEFAULT_DOZE_TIMER_SECONDS by
++ // default.
++ touch_freq_override_t freq_override :3; // Override frequency requested by sensor
++ touch_spi_io_mode_override_t spi_io_override :3; // Override IO mode requested by sensor
++ u32 reserved1 :10; // For future expansion
++ u32 reserved2; // For future expansion
++ u32 debug_override; // Normally all bits will be zero. Bits will be defined as needed for enabling special debug features
++} touch_policy_data_t;
++C_ASSERT(sizeof(touch_policy_data_t) == 16);
++
++typedef struct touch_sensor_set_policies_cmd_data
++{
++ touch_policy_data_t policy_data; // Contains the desired policy to be set
++} touch_sensor_set_policies_cmd_data_t;
++C_ASSERT(sizeof(touch_sensor_set_policies_cmd_data_t) == 16);
++
++
++typedef enum touch_sensor_reset_type
++{
++ TOUCH_SENSOR_RESET_TYPE_HARD, // Hardware Reset using dedicated GPIO pin
++ TOUCH_SENSOR_RESET_TYPE_SOFT, // Software Reset using command written over SPI interface
++ TOUCH_SENSOR_RESET_TYPE_MAX // Invalid value
++} touch_sensor_reset_type_t;
++C_ASSERT(sizeof(touch_sensor_reset_type_t) == 4);
++
++typedef struct touch_sensor_reset_cmd_data
++{
++ touch_sensor_reset_type_t reset_type; // Indicate desired reset type
++ u32 reserved; // For future expansion
++} touch_sensor_reset_cmd_data_t;
++C_ASSERT(sizeof(touch_sensor_reset_cmd_data_t) == 8);
++
++
++//
++// Host to ME message
++//
++typedef struct touch_sensor_msg_h2m
++{
++ u32 command_code;
++ union
++ {
++ touch_sensor_set_mode_cmd_data_t set_mode_cmd_data;
++ touch_sensor_set_mem_window_cmd_data_t set_window_cmd_data;
++ touch_sensor_quiesce_io_cmd_data_t quiesce_io_cmd_data;
++ touch_sensor_feedback_ready_cmd_data_t feedback_ready_cmd_data;
++ touch_sensor_set_policies_cmd_data_t set_policies_cmd_data;
++ touch_sensor_reset_cmd_data_t reset_cmd_data;
++ } h2m_data;
++} touch_sensor_msg_h2m_t;
++C_ASSERT(sizeof(touch_sensor_msg_h2m_t) == 324);
++
++
++//*******************************************************************
++//
++// Defines for message structures used for ME to Host communication
++//
++//*******************************************************************
++
++// I/O mode values used by TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.
++typedef enum touch_spi_io_mode
++{
++ TOUCH_SPI_IO_MODE_SINGLE = 0, // Sensor set for Single I/O SPI
++ TOUCH_SPI_IO_MODE_DUAL, // Sensor set for Dual I/O SPI
++ TOUCH_SPI_IO_MODE_QUAD, // Sensor set for Quad I/O SPI
++ TOUCH_SPI_IO_MODE_MAX // Invalid value
++} touch_spi_io_mode_t;
++C_ASSERT(sizeof(touch_spi_io_mode_t) == 4);
++
++//
++// TOUCH_SENSOR_GET_DEVICE_INFO_RSP code is sent in response to TOUCH_SENSOR_GET_DEVICE_INFO_CMD. This code will be followed
++// by TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and sensor details are reported.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size. Other fields will not contain valid data.
++// TOUCH_STATUS_NO_SENSOR_FOUND: Sensor has not yet been detected. Other fields will not contain valid data.
++// TOUCH_STATUS_INVALID_DEVICE_CAPS: Indicates sensor does not support minimum required Frequency or I/O Mode. ME firmware will choose best possible option for the errant
++// field. Caller should attempt to continue.
++// TOUCH_STATUS_COMPAT_CHECK_FAIL: Indicates TouchIC/ME compatibility mismatch. Caller should attempt to continue.
++//
++typedef struct touch_sensor_get_device_info_rsp_data
++{
++ u16 vendor_id; // Touch Sensor vendor ID
++ u16 device_id; // Touch Sensor device ID
++ u32 hw_rev; // Touch Sensor Hardware Revision
++ u32 fw_rev; // Touch Sensor Firmware Revision
++ u32 frame_size; // Max size of one frame returned by Touch IC in bytes. This data will be TOUCH_RAW_DATA_HDR followed
++ // by a payload. The payload can be raw data or a HID structure depending on mode.
++ u32 feedback_size; // Max size of one Feedback structure in bytes
++ touch_sensor_mode_t sensor_mode; // Current operating mode of the sensor
++ u32 max_touch_points :8; // Maximum number of simultaneous touch points that can be reported by sensor
++ touch_freq_t spi_frequency :8; // SPI bus Frequency supported by sensor and ME firmware
++ touch_spi_io_mode_t spi_io_mode :8; // SPI bus I/O Mode supported by sensor and ME firmware
++ u32 reserved0 :8; // For future expansion
++ u8 sensor_minor_eds_rev; // Minor version number of EDS spec supported by sensor (from Compat Rev ID Reg)
++ u8 sensor_major_eds_rev; // Major version number of EDS spec supported by sensor (from Compat Rev ID Reg)
++ u8 me_minor_eds_rev; // Minor version number of EDS spec supported by ME
++ u8 me_major_eds_rev; // Major version number of EDS spec supported by ME
++ u8 sensor_eds_intf_rev; // EDS Interface Revision Number supported by sensor (from Compat Rev ID Reg)
++ u8 me_eds_intf_rev; // EDS Interface Revision Number supported by ME
++ u8 kernel_compat_ver; // EU Kernel Compatibility Version (from Compat Rev ID Reg)
++ u8 reserved1; // For future expansion
++ u32 reserved2[2]; // For future expansion
++} touch_sensor_get_device_info_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_get_device_info_rsp_data_t) == 44);
++
++
++//
++// TOUCH_SENSOR_SET_MODE_RSP code is sent in response to TOUCH_SENSOR_SET_MODE_CMD. This code will be followed
++// by TOUCH_SENSOR_SET_MODE_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and mode was set.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size. Other fields will not contain valid data.
++// TOUCH_STATUS_INVALID_PARAMS: Input parameters are out of range.
++//
++typedef struct touch_sensor_set_mode_rsp_data
++{
++ u32 reserved[3]; // For future expansion
++} touch_sensor_set_mode_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_set_mode_rsp_data_t) == 12);
++
++
++//
++// TOUCH_SENSOR_SET_MEM_WINDOW_RSP code is sent in response to TOUCH_SENSOR_SET_MEM_WINDOW_CMD. This code will be followed
++// by TOUCH_SENSOR_SET_MEM_WINDOW_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and memory window was set.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size. Other fields will not contain valid data.
++// TOUCH_STATUS_INVALID_PARAMS: Input parameters are out of range.
++// TOUCH_STATUS_ACCESS_DENIED: Unable to map host address ranges for DMA.
++// TOUCH_STATUS_OUT_OF_MEMORY: Unable to allocate enough space for needed buffers.
++//
++typedef struct touch_sensor_set_mem_window_rsp_data
++{
++ u32 reserved[3]; // For future expansion
++} touch_sensor_set_mem_window_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_set_mem_window_rsp_data_t) == 12);
++
++
++//
++// TOUCH_SENSOR_QUIESCE_IO_RSP code is sent in response to TOUCH_SENSOR_QUIESCE_IO_CMD. This code will be followed
++// by TOUCH_SENSOR_QUIESCE_IO_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and touch flow has stopped.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size. Other fields will not contain valid data.
++// TOUCH_STATUS_QUIESCE_IO_IN_PROGRESS: Indicates that Quiesce I/O is already in progress and this command cannot be accepted at this time.
++// TOUCH_STATIS_TIMEOUT: Indicates ME timed out waiting for Quiesce I/O flow to complete.
++//
++typedef struct touch_sensor_quiesce_io_rsp_data
++{
++ u32 reserved[3]; // For future expansion
++} touch_sensor_quiesce_io_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_quiesce_io_rsp_data_t) == 12);
++
++
++// Reset Reason values used in TOUCH_SENSOR_HID_READY_FOR_DATA_RSP_DATA
++typedef enum touch_reset_reason
++{
++ TOUCH_RESET_REASON_UNKNOWN = 0, // Reason for sensor reset is not known
++ TOUCH_RESET_REASON_FEEDBACK_REQUEST, // Reset was requested as part of TOUCH_SENSOR_FEEDBACK_READY_CMD
++ TOUCH_RESET_REASON_HECI_REQUEST, // Reset was requested via TOUCH_SENSOR_RESET_CMD
++ TOUCH_RESET_REASON_MAX
++} touch_reset_reason_t;
++C_ASSERT(sizeof(touch_reset_reason_t) == 4);
++
++//
++// TOUCH_SENSOR_HID_READY_FOR_DATA_RSP code is sent in response to TOUCH_SENSOR_HID_READY_FOR_DATA_CMD. This code will be followed
++// by TOUCH_SENSOR_HID_READY_FOR_DATA_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and HID data was sent by DMA. This will only be sent in HID mode.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size. Other fields will not contain valid data.
++// TOUCH_STATUS_REQUEST_OUTSTANDING: Previous request is still outstanding, ME FW cannot handle another request for the same command.
++// TOUCH_STATUS_NOT_READY: Indicates memory window has not yet been set by BIOS/HID.
++// TOUCH_STATUS_SENSOR_DISABLED: Indicates that ME to HID communication has been stopped either by TOUCH_SENSOR_QUIESCE_IO_CMD or TOUCH_SENSOR_CLEAR_MEM_WINDOW_CMD.
++// TOUCH_STATUS_SENSOR_UNEXPECTED_RESET: Sensor signaled a Reset Interrupt. ME did not expect this and has no info about why this occurred.
++// TOUCH_STATUS_SENSOR_EXPECTED_RESET: Sensor signaled a Reset Interrupt. ME either directly requested this reset, or it was expected as part of a defined flow in the EDS.
++// TOUCH_STATUS_QUIESCE_IO_IN_PROGRESS: Indicates that Quiesce I/O is already in progress and this command cannot be accepted at this time.
++// TOUCH_STATUS_TIMEOUT: Sensor did not generate a reset interrupt in the time allotted. Could indicate sensor is not connected or malfunctioning.
++//
++typedef struct touch_sensor_hid_ready_for_data_rsp_data
++{
++ u32 data_size; // Size of the data the ME DMA'd into a RawDataBuffer. Valid only when Status == TOUCH_STATUS_SUCCESS
++ u8 touch_data_buffer_index; // Index to indicate which RawDataBuffer was used. Valid only when Status == TOUCH_STATUS_SUCCESS
++ u8 reset_reason; // If Status is TOUCH_STATUS_SENSOR_EXPECTED_RESET, ME will provide the cause. See TOUCH_RESET_REASON.
++ u8 reserved1[2]; // For future expansion
++ u32 reserved2[5]; // For future expansion
++} touch_sensor_hid_ready_for_data_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_hid_ready_for_data_rsp_data_t) == 28);
++
++
++//
++// TOUCH_SENSOR_FEEDBACK_READY_RSP code is sent in response to TOUCH_SENSOR_FEEDBACK_READY_CMD. This code will be followed
++// by TOUCH_SENSOR_FEEDBACK_READY_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and any feedback or commands were sent to sensor.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size. Other fields will not contain valid data.
++// TOUCH_STATUS_INVALID_PARAMS: Input parameters are out of range.
++// TOUCH_STATUS_COMPAT_CHECK_FAIL Indicates ProtocolVer does not match ME supported version. (non-fatal error)
++// TOUCH_STATUS_INTERNAL_ERROR: Unexpected error occurred. This should not normally be seen.
++// TOUCH_STATUS_OUT_OF_MEMORY: Insufficient space to store Calibration Data
++//
++typedef struct touch_sensor_feedback_ready_rsp_data
++{
++ u8 feedback_index; // Index value from 0 to TOUCH_SENSOR_MAX_DATA_BUFFERS used to indicate which Feedback Buffer to use
++ u8 reserved1[3]; // For future expansion
++ u32 reserved2[6]; // For future expansion
++} touch_sensor_feedback_ready_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_feedback_ready_rsp_data_t) == 28);
++
++
++//
++// TOUCH_SENSOR_CLEAR_MEM_WINDOW_RSP code is sent in response to TOUCH_SENSOR_CLEAR_MEM_WINDOW_CMD. This code will be followed
++// by TOUCH_SENSOR_CLEAR_MEM_WINDOW_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and memory window was set.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size. Other fields will not contain valid data.
++// TOUCH_STATUS_INVALID_PARAMS: Input parameters are out of range.
++// TOUCH_STATUS_QUIESCE_IO_IN_PROGRESS: Indicates that Quiesce I/O is already in progress and this command cannot be accepted at this time.
++//
++typedef struct touch_sensor_clear_mem_window_rsp_data
++{
++ u32 reserved[3]; // For future expansion
++} touch_sensor_clear_mem_window_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_clear_mem_window_rsp_data_t) == 12);
++
++
++//
++// TOUCH_SENSOR_NOTIFY_DEV_READY_RSP code is sent in response to TOUCH_SENSOR_NOTIFY_DEV_READY_CMD. This code will be followed
++// by TOUCH_SENSOR_NOTIFY_DEV_READY_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and sensor has been detected by ME FW.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size.
++// TOUCH_STATUS_REQUEST_OUTSTANDING: Previous request is still outstanding, ME FW cannot handle another request for the same command.
++// TOUCH_STATUS_TIMEOUT: Sensor did not generate a reset interrupt in the time allotted. Could indicate sensor is not connected or malfunctioning.
++// TOUCH_STATUS_SENSOR_FAIL_FATAL: Sensor indicated a fatal error, further operation is not possible. Error details can be found in ErrReg.
++// TOUCH_STATUS_SENSOR_FAIL_NONFATAL: Sensor indicated a non-fatal error. Error should be logged by caller and init flow can continue. Error details can be found in ErrReg.
++//
++typedef struct touch_sensor_notify_dev_ready_rsp_data
++{
++ touch_err_reg_t err_reg; // Value of sensor Error Register, field is only valid for Status == TOUCH_STATUS_SENSOR_FAIL_FATAL or TOUCH_STATUS_SENSOR_FAIL_NONFATAL
++ u32 reserved[2]; // For future expansion
++} touch_sensor_notify_dev_ready_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_notify_dev_ready_rsp_data_t) == 12);
++
++
++//
++// TOUCH_SENSOR_SET_POLICIES_RSP code is sent in response to TOUCH_SENSOR_SET_POLICIES_CMD. This code will be followed
++// by TOUCH_SENSOR_SET_POLICIES_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and new policies were set.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size. Other fields will not contain valid data.
++// TOUCH_STATUS_INVALID_PARAMS: Input parameters are out of range.
++//
++typedef struct touch_sensor_set_policies_rsp_data
++{
++ u32 reserved[3]; // For future expansion
++} touch_sensor_set_policies_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_set_policies_rsp_data_t) == 12);
++
++
++//
++// TOUCH_SENSOR_GET_POLICIES_RSP code is sent in response to TOUCH_SENSOR_GET_POLICIES_CMD. This code will be followed
++// by TOUCH_SENSOR_GET_POLICIES_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and new policies were set.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size. Other fields will not contain valid data.
++//
++typedef struct touch_sensor_get_policies_rsp_data
++{
++ touch_policy_data_t policy_data; // Contains the current policy
++} touch_sensor_get_policies_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_get_policies_rsp_data_t) == 16);
++
++
++//
++// TOUCH_SENSOR_RESET_RSP code is sent in response to TOUCH_SENSOR_RESET_CMD. This code will be followed
++// by TOUCH_SENSOR_RESET_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and sensor reset was completed.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size. Other fields will not contain valid data.
++// TOUCH_STATUS_INVALID_PARAMS: Input parameters are out of range.
++// TOUCH_STATUS_TIMEOUT: Sensor did not generate a reset interrupt in the time allotted. Could indicate sensor is not connected or malfunctioning.
++// TOUCH_STATUS_RESET_FAILED: Sensor generated an invalid or unexpected interrupt.
++// TOUCH_STATUS_QUIESCE_IO_IN_PROGRESS: Indicates that Quiesce I/O is already in progress and this command cannot be accepted at this time.
++//
++typedef struct touch_sensor_reset_rsp_data
++{
++ u32 reserved[3]; // For future expansion
++} touch_sensor_reset_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_reset_rsp_data_t) == 12);
++
++
++//
++// TOUCH_SENSOR_READ_ALL_REGS_RSP code is sent in response to TOUCH_SENSOR_READ_ALL_REGS_CMD. This code will be followed
++// by TOUCH_SENSOR_READ_ALL_REGS_RSP_DATA.
++//
++// Possible Status values:
++// TOUCH_STATUS_SUCCESS: Command was processed successfully and new policies were set.
++// TOUCH_STATUS_CMD_SIZE_ERROR: Command sent did not match expected size. Other fields will not contain valid data.
++//
++typedef struct touch_sensor_read_all_regs_rsp_data
++{
++ touch_reg_block_t sensor_regs; // Returns first 64 bytes of register space used for normal touch operation. Does not include test mode register.
++ u32 reserved[4];
++} touch_sensor_read_all_regs_rsp_data_t;
++C_ASSERT(sizeof(touch_sensor_read_all_regs_rsp_data_t) == 80);
++
++//
++// ME to Host Message
++//
++typedef struct touch_sensor_msg_m2h
++{
++ u32 command_code;
++ touch_status_t status;
++ union
++ {
++ touch_sensor_get_device_info_rsp_data_t device_info_rsp_data;
++ touch_sensor_set_mode_rsp_data_t set_mode_rsp_data;
++ touch_sensor_set_mem_window_rsp_data_t set_mem_window_rsp_data;
++ touch_sensor_quiesce_io_rsp_data_t quiesce_io_rsp_data;
++ touch_sensor_hid_ready_for_data_rsp_data_t hid_ready_for_data_rsp_data;
++ touch_sensor_feedback_ready_rsp_data_t feedback_ready_rsp_data;
++ touch_sensor_clear_mem_window_rsp_data_t clear_mem_window_rsp_data;
++ touch_sensor_notify_dev_ready_rsp_data_t notify_dev_ready_rsp_data;
++ touch_sensor_set_policies_rsp_data_t set_policies_rsp_data;
++ touch_sensor_get_policies_rsp_data_t get_policies_rsp_data;
++ touch_sensor_reset_rsp_data_t reset_rsp_data;
++ touch_sensor_read_all_regs_rsp_data_t read_all_regs_rsp_data;
++ } m2h_data;
++} touch_sensor_msg_m2h_t;
++C_ASSERT(sizeof(touch_sensor_msg_m2h_t) == 88);
++
++
++#define TOUCH_MSG_SIZE_MAX_BYTES (MAX(sizeof(touch_sensor_msg_m2h_t), sizeof(touch_sensor_msg_h2m_t)))
++
++#pragma pack()
++
++#endif // _IPTS_MEI_MSGS_H_
+diff --git a/drivers/misc/ipts/ipts-mei.c b/drivers/misc/ipts/ipts-mei.c
+new file mode 100644
+index 0000000..39667e7
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-mei.c
+@@ -0,0 +1,282 @@
++/*
++ * MEI client driver for Intel Precise Touch and Stylus
++ *
++ * Copyright (c) 2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ */
++
++#include <linux/mei_cl_bus.h>
++#include <linux/module.h>
++#include <linux/mod_devicetable.h>
++#include <linux/hid.h>
++#include <linux/dma-mapping.h>
++#include <linux/kthread.h>
++#include <linux/intel_ipts_if.h>
++
++#include "ipts.h"
++#include "ipts-hid.h"
++#include "ipts-msg-handler.h"
++#include "ipts-mei-msgs.h"
++#include "ipts-binary-spec.h"
++#include "ipts-state.h"
++
++#define IPTS_DRIVER_NAME "ipts"
++#define IPTS_MEI_UUID UUID_LE(0x3e8d0870, 0x271a, 0x4208, \
++ 0x8e, 0xb5, 0x9a, 0xcb, 0x94, 0x02, 0xae, 0x04)
++
++static struct mei_cl_device_id ipts_mei_cl_tbl[] = {
++ { "", IPTS_MEI_UUID, MEI_CL_VERSION_ANY},
++ {}
++};
++
++static ssize_t sensor_mode_show(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ ipts_info_t *ipts;
++ ipts = dev_get_drvdata(dev);
++
++ return sprintf(buf, "%d\n", ipts->sensor_mode);
++}
++
++//TODO: Verify the function implementation
++static ssize_t sensor_mode_store(struct device *dev,
++ struct device_attribute *attr, const char *buf,
++ size_t count)
++{
++ int ret;
++ long val;
++ ipts_info_t *ipts;
++
++ ipts = dev_get_drvdata(dev);
++ ret = kstrtol(buf, 10, &val);
++ if (ret)
++ return ret;
++
++ ipts_dbg(ipts, "try sensor mode = %ld\n", val);
++
++ switch (val) {
++ case TOUCH_SENSOR_MODE_HID:
++ break;
++ case TOUCH_SENSOR_MODE_RAW_DATA:
++ break;
++ default:
++ ipts_err(ipts, "sensor mode %ld is not supported\n", val);
++ }
++
++ return count;
++}
++
++static ssize_t device_info_show(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ ipts_info_t *ipts;
++
++ ipts = dev_get_drvdata(dev);
++ return sprintf(buf, "vendor id = 0x%04hX\n"
++ "device id = 0x%04hX\n"
++ "HW rev = 0x%08X\n"
++ "firmware rev = 0x%08X\n",
++ ipts->device_info.vendor_id, ipts->device_info.device_id,
++ ipts->device_info.hw_rev, ipts->device_info.fw_rev);
++}
++
++static DEVICE_ATTR_RW(sensor_mode);
++static DEVICE_ATTR_RO(device_info);
++
++static struct attribute *ipts_attrs[] = {
++ &dev_attr_sensor_mode.attr,
++ &dev_attr_device_info.attr,
++ NULL
++};
++
++static const struct attribute_group ipts_grp = {
++ .attrs = ipts_attrs,
++};
++
++MODULE_DEVICE_TABLE(mei, ipts_mei_cl_tbl);
++
++static void raw_data_work_func(struct work_struct *work)
++{
++ ipts_info_t *ipts = container_of(work, ipts_info_t, raw_data_work);
++
++ ipts_handle_processed_data(ipts);
++}
++
++static void gfx_status_work_func(struct work_struct *work)
++{
++ ipts_info_t *ipts = container_of(work, ipts_info_t, gfx_status_work);
++ ipts_state_t state;
++ int status = ipts->gfx_status;
++
++ ipts_dbg(ipts, "notify gfx status : %d\n", status);
++
++ state = ipts_get_state(ipts);
++
++ if (state == IPTS_STA_RAW_DATA_STARTED || state == IPTS_STA_HID_STARTED) {
++ if (status == IPTS_NOTIFY_STA_BACKLIGHT_ON &&
++ ipts->display_status == false) {
++ ipts_send_sensor_clear_mem_window_cmd(ipts);
++ ipts->display_status = true;
++ } else if (status == IPTS_NOTIFY_STA_BACKLIGHT_OFF &&
++ ipts->display_status == true) {
++ ipts_send_sensor_quiesce_io_cmd(ipts);
++ ipts->display_status = false;
++ }
++ }
++}
++
++/* event loop */
++static int ipts_mei_cl_event_thread(void *data)
++{
++ ipts_info_t *ipts = (ipts_info_t *)data;
++ struct mei_cl_device *cldev = ipts->cldev;
++ ssize_t msg_len;
++ touch_sensor_msg_m2h_t m2h_msg;
++
++ while (!kthread_should_stop()) {
++ msg_len = mei_cldev_recv(cldev, (u8*)&m2h_msg, sizeof(m2h_msg));
++ if (msg_len <= 0) {
++ ipts_err(ipts, "error in reading m2h msg\n");
++ continue;
++ }
++
++ if (ipts_handle_resp(ipts, &m2h_msg, msg_len) != 0) {
++ ipts_err(ipts, "error in handling resp msg\n");
++ }
++ }
++
++ ipts_dbg(ipts, "!! end event loop !!\n");
++
++ return 0;
++}
++
++static void init_work_func(struct work_struct *work)
++{
++ ipts_info_t *ipts = container_of(work, ipts_info_t, init_work);
++
++ ipts->sensor_mode = TOUCH_SENSOR_MODE_RAW_DATA;
++ ipts->display_status = true;
++
++ ipts_start(ipts);
++}
++
++static int ipts_mei_cl_probe(struct mei_cl_device *cldev,
++ const struct mei_cl_device_id *id)
++{
++ int ret = 0;
++ ipts_info_t *ipts = NULL;
++
++ pr_info("probing Intel Precise Touch & Stylus\n");
++
++ // setup the DMA BIT mask, the system will choose the best possible
++ if (dma_coerce_mask_and_coherent(&cldev->dev, DMA_BIT_MASK(64)) == 0) {
++ pr_info("IPTS using DMA_BIT_MASK(64)\n");
++ } else if (dma_coerce_mask_and_coherent(&cldev->dev,
++ DMA_BIT_MASK(32)) == 0) {
++ pr_info("IPTS using DMA_BIT_MASK(32)\n");
++ } else {
++ pr_err("IPTS: No suitable DMA available\n");
++ return -EFAULT;
++ }
++
++ ret = mei_cldev_enable(cldev);
++ if (ret < 0) {
++ pr_err("cannot enable IPTS\n");
++ return ret;
++ }
++
++ ipts = devm_kzalloc(&cldev->dev, sizeof(ipts_info_t), GFP_KERNEL);
++ if (ipts == NULL) {
++ ret = -ENOMEM;
++ goto disable_mei;
++ }
++ ipts->cldev = cldev;
++ mei_cldev_set_drvdata(cldev, ipts);
++
++ ipts->event_loop = kthread_run(ipts_mei_cl_event_thread, (void*)ipts,
++ "ipts_event_thread");
++
++ if(ipts_dbgfs_register(ipts, "ipts"))
++ pr_debug("cannot register debugfs for IPTS\n");
++
++ INIT_WORK(&ipts->init_work, init_work_func);
++ INIT_WORK(&ipts->raw_data_work, raw_data_work_func);
++ INIT_WORK(&ipts->gfx_status_work, gfx_status_work_func);
++
++ ret = sysfs_create_group(&cldev->dev.kobj, &ipts_grp);
++ if (ret != 0) {
++ pr_debug("cannot create sysfs for IPTS\n");
++ }
++
++ schedule_work(&ipts->init_work);
++
++ return 0;
++
++disable_mei :
++ mei_cldev_disable(cldev);
++
++ return ret;
++}
++
++static int ipts_mei_cl_remove(struct mei_cl_device *cldev)
++{
++ ipts_info_t *ipts = mei_cldev_get_drvdata(cldev);
++
++ ipts_stop(ipts);
++
++ sysfs_remove_group(&cldev->dev.kobj, &ipts_grp);
++ ipts_hid_release(ipts);
++ ipts_dbgfs_deregister(ipts);
++ mei_cldev_disable(cldev);
++
++ kthread_stop(ipts->event_loop);
++
++ pr_info("IPTS removed\n");
++
++ return 0;
++}
++
++static struct mei_cl_driver ipts_mei_cl_driver = {
++ .id_table = ipts_mei_cl_tbl,
++ .name = IPTS_DRIVER_NAME,
++ .probe = ipts_mei_cl_probe,
++ .remove = ipts_mei_cl_remove,
++};
++
++static int ipts_mei_cl_init(void)
++{
++ int ret;
++
++ pr_info("IPTS %s() is called\n", __func__);
++
++ ret = mei_cldev_driver_register(&ipts_mei_cl_driver);
++ if (ret) {
++ pr_err("unable to register IPTS mei client driver\n");
++ return ret;
++ }
++
++ return 0;
++}
++
++static void __exit ipts_mei_cl_exit(void)
++{
++ pr_info("IPTS %s() is called\n", __func__);
++
++ mei_cldev_driver_unregister(&ipts_mei_cl_driver);
++}
++
++module_init(ipts_mei_cl_init);
++module_exit(ipts_mei_cl_exit);
++
++MODULE_DESCRIPTION
++ ("Intel(R) Management Engine Interface Client Driver for "\
++ "Intel Precision Touch and Sylus");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/misc/ipts/ipts-msg-handler.c b/drivers/misc/ipts/ipts-msg-handler.c
+new file mode 100644
+index 0000000..b53f668
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-msg-handler.c
+@@ -0,0 +1,433 @@
++#include <linux/mei_cl_bus.h>
++
++#include "ipts.h"
++#include "ipts-hid.h"
++#include "ipts-resource.h"
++#include "ipts-mei-msgs.h"
++
++int ipts_handle_cmd(ipts_info_t *ipts, u32 cmd, void *data, int data_size)
++{
++ int ret = 0;
++ touch_sensor_msg_h2m_t h2m_msg;
++ int len = 0;
++
++ memset(&h2m_msg, 0, sizeof(h2m_msg));
++
++ h2m_msg.command_code = cmd;
++ len = sizeof(h2m_msg.command_code) + data_size;
++ if (data != NULL && data_size != 0)
++ memcpy(&h2m_msg.h2m_data, data, data_size); /* copy payload */
++
++ ret = mei_cldev_send(ipts->cldev, (u8*)&h2m_msg, len);
++ if (ret < 0) {
++ ipts_err(ipts, "mei_cldev_send() error 0x%X:%d\n",
++ cmd, ret);
++ return ret;
++ }
++
++ return 0;
++}
++
++int ipts_send_feedback(ipts_info_t *ipts, int buffer_idx, u32 transaction_id)
++{
++ int ret;
++ int cmd_len;
++ touch_sensor_feedback_ready_cmd_data_t fb_ready_cmd;
++
++ cmd_len = sizeof(touch_sensor_feedback_ready_cmd_data_t);
++ memset(&fb_ready_cmd, 0, cmd_len);
++
++ fb_ready_cmd.feedback_index = buffer_idx;
++ fb_ready_cmd.transaction_id = transaction_id;
++
++ ret = ipts_handle_cmd(ipts, TOUCH_SENSOR_FEEDBACK_READY_CMD,
++ &fb_ready_cmd, cmd_len);
++
++ return ret;
++}
++
++int ipts_send_sensor_quiesce_io_cmd(ipts_info_t *ipts)
++{
++ int ret;
++ int cmd_len;
++ touch_sensor_quiesce_io_cmd_data_t quiesce_io_cmd;
++
++ cmd_len = sizeof(touch_sensor_quiesce_io_cmd_data_t);
++ memset(&quiesce_io_cmd, 0, cmd_len);
++
++ ret = ipts_handle_cmd(ipts, TOUCH_SENSOR_QUIESCE_IO_CMD,
++ &quiesce_io_cmd, cmd_len);
++
++ return ret;
++}
++
++int ipts_send_sensor_hid_ready_for_data_cmd(ipts_info_t *ipts)
++{
++ return ipts_handle_cmd(ipts, TOUCH_SENSOR_HID_READY_FOR_DATA_CMD, NULL, 0);
++}
++
++int ipts_send_sensor_clear_mem_window_cmd(ipts_info_t *ipts)
++{
++ return ipts_handle_cmd(ipts, TOUCH_SENSOR_CLEAR_MEM_WINDOW_CMD, NULL, 0);
++}
++
++static int check_validity(touch_sensor_msg_m2h_t *m2h_msg, u32 msg_len)
++{
++ int ret = 0;
++ int valid_msg_len = sizeof(m2h_msg->command_code);
++ u32 cmd_code = m2h_msg->command_code;
++
++ switch (cmd_code) {
++ case TOUCH_SENSOR_SET_MODE_RSP:
++ valid_msg_len +=
++ sizeof(touch_sensor_set_mode_rsp_data_t);
++ break;
++ case TOUCH_SENSOR_SET_MEM_WINDOW_RSP:
++ valid_msg_len +=
++ sizeof(touch_sensor_set_mem_window_rsp_data_t);
++ break;
++ case TOUCH_SENSOR_QUIESCE_IO_RSP:
++ valid_msg_len +=
++ sizeof(touch_sensor_quiesce_io_rsp_data_t);
++ break;
++ case TOUCH_SENSOR_HID_READY_FOR_DATA_RSP:
++ valid_msg_len +=
++ sizeof(touch_sensor_hid_ready_for_data_rsp_data_t);
++ break;
++ case TOUCH_SENSOR_FEEDBACK_READY_RSP:
++ valid_msg_len +=
++ sizeof(touch_sensor_feedback_ready_rsp_data_t);
++ break;
++ case TOUCH_SENSOR_CLEAR_MEM_WINDOW_RSP:
++ valid_msg_len +=
++ sizeof(touch_sensor_clear_mem_window_rsp_data_t);
++ break;
++ case TOUCH_SENSOR_NOTIFY_DEV_READY_RSP:
++ valid_msg_len +=
++ sizeof(touch_sensor_notify_dev_ready_rsp_data_t);
++ break;
++ case TOUCH_SENSOR_SET_POLICIES_RSP:
++ valid_msg_len +=
++ sizeof(touch_sensor_set_policies_rsp_data_t);
++ break;
++ case TOUCH_SENSOR_GET_POLICIES_RSP:
++ valid_msg_len +=
++ sizeof(touch_sensor_get_policies_rsp_data_t);
++ break;
++ case TOUCH_SENSOR_RESET_RSP:
++ valid_msg_len +=
++ sizeof(touch_sensor_reset_rsp_data_t);
++ break;
++ }
++
++ if (valid_msg_len != msg_len) {
++ return -EINVAL;
++ }
++
++ return ret;
++}
++
++int ipts_start(ipts_info_t *ipts)
++{
++ int ret = 0;
++ /* TODO : check if we need to do SET_POLICIES_CMD
++ we need to do this when protocol version doesn't match with reported one
++ how we keep vendor specific data is the first thing to solve */
++
++ ipts_set_state(ipts, IPTS_STA_INIT);
++ ipts->num_of_parallel_data_buffers = TOUCH_SENSOR_MAX_DATA_BUFFERS;
++
++#ifdef ENABLE_IPTS_DEBUG
++ ipts->sensor_mode = TOUCH_SENSOR_MODE_HID; /* start with HID */
++#endif
++
++ ret = ipts_handle_cmd(ipts, TOUCH_SENSOR_NOTIFY_DEV_READY_CMD, NULL, 0);
++
++ return ret;
++}
++
++void ipts_stop(ipts_info_t *ipts)
++{
++ ipts_state_t old_state;
++
++ old_state = ipts_get_state(ipts);
++ ipts_set_state(ipts, IPTS_STA_STOPPING);
++
++ if (old_state < IPTS_STA_RESOURCE_READY)
++ return;
++
++ if (old_state == IPTS_STA_RAW_DATA_STARTED ||
++ old_state == IPTS_STA_HID_STARTED) {
++ ipts_free_default_resource(ipts);
++ ipts_free_raw_data_resource(ipts);
++
++ return;
++ }
++}
++
++int ipts_restart(ipts_info_t *ipts)
++{
++ int ret = 0;
++
++ ipts_dbg(ipts, "ipts restart\n");
++
++ ipts_stop(ipts);
++
++ ipts->retry++;
++ if (ipts->retry == IPTS_MAX_RETRY &&
++ ipts->sensor_mode == TOUCH_SENSOR_MODE_RAW_DATA) {
++ /* try with HID mode */
++ ipts->sensor_mode = TOUCH_SENSOR_MODE_HID;
++ } else if (ipts->retry > IPTS_MAX_RETRY) {
++ return -EPERM;
++ }
++
++ ipts_send_sensor_quiesce_io_cmd(ipts);
++ ipts->restart = true;
++
++ return ret;
++}
++
++int ipts_switch_sensor_mode(ipts_info_t *ipts, int new_sensor_mode)
++{
++ int ret = 0;
++
++ ipts->new_sensor_mode = new_sensor_mode;
++ ipts->switch_sensor_mode = true;
++ ret = ipts_send_sensor_quiesce_io_cmd(ipts);
++
++ return ret;
++}
++
++#define rsp_failed(ipts, cmd, status) ipts_err(ipts, \
++ "0x%08x failed status = %d\n", cmd, status);
++
++int ipts_handle_resp(ipts_info_t *ipts, touch_sensor_msg_m2h_t *m2h_msg,
++ u32 msg_len)
++{
++ int ret = 0;
++ int rsp_status = 0;
++ int cmd_status = 0;
++ int cmd_len = 0;
++ u32 cmd;
++
++ if (!check_validity(m2h_msg, msg_len)) {
++ ipts_err(ipts, "wrong rsp\n");
++ return -EINVAL;
++ }
++
++ rsp_status = m2h_msg->status;
++ cmd = m2h_msg->command_code;
++
++ switch (cmd) {
++ case TOUCH_SENSOR_NOTIFY_DEV_READY_RSP:
++ if (rsp_status != 0 &&
++ rsp_status != TOUCH_STATUS_SENSOR_FAIL_NONFATAL) {
++ rsp_failed(ipts, cmd, rsp_status);
++ break;
++ }
++
++ cmd_status = ipts_handle_cmd(ipts,
++ TOUCH_SENSOR_GET_DEVICE_INFO_CMD,
++ NULL, 0);
++ break;
++ case TOUCH_SENSOR_GET_DEVICE_INFO_RSP:
++ if (rsp_status != 0 &&
++ rsp_status != TOUCH_STATUS_COMPAT_CHECK_FAIL) {
++ rsp_failed(ipts, cmd, rsp_status);
++ break;
++ }
++
++ memcpy(&ipts->device_info,
++ &m2h_msg->m2h_data.device_info_rsp_data,
++ sizeof(touch_sensor_get_device_info_rsp_data_t));
++
++ /*
++ TODO : support raw_request during HID init.
++ Although HID init happens here, technically most of
++ reports (for both direction) can be issued only
++ after SET_MEM_WINDOWS_CMD since they may require
++ ME or touch IC. If ipts vendor requires raw_request
++ during HID init, we need to consider to move HID init.
++ */
++ if (ipts->hid_desc_ready == false) {
++ ret = ipts_hid_init(ipts);
++ if (ret)
++ break;
++ }
++
++ cmd_status = ipts_send_sensor_clear_mem_window_cmd(ipts);
++
++ break;
++ case TOUCH_SENSOR_CLEAR_MEM_WINDOW_RSP:
++ {
++ touch_sensor_set_mode_cmd_data_t sensor_mode_cmd;
++
++ if (rsp_status != 0 &&
++ rsp_status != TOUCH_STATUS_TIMEOUT) {
++ rsp_failed(ipts, cmd, rsp_status);
++ break;
++ }
++
++ /* allocate default resource : common & hid only */
++ if (!ipts_is_default_resource_ready(ipts)) {
++ ret = ipts_allocate_default_resource(ipts);
++ if (ret)
++ break;
++ }
++
++ if (ipts->sensor_mode == TOUCH_SENSOR_MODE_RAW_DATA &&
++ !ipts_is_raw_data_resource_ready(ipts)) {
++ ret = ipts_allocate_raw_data_resource(ipts);
++ if (ret) {
++ ipts_free_default_resource(ipts);
++ break;
++ }
++ }
++
++ ipts_set_state(ipts, IPTS_STA_RESOURCE_READY);
++
++ cmd_len = sizeof(touch_sensor_set_mode_cmd_data_t);
++ memset(&sensor_mode_cmd, 0, cmd_len);
++ sensor_mode_cmd.sensor_mode = ipts->sensor_mode;
++ cmd_status = ipts_handle_cmd(ipts,
++ TOUCH_SENSOR_SET_MODE_CMD,
++ &sensor_mode_cmd, cmd_len);
++ break;
++ }
++ case TOUCH_SENSOR_SET_MODE_RSP:
++ {
++ touch_sensor_set_mem_window_cmd_data_t smw_cmd;
++
++ if (rsp_status != 0) {
++ rsp_failed(ipts, cmd, rsp_status);
++ break;
++ }
++
++ cmd_len = sizeof(touch_sensor_set_mem_window_cmd_data_t);
++ memset(&smw_cmd, 0, cmd_len);
++ ipts_get_set_mem_window_cmd_data(ipts, &smw_cmd);
++ cmd_status = ipts_handle_cmd(ipts,
++ TOUCH_SENSOR_SET_MEM_WINDOW_CMD,
++ &smw_cmd, cmd_len);
++ break;
++ }
++ case TOUCH_SENSOR_SET_MEM_WINDOW_RSP:
++ if (rsp_status != 0) {
++ rsp_failed(ipts, cmd, rsp_status);
++ break;
++ }
++
++ cmd_status = ipts_send_sensor_hid_ready_for_data_cmd(ipts);
++ if (cmd_status)
++ break;
++
++ if (ipts->sensor_mode == TOUCH_SENSOR_MODE_HID) {
++ ipts_set_state(ipts, IPTS_STA_HID_STARTED);
++ } else if (ipts->sensor_mode == TOUCH_SENSOR_MODE_RAW_DATA) {
++ ipts_set_state(ipts, IPTS_STA_RAW_DATA_STARTED);
++ }
++
++ ipts_err(ipts, "touch enabled %d\n", ipts_get_state(ipts));
++
++ break;
++ case TOUCH_SENSOR_HID_READY_FOR_DATA_RSP:
++ {
++ touch_sensor_hid_ready_for_data_rsp_data_t *hid_data;
++ ipts_state_t state;
++
++ if (rsp_status != 0 &&
++ rsp_status != TOUCH_STATUS_SENSOR_DISABLED) {
++ rsp_failed(ipts, cmd, rsp_status);
++ break;
++ }
++
++ state = ipts_get_state(ipts);
++ if (ipts->sensor_mode == TOUCH_SENSOR_MODE_HID &&
++ state == IPTS_STA_HID_STARTED) {
++
++ hid_data = &m2h_msg->m2h_data.hid_ready_for_data_rsp_data;
++
++ /* HID mode only uses buffer 0 */
++ if (hid_data->touch_data_buffer_index != 0)
++ break;
++
++ /* handle hid data */
++ ipts_handle_hid_data(ipts, hid_data);
++ }
++
++ break;
++ }
++ case TOUCH_SENSOR_FEEDBACK_READY_RSP:
++ if (rsp_status != 0 &&
++ rsp_status != TOUCH_STATUS_COMPAT_CHECK_FAIL) {
++ rsp_failed(ipts, cmd, rsp_status);
++ break;
++ }
++
++ if (m2h_msg->m2h_data.feedback_ready_rsp_data.
++ feedback_index == TOUCH_HID_2_ME_BUFFER_ID)
++ break;
++
++ if (ipts->sensor_mode == TOUCH_SENSOR_MODE_HID) {
++ cmd_status = ipts_handle_cmd(ipts,
++ TOUCH_SENSOR_HID_READY_FOR_DATA_CMD,
++ NULL, 0);
++ }
++
++ /* reset retry since we are getting touch data */
++ ipts->retry = 0;
++
++ break;
++ case TOUCH_SENSOR_QUIESCE_IO_RSP:
++ {
++ ipts_state_t state;
++
++ if (rsp_status != 0) {
++ rsp_failed(ipts, cmd, rsp_status);
++ break;
++ }
++
++ state = ipts_get_state(ipts);
++ if (state == IPTS_STA_STOPPING && ipts->restart) {
++ ipts_dbg(ipts, "restart\n");
++ ipts_start(ipts);
++ ipts->restart = 0;
++ break;
++ }
++
++ /* support sysfs debug node for switch sensor mode */
++ if (ipts->switch_sensor_mode) {
++ ipts_set_state(ipts, IPTS_STA_INIT);
++ ipts->sensor_mode = ipts->new_sensor_mode;
++ ipts->switch_sensor_mode = false;
++
++ ipts_send_sensor_clear_mem_window_cmd(ipts);
++ }
++
++ break;
++ }
++ }
++
++ /* handle error in rsp_status */
++ if (rsp_status != 0) {
++ switch (rsp_status) {
++ case TOUCH_STATUS_SENSOR_EXPECTED_RESET:
++ case TOUCH_STATUS_SENSOR_UNEXPECTED_RESET:
++ ipts_dbg(ipts, "sensor reset %d\n", rsp_status);
++ ipts_restart(ipts);
++ break;
++ default:
++ ipts_dbg(ipts, "cmd : 0x%08x, status %d\n",
++ cmd,
++ rsp_status);
++ break;
++ }
++ }
++
++ if (cmd_status) {
++ ipts_restart(ipts);
++ }
++
++ return ret;
++}
+diff --git a/drivers/misc/ipts/ipts-msg-handler.h b/drivers/misc/ipts/ipts-msg-handler.h
+new file mode 100644
+index 0000000..b8e27d3
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-msg-handler.h
+@@ -0,0 +1,32 @@
++/*
++ *
++ * Intel Precise Touch & Stylus ME message handler
++ * Copyright (c) 2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ */
++
++#ifndef _IPTS_MSG_HANDLER_H
++#define _IPTS_MSG_HANDLER_H
++
++int ipts_handle_cmd(ipts_info_t *ipts, u32 cmd, void *data, int data_size);
++int ipts_start(ipts_info_t *ipts);
++void ipts_stop(ipts_info_t *ipts);
++int ipts_switch_sensor_mode(ipts_info_t *ipts, int new_sensor_mode);
++int ipts_handle_resp(ipts_info_t *ipts, touch_sensor_msg_m2h_t *m2h_msg,
++ u32 msg_len);
++int ipts_handle_processed_data(ipts_info_t *ipts);
++int ipts_send_feedback(ipts_info_t *ipts, int buffer_idx, u32 transaction_id);
++int ipts_send_sensor_quiesce_io_cmd(ipts_info_t *ipts);
++int ipts_send_sensor_hid_ready_for_data_cmd(ipts_info_t *ipts);
++int ipts_send_sensor_clear_mem_window_cmd(ipts_info_t *ipts);
++
++#endif /* _IPTS_MSG_HANDLER_H */
+diff --git a/drivers/misc/ipts/ipts-resource.c b/drivers/misc/ipts/ipts-resource.c
+new file mode 100644
+index 0000000..c353b81
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-resource.c
+@@ -0,0 +1,277 @@
++#include <linux/dma-mapping.h>
++
++#include "ipts.h"
++#include "ipts-mei-msgs.h"
++#include "ipts-kernel.h"
++
++static void free_common_resource(ipts_info_t *ipts)
++{
++ char *addr;
++ ipts_buffer_info_t *feedback_buffer;
++ dma_addr_t dma_addr;
++ u32 buffer_size;
++ int i, num_of_parallels;
++
++ if (ipts->resource.me2hid_buffer) {
++ devm_kfree(&ipts->cldev->dev, ipts->resource.me2hid_buffer);
++ ipts->resource.me2hid_buffer = 0;
++ }
++
++ addr = ipts->resource.hid2me_buffer.addr;
++ dma_addr = ipts->resource.hid2me_buffer.dma_addr;
++ buffer_size = ipts->resource.hid2me_buffer_size;
++
++ if (ipts->resource.hid2me_buffer.addr) {
++ dmam_free_coherent(&ipts->cldev->dev, buffer_size, addr, dma_addr);
++ ipts->resource.hid2me_buffer.addr = 0;
++ ipts->resource.hid2me_buffer.dma_addr = 0;
++ ipts->resource.hid2me_buffer_size = 0;
++ }
++
++ feedback_buffer = ipts->resource.feedback_buffer;
++ num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
++ for (i = 0; i < num_of_parallels; i++) {
++ if (feedback_buffer[i].addr) {
++ dmam_free_coherent(&ipts->cldev->dev,
++ ipts->device_info.feedback_size,
++ feedback_buffer[i].addr,
++ feedback_buffer[i].dma_addr);
++ feedback_buffer[i].addr = 0;
++ feedback_buffer[i].dma_addr = 0;
++ }
++ }
++}
++
++static int allocate_common_resource(ipts_info_t *ipts)
++{
++ char *addr, *me2hid_addr;
++ ipts_buffer_info_t *feedback_buffer;
++ dma_addr_t dma_addr;
++ int i, ret = 0, num_of_parallels;
++ u32 buffer_size;
++
++ buffer_size = ipts->device_info.feedback_size;
++
++ addr = dmam_alloc_coherent(&ipts->cldev->dev,
++ buffer_size,
++ &dma_addr,
++ GFP_ATOMIC|GFP_DMA32);
++ if (addr == NULL)
++ return -ENOMEM;
++
++ me2hid_addr = devm_kzalloc(&ipts->cldev->dev, buffer_size, GFP_KERNEL);
++ if (me2hid_addr == NULL) {
++ ret = -ENOMEM;
++ goto release_resource;
++ }
++
++ ipts->resource.hid2me_buffer.addr = addr;
++ ipts->resource.hid2me_buffer.dma_addr = dma_addr;
++ ipts->resource.hid2me_buffer_size = buffer_size;
++ ipts->resource.me2hid_buffer = me2hid_addr;
++
++ feedback_buffer = ipts->resource.feedback_buffer;
++ num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
++ for (i = 0; i < num_of_parallels; i++) {
++ feedback_buffer[i].addr = dmam_alloc_coherent(&ipts->cldev->dev,
++ ipts->device_info.feedback_size,
++ &feedback_buffer[i].dma_addr,
++ GFP_ATOMIC|GFP_DMA32);
++
++ if (feedback_buffer[i].addr == NULL) {
++ ret = -ENOMEM;
++ goto release_resource;
++ }
++ }
++
++ return 0;
++
++release_resource:
++ free_common_resource(ipts);
++
++ return ret;
++}
++
++void ipts_free_raw_data_resource(ipts_info_t *ipts)
++{
++ if (ipts_is_raw_data_resource_ready(ipts)) {
++ ipts->resource.raw_data_resource_ready = false;
++
++ ipts_release_kernels(ipts);
++ }
++}
++
++static int allocate_hid_resource(ipts_info_t *ipts)
++{
++ ipts_buffer_info_t *buffer_hid;
++
++ /* hid mode uses only one touch data buffer */
++ buffer_hid = &ipts->resource.touch_data_buffer_hid;
++ buffer_hid->addr = dmam_alloc_coherent(&ipts->cldev->dev,
++ ipts->device_info.frame_size,
++ &buffer_hid->dma_addr,
++ GFP_ATOMIC|GFP_DMA32);
++ if (buffer_hid->addr == NULL) {
++ return -ENOMEM;
++ }
++
++ return 0;
++}
++
++static void free_hid_resource(ipts_info_t *ipts)
++{
++ ipts_buffer_info_t *buffer_hid;
++
++ buffer_hid = &ipts->resource.touch_data_buffer_hid;
++ if (buffer_hid->addr) {
++ dmam_free_coherent(&ipts->cldev->dev,
++ ipts->device_info.frame_size,
++ buffer_hid->addr,
++ buffer_hid->dma_addr);
++ buffer_hid->addr = 0;
++ buffer_hid->dma_addr = 0;
++ }
++}
++
++int ipts_allocate_default_resource(ipts_info_t *ipts)
++{
++ int ret;
++
++ ret = allocate_common_resource(ipts);
++ if (ret) {
++ ipts_dbg(ipts, "cannot allocate common resource\n");
++ return ret;
++ }
++
++ ret = allocate_hid_resource(ipts);
++ if (ret) {
++ ipts_dbg(ipts, "cannot allocate hid resource\n");
++ free_common_resource(ipts);
++ return ret;
++ }
++
++ ipts->resource.default_resource_ready = true;
++
++ return 0;
++}
++
++void ipts_free_default_resource(ipts_info_t *ipts)
++{
++ if (ipts_is_default_resource_ready(ipts)) {
++ ipts->resource.default_resource_ready = false;
++
++ free_hid_resource(ipts);
++ free_common_resource(ipts);
++ }
++}
++
++int ipts_allocate_raw_data_resource(ipts_info_t *ipts)
++{
++ int ret = 0;
++
++ ret = ipts_init_kernels(ipts);
++ if (ret) {
++ return ret;
++ }
++
++ ipts->resource.raw_data_resource_ready = true;
++
++ return 0;
++}
++
++static void get_hid_only_smw_cmd_data(ipts_info_t *ipts,
++ touch_sensor_set_mem_window_cmd_data_t *data,
++ ipts_resource_t *resrc)
++{
++ ipts_buffer_info_t *touch_buf;
++ ipts_buffer_info_t *feedback_buf;
++
++ touch_buf = &resrc->touch_data_buffer_hid;
++ feedback_buf = &resrc->feedback_buffer[0];
++
++ data->touch_data_buffer_addr_lower[0] =
++ lower_32_bits(touch_buf->dma_addr);
++ data->touch_data_buffer_addr_upper[0] =
++ upper_32_bits(touch_buf->dma_addr);
++ data->feedback_buffer_addr_lower[0] =
++ lower_32_bits(feedback_buf->dma_addr);
++ data->feedback_buffer_addr_upper[0] =
++ upper_32_bits(feedback_buf->dma_addr);
++}
++
++static void get_raw_data_only_smw_cmd_data(ipts_info_t *ipts,
++ touch_sensor_set_mem_window_cmd_data_t *data,
++ ipts_resource_t *resrc)
++{
++ u64 wq_tail_phy_addr;
++ u64 cookie_phy_addr;
++ ipts_buffer_info_t *touch_buf;
++ ipts_buffer_info_t *feedback_buf;
++ int i, num_of_parallels;
++
++ touch_buf = resrc->touch_data_buffer_raw;
++ feedback_buf = resrc->feedback_buffer;
++
++ num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
++ for (i = 0; i < num_of_parallels; i++) {
++ data->touch_data_buffer_addr_lower[i] =
++ lower_32_bits(touch_buf[i].dma_addr);
++ data->touch_data_buffer_addr_upper[i] =
++ upper_32_bits(touch_buf[i].dma_addr);
++ data->feedback_buffer_addr_lower[i] =
++ lower_32_bits(feedback_buf[i].dma_addr);
++ data->feedback_buffer_addr_upper[i] =
++ upper_32_bits(feedback_buf[i].dma_addr);
++ }
++
++ wq_tail_phy_addr = resrc->wq_info.wq_tail_phy_addr;
++ data->tail_offset_addr_lower = lower_32_bits(wq_tail_phy_addr);
++ data->tail_offset_addr_upper = upper_32_bits(wq_tail_phy_addr);
++
++ cookie_phy_addr = resrc->wq_info.db_phy_addr +
++ resrc->wq_info.db_cookie_offset;
++ data->doorbell_cookie_addr_lower = lower_32_bits(cookie_phy_addr);
++ data->doorbell_cookie_addr_upper = upper_32_bits(cookie_phy_addr);
++ data->work_queue_size = resrc->wq_info.wq_size;
++
++ data->work_queue_item_size = resrc->wq_item_size;
++}
++
++void ipts_get_set_mem_window_cmd_data(ipts_info_t *ipts,
++ touch_sensor_set_mem_window_cmd_data_t *data)
++{
++ ipts_resource_t *resrc = &ipts->resource;
++
++ if (ipts->sensor_mode == TOUCH_SENSOR_MODE_RAW_DATA)
++ get_raw_data_only_smw_cmd_data(ipts, data, resrc);
++ else if (ipts->sensor_mode == TOUCH_SENSOR_MODE_HID)
++ get_hid_only_smw_cmd_data(ipts, data, resrc);
++
++ /* hid2me is common for "raw data" and "hid" */
++ data->hid2me_buffer_addr_lower =
++ lower_32_bits(resrc->hid2me_buffer.dma_addr);
++ data->hid2me_buffer_addr_upper =
++ upper_32_bits(resrc->hid2me_buffer.dma_addr);
++ data->hid2me_buffer_size = resrc->hid2me_buffer_size;
++}
++
++void ipts_set_input_buffer(ipts_info_t *ipts, int parallel_idx,
++ u8* cpu_addr, u64 dma_addr)
++{
++ ipts_buffer_info_t *touch_buf;
++
++ touch_buf = ipts->resource.touch_data_buffer_raw;
++ touch_buf[parallel_idx].dma_addr = dma_addr;
++ touch_buf[parallel_idx].addr = cpu_addr;
++}
++
++void ipts_set_output_buffer(ipts_info_t *ipts, int parallel_idx, int output_idx,
++ u8* cpu_addr, u64 dma_addr)
++{
++ ipts_buffer_info_t *output_buf;
++
++ output_buf = &ipts->resource.raw_data_mode_output_buffer[parallel_idx][output_idx];
++
++ output_buf->dma_addr = dma_addr;
++ output_buf->addr = cpu_addr;
++}
+diff --git a/drivers/misc/ipts/ipts-resource.h b/drivers/misc/ipts/ipts-resource.h
+new file mode 100644
+index 0000000..7d66ac7
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-resource.h
+@@ -0,0 +1,30 @@
++/*
++ * Intel Precise Touch & Stylus state codes
++ *
++ * Copyright (c) 2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ */
++
++#ifndef _IPTS_RESOURCE_H_
++#define _IPTS_RESOURCE_H_
++
++int ipts_allocate_default_resource(ipts_info_t *ipts);
++void ipts_free_default_resource(ipts_info_t *ipts);
++int ipts_allocate_raw_data_resource(ipts_info_t *ipts);
++void ipts_free_raw_data_resource(ipts_info_t *ipts);
++void ipts_get_set_mem_window_cmd_data(ipts_info_t *ipts,
++ touch_sensor_set_mem_window_cmd_data_t *data);
++void ipts_set_input_buffer(ipts_info_t *ipts, int parallel_idx,
++ u8* cpu_addr, u64 dma_addr);
++void ipts_set_output_buffer(ipts_info_t *ipts, int parallel_idx, int output_idx,
++ u8* cpu_addr, u64 dma_addr);
++
++#endif // _IPTS_RESOURCE_H_
+diff --git a/drivers/misc/ipts/ipts-sensor-regs.h b/drivers/misc/ipts/ipts-sensor-regs.h
+new file mode 100644
+index 0000000..96812b0
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-sensor-regs.h
+@@ -0,0 +1,700 @@
++/*
++ * Touch Sensor Register definition
++ *
++ * Copyright (c) 2013-2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ */
++
++
++#ifndef _TOUCH_SENSOR_REGS_H
++#define _TOUCH_SENSOR_REGS_H
++
++#pragma pack(1)
++
++// define C_ASSERT macro to check structure size and fail compile for unexpected mismatch
++#ifndef C_ASSERT
++#define C_ASSERT(e) typedef char __C_ASSERT__[(e)?1:-1]
++#endif
++
++//
++// Compatibility versions for this header file
++//
++#define TOUCH_EDS_REV_MINOR 0
++#define TOUCH_EDS_REV_MAJOR 1
++#define TOUCH_EDS_INTF_REV 1
++#define TOUCH_PROTOCOL_VER 0
++
++
++//
++// Offset 00h: TOUCH_STS: Status Register
++// This register is read by the SPI Controller immediately following an interrupt.
++//
++#define TOUCH_STS_REG_OFFSET 0x00
++
++typedef enum touch_sts_reg_int_type
++{
++ TOUCH_STS_REG_INT_TYPE_DATA_AVAIL = 0, // Touch Data Available
++ TOUCH_STS_REG_INT_TYPE_RESET_OCCURRED, // Reset Occurred
++ TOUCH_STS_REG_INT_TYPE_ERROR_OCCURRED, // Error Occurred
++ TOUCH_STS_REG_INT_TYPE_VENDOR_DATA, // Vendor specific data, treated same as raw frame
++ TOUCH_STS_REG_INT_TYPE_GET_FEATURES, // Get Features response data available
++ TOUCH_STS_REG_INT_TYPE_MAX
++} touch_sts_reg_int_type_t;
++C_ASSERT(sizeof(touch_sts_reg_int_type_t) == 4);
++
++typedef enum touch_sts_reg_pwr_state
++{
++ TOUCH_STS_REG_PWR_STATE_SLEEP = 0, // Sleep
++ TOUCH_STS_REG_PWR_STATE_DOZE, // Doze
++ TOUCH_STS_REG_PWR_STATE_ARMED, // Armed
++ TOUCH_STS_REG_PWR_STATE_SENSING, // Sensing
++ TOUCH_STS_REG_PWR_STATE_MAX
++} touch_sts_reg_pwr_state_t;
++C_ASSERT(sizeof(touch_sts_reg_pwr_state_t) == 4);
++
++typedef enum touch_sts_reg_init_state
++{
++ TOUCH_STS_REG_INIT_STATE_READY_FOR_OP = 0, // Ready for normal operation
++ TOUCH_STS_REG_INIT_STATE_FW_NEEDED, // Touch IC needs its Firmware loaded
++ TOUCH_STS_REG_INIT_STATE_DATA_NEEDED, // Touch IC needs its Data loaded
++ TOUCH_STS_REG_INIT_STATE_INIT_ERROR, // Error info in TOUCH_ERR_REG
++ TOUCH_STS_REG_INIT_STATE_MAX
++} touch_sts_reg_init_state_t;
++C_ASSERT(sizeof(touch_sts_reg_init_state_t) == 4);
++
++#define TOUCH_SYNC_BYTE_VALUE 0x5A
++
++typedef union touch_sts_reg
++{
++ u32 reg_value;
++
++ struct
++ {
++ // When set, this indicates the hardware has data that needs to be read.
++ u32 int_status :1;
++ // see TOUCH_STS_REG_INT_TYPE
++ u32 int_type :4;
++ // see TOUCH_STS_REG_PWR_STATE
++ u32 pwr_state :2;
++ // see TOUCH_STS_REG_INIT_STATE
++ u32 init_state :2;
++ // Busy bit indicates that sensor cannot accept writes at this time
++ u32 busy :1;
++ // Reserved
++ u32 reserved :14;
++ // Synchronization bit, should always be TOUCH_SYNC_BYTE_VALUE
++ u32 sync_byte :8;
++ } fields;
++} touch_sts_reg_t;
++C_ASSERT(sizeof(touch_sts_reg_t) == 4);
++
++
++//
++// Offset 04h: TOUCH_FRAME_CHAR: Frame Characteristics Register
++// This registers describes the characteristics of each data frame read by the SPI Controller in
++// response to a touch interrupt.
++//
++#define TOUCH_FRAME_CHAR_REG_OFFSET 0x04
++
++typedef union touch_frame_char_reg
++{
++ u32 reg_value;
++
++ struct
++ {
++ // Micro-Frame Size (MFS): Indicates the size of a touch micro-frame in byte increments.
++ // When a micro-frame is to be read for processing (in data mode), this is the total number of
++ // bytes that must be read per interrupt, split into multiple read commands no longer than RPS.
++ // Maximum micro-frame size is 256KB.
++ u32 microframe_size :18;
++ // Micro-Frames per Frame (MFPF): Indicates the number of micro-frames per frame. If a
++ // sensor's frame does not contain micro-frames this value will be 1. Valid values are 1-31.
++ u32 microframes_per_frame :5;
++ // Micro-Frame Index (MFI): Indicates the index of the micro-frame within a frame. This allows
++ // the SPI Controller to maintain synchronization with the sensor and determine when the final
++ // micro-frame has arrived. Valid values are 1-31.
++ u32 microframe_index :5;
++ // HID/Raw Data: This bit describes whether the data from the sensor is Raw data or a HID
++ // report. When set, the data is a HID report.
++ u32 hid_report :1;
++ // Reserved
++ u32 reserved :3;
++ } fields;
++} touch_frame_char_reg_t;
++C_ASSERT(sizeof(touch_frame_char_reg_t) == 4);
++
++
++//
++// Offset 08h: Touch Error Register
++//
++#define TOUCH_ERR_REG_OFFSET 0x08
++
++// bit definition is vendor specific
++typedef union touch_err_reg
++{
++ u32 reg_value;
++
++ struct
++ {
++ u32 invalid_fw :1;
++ u32 invalid_data :1;
++ u32 self_test_failed :1;
++ u32 reserved :12;
++ u32 fatal_error :1;
++ u32 vendor_errors :16;
++ } fields;
++} touch_err_reg_t;
++C_ASSERT(sizeof(touch_err_reg_t) == 4);
++
++
++//
++// Offset 0Ch: RESERVED
++// This register is reserved for future use.
++//
++
++
++//
++// Offset 10h: Touch Identification Register
++//
++#define TOUCH_ID_REG_OFFSET 0x10
++
++#define TOUCH_ID_REG_VALUE 0x43495424
++
++// expected value is "$TIC" or 0x43495424
++typedef u32 touch_id_reg_t;
++C_ASSERT(sizeof(touch_id_reg_t) == 4);
++
++
++//
++// Offset 14h: TOUCH_DATA_SZ: Touch Data Size Register
++// This register describes the maximum size of frames and feedback data
++//
++#define TOUCH_DATA_SZ_REG_OFFSET 0x14
++
++#define TOUCH_MAX_FRAME_SIZE_INCREMENT 64
++#define TOUCH_MAX_FEEDBACK_SIZE_INCREMENT 64
++
++#define TOUCH_SENSOR_MAX_FRAME_SIZE (32 * 1024) // Max allowed frame size 32KB
++#define TOUCH_SENSOR_MAX_FEEDBACK_SIZE (16 * 1024) // Max allowed feedback size 16KB
++
++typedef union touch_data_sz_reg
++{
++ u32 reg_value;
++
++ struct
++ {
++ // This value describes the maximum frame size in 64byte increments.
++ u32 max_frame_size :12;
++ // This value describes the maximum feedback size in 64byte increments.
++ u32 max_feedback_size :8;
++ // Reserved
++ u32 reserved :12;
++ } fields;
++} touch_data_sz_reg_t;
++C_ASSERT(sizeof(touch_data_sz_reg_t) == 4);
++
++
++//
++// Offset 18h: TOUCH_CAPABILITIES: Touch Capabilities Register
++// This register informs the host as to the capabilities of the touch IC.
++//
++#define TOUCH_CAPS_REG_OFFSET 0x18
++
++typedef enum touch_caps_reg_read_delay_time
++{
++ TOUCH_CAPS_REG_READ_DELAY_TIME_0,
++ TOUCH_CAPS_REG_READ_DELAY_TIME_10uS,
++ TOUCH_CAPS_REG_READ_DELAY_TIME_50uS,
++ TOUCH_CAPS_REG_READ_DELAY_TIME_100uS,
++ TOUCH_CAPS_REG_READ_DELAY_TIME_150uS,
++ TOUCH_CAPS_REG_READ_DELAY_TIME_250uS,
++ TOUCH_CAPS_REG_READ_DELAY_TIME_500uS,
++ TOUCH_CAPS_REG_READ_DELAY_TIME_1mS,
++} touch_caps_reg_read_delay_time_t;
++C_ASSERT(sizeof(touch_caps_reg_read_delay_time_t) == 4);
++
++#define TOUCH_BULK_DATA_MAX_WRITE_INCREMENT 64
++
++typedef union touch_caps_reg
++{
++ u32 reg_value;
++
++ struct
++ {
++ // Reserved for future frequency
++ u32 reserved0 :1;
++ // 17 MHz (14 MHz on Atom) Supported: 0b - Not supported, 1b - Supported
++ u32 supported_17Mhz :1;
++ // 30 MHz (25MHz on Atom) Supported: 0b - Not supported, 1b - Supported
++ u32 supported_30Mhz :1;
++ // 50 MHz Supported: 0b - Not supported, 1b - Supported
++ u32 supported_50Mhz :1;
++ // Reserved
++ u32 reserved1 :4;
++ // Single I/O Supported: 0b - Not supported, 1b - Supported
++ u32 supported_single_io :1;
++ // Dual I/O Supported: 0b - Not supported, 1b - Supported
++ u32 supported_dual_io :1;
++ // Quad I/O Supported: 0b - Not supported, 1b - Supported
++ u32 supported_quad_io :1;
++ // Bulk Data Area Max Write Size: The amount of data the SPI Controller can write to the bulk
++ // data area before it has to poll the busy bit. This field is in multiples of 64 bytes. The
++ // SPI Controller will write the amount of data specified in this field, then check and wait
++ // for the Status.Busy bit to be zero before writing the next data chunk. This field is 6 bits
++ // long, allowing for 4KB of contiguous writes w/o a poll of the busy bit. If this field is
++ // 0x00 the Touch IC has no limit in the amount of data the SPI Controller can write to the
++ // bulk data area.
++ u32 bulk_data_max_write :6;
++ // Read Delay Timer Value: This field describes the delay the SPI Controller will initiate when
++ // a read interrupt follows a write data command. Uses values from TOUCH_CAPS_REG_READ_DELAY_TIME
++ u32 read_delay_timer_value :3;
++ // Reserved
++ u32 reserved2 :4;
++ // Maximum Touch Points: A byte value based on the HID descriptor definition.
++ u32 max_touch_points :8;
++ } fields;
++} touch_caps_reg_t;
++C_ASSERT(sizeof(touch_caps_reg_t) == 4);
++
++
++//
++// Offset 1Ch: TOUCH_CFG: Touch Configuration Register
++// This register allows the SPI Controller to configure the touch sensor as needed during touch
++// operations.
++//
++#define TOUCH_CFG_REG_OFFSET 0x1C
++
++typedef enum touch_cfg_reg_bulk_xfer_size
++{
++ TOUCH_CFG_REG_BULK_XFER_SIZE_4B = 0, // Bulk Data Transfer Size is 4 bytes
++ TOUCH_CFG_REG_BULK_XFER_SIZE_8B, // Bulk Data Transfer Size is 8 bytes
++ TOUCH_CFG_REG_BULK_XFER_SIZE_16B, // Bulk Data Transfer Size is 16 bytes
++ TOUCH_CFG_REG_BULK_XFER_SIZE_32B, // Bulk Data Transfer Size is 32 bytes
++ TOUCH_CFG_REG_BULK_XFER_SIZE_64B, // Bulk Data Transfer Size is 64 bytes
++ TOUCH_CFG_REG_BULK_XFER_SIZE_MAX
++} touch_cfg_reg_bulk_xfer_size_t;
++C_ASSERT(sizeof(touch_cfg_reg_bulk_xfer_size_t) == 4);
++
++// Frequency values used by TOUCH_CFG_REG and TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.
++typedef enum touch_freq
++{
++ TOUCH_FREQ_RSVD = 0, // Reserved value
++ TOUCH_FREQ_17MHZ, // Sensor set for 17MHz operation (14MHz on Atom)
++ TOUCH_FREQ_30MHZ, // Sensor set for 30MHz operation (25MHz on Atom)
++ TOUCH_FREQ_MAX // Invalid value
++} touch_freq_t;
++C_ASSERT(sizeof(touch_freq_t) == 4);
++
++typedef union touch_cfg_reg
++{
++ u32 reg_value;
++
++ struct
++ {
++ // Touch Enable (TE): This bit is used as a HW semaphore for the Touch IC to guarantee to the
++ // SPI Controller to that (when 0) no sensing operations will occur and only the Reset
++ // interrupt will be generated. When TE is cleared by the SPI Controller:
++ // - TICs must flush all output buffers
++ // - TICs must De-assert any pending interrupt
++ // - ME must throw away any partial frame and pending interrupt must be cleared/not serviced.
++ // The SPI Controller will only modify the configuration of the TIC when TE is cleared. TE is
++ // defaulted to 0h on a power-on reset.
++ u32 touch_enable :1;
++ // Data/HID Packet Mode (DHPM): Raw Data Mode: 0h, HID Packet Mode: 1h
++ u32 dhpm :1;
++ // Bulk Data Transfer Size: This field represents the amount of data written to the Bulk Data
++ // Area (SPI Offset 0x1000-0x2FFF) in a single SPI write protocol
++ u32 bulk_xfer_size :4;
++ // Frequency Select: Frequency for the TouchIC to run at. Use values from TOUCH_FREQ
++ u32 freq_select :3;
++ // Reserved
++ u32 reserved :23;
++ } fields;
++} touch_cfg_reg_t;
++C_ASSERT(sizeof(touch_cfg_reg_t) == 4);
++
++
++//
++// Offset 20h: TOUCH_CMD: Touch Command Register
++// This register is used for sending commands to the Touch IC.
++//
++#define TOUCH_CMD_REG_OFFSET 0x20
++
++typedef enum touch_cmd_reg_code
++{
++ TOUCH_CMD_REG_CODE_NOP = 0, // No Operation
++ TOUCH_CMD_REG_CODE_SOFT_RESET, // Soft Reset
++ TOUCH_CMD_REG_CODE_PREP_4_READ, // Prepare All Registers for Read
++ TOUCH_CMD_REG_CODE_GEN_TEST_PACKETS, // Generate Test Packets according to value in TOUCH_TEST_CTRL_REG
++ TOUCH_CMD_REG_CODE_MAX
++} touch_cmd_reg_code_t;
++C_ASSERT(sizeof(touch_cmd_reg_code_t) == 4);
++
++typedef union touch_cmd_reg
++{
++ u32 reg_value;
++
++ struct
++ {
++ // Command Code: See TOUCH_CMD_REG_CODE
++ u32 command_code :8;
++ // Reserved
++ u32 reserved :24;
++ } fields;
++} touch_cmd_reg_t;
++C_ASSERT(sizeof(touch_cmd_reg_t) == 4);
++
++
++//
++// Offset 24h: Power Management Control
++// This register is used for active power management. The Touch IC is allowed to mover from Doze or
++// Armed to Sensing after a touch has occurred. All other transitions will be made at the request
++// of the SPI Controller.
++//
++#define TOUCH_PWR_MGMT_CTRL_REG_OFFSET 0x24
++
++typedef enum touch_pwr_mgmt_ctrl_reg_cmd
++{
++ TOUCH_PWR_MGMT_CTRL_REG_CMD_NOP = 0, // No change to power state
++ TOUCH_PWR_MGMT_CTRL_REG_CMD_SLEEP, // Sleep - set when the system goes into connected standby
++ TOUCH_PWR_MGMT_CTRL_REG_CMD_DOZE, // Doze - set after 300 seconds of inactivity
++ TOUCH_PWR_MGMT_CTRL_REG_CMD_ARMED, // Armed - Set by FW when a "finger off" message is received from the EUs
++ TOUCH_PWR_MGMT_CTRL_REG_CMD_SENSING, // Sensing - not typically set by FW
++ TOUCH_PWR_MGMT_CTRL_REG_CMD_MAX // Values will result in no change to the power state of the Touch IC
++} touch_pwr_mgmt_ctrl_reg_cmd_t;
++C_ASSERT(sizeof(touch_pwr_mgmt_ctrl_reg_cmd_t) == 4);
++
++typedef union touch_pwr_mgmt_ctrl_reg
++{
++ u32 reg_value;
++
++ struct
++ {
++ // Power State Command: See TOUCH_PWR_MGMT_CTRL_REG_CMD
++ u32 pwr_state_cmd :3;
++ // Reserved
++ u32 reserved :29;
++ } fields;
++} touch_pwr_mgmt_ctrl_reg_t;
++C_ASSERT(sizeof(touch_pwr_mgmt_ctrl_reg_t) == 4);
++
++
++//
++// Offset 28h: Vendor HW Information Register
++// This register is used to relay Intel-assigned vendor ID information to the SPI Controller, which
++// may be forwarded to SW running on the host CPU.
++//
++#define TOUCH_VEN_HW_INFO_REG_OFFSET 0x28
++
++typedef union touch_ven_hw_info_reg
++{
++ u32 reg_value;
++
++ struct
++ {
++ // Touch Sensor Vendor ID
++ u32 vendor_id :16;
++ // Touch Sensor Device ID
++ u32 device_id :16;
++ } fields;
++} touch_ven_hw_info_reg_t;
++C_ASSERT(sizeof(touch_ven_hw_info_reg_t) == 4);
++
++
++//
++// Offset 2Ch: HW Revision ID Register
++// This register is used to relay vendor HW revision information to the SPI Controller which may be
++// forwarded to SW running on the host CPU.
++//
++#define TOUCH_HW_REV_REG_OFFSET 0x2C
++
++typedef u32 touch_hw_rev_reg_t; // bit definition is vendor specific
++C_ASSERT(sizeof(touch_hw_rev_reg_t) == 4);
++
++
++//
++// Offset 30h: FW Revision ID Register
++// This register is used to relay vendor FW revision information to the SPI Controller which may be
++// forwarded to SW running on the host CPU.
++//
++#define TOUCH_FW_REV_REG_OFFSET 0x30
++
++typedef u32 touch_fw_rev_reg_t; // bit definition is vendor specific
++C_ASSERT(sizeof(touch_fw_rev_reg_t) == 4);
++
++
++//
++// Offset 34h: Compatibility Revision ID Register
++// This register is used to relay vendor compatibility information to the SPI Controller which may
++// be forwarded to SW running on the host CPU. Compatibility Information is a numeric value given
++// by Intel to the Touch IC vendor based on the major and minor revision of the EDS supported. From
++// a nomenclature point of view in an x.y revision number of the EDS, the major version is the value
++// of x and the minor version is the value of y. For example, a Touch IC supporting an EDS version
++// of 0.61 would contain a major version of 0 and a minor version of 61 in the register.
++//
++#define TOUCH_COMPAT_REV_REG_OFFSET 0x34
++
++typedef union touch_compat_rev_reg
++{
++ u32 reg_value;
++
++ struct
++ {
++ // EDS Minor Revision
++ u8 minor;
++ // EDS Major Revision
++ u8 major;
++ // Interface Revision Number (from EDS)
++ u8 intf_rev;
++ // EU Kernel Compatibility Version - vendor specific value
++ u8 kernel_compat_ver;
++ } fields;
++} touch_compat_rev_reg_t;
++C_ASSERT(sizeof(touch_compat_rev_reg_t) == 4);
++
++
++//
++// Touch Register Block is the full set of registers from offset 0x00h to 0x3F
++// This is the entire set of registers needed for normal touch operation. It does not include test
++// registers such as TOUCH_TEST_CTRL_REG
++//
++#define TOUCH_REG_BLOCK_OFFSET TOUCH_STS_REG_OFFSET
++
++typedef struct touch_reg_block
++{
++ touch_sts_reg_t sts_reg; // 0x00
++ touch_frame_char_reg_t frame_char_reg; // 0x04
++ touch_err_reg_t error_reg; // 0x08
++ u32 reserved0; // 0x0C
++ touch_id_reg_t id_reg; // 0x10
++ touch_data_sz_reg_t data_size_reg; // 0x14
++ touch_caps_reg_t caps_reg; // 0x18
++ touch_cfg_reg_t cfg_reg; // 0x1C
++ touch_cmd_reg_t cmd_reg; // 0x20
++ touch_pwr_mgmt_ctrl_reg_t pwm_mgme_ctrl_reg; // 0x24
++ touch_ven_hw_info_reg_t ven_hw_info_reg; // 0x28
++ touch_hw_rev_reg_t hw_rev_reg; // 0x2C
++ touch_fw_rev_reg_t fw_rev_reg; // 0x30
++ touch_compat_rev_reg_t compat_rev_reg; // 0x34
++ u32 reserved1; // 0x38
++ u32 reserved2; // 0x3C
++} touch_reg_block_t;
++C_ASSERT(sizeof(touch_reg_block_t) == 64);
++
++
++//
++// Offset 40h: Test Control Register
++// This register
++//
++#define TOUCH_TEST_CTRL_REG_OFFSET 0x40
++
++typedef union touch_test_ctrl_reg
++{
++ u32 reg_value;
++
++ struct
++ {
++ // Size of Test Frame in Raw Data Mode: This field specifies the test frame size in raw data
++ // mode in multiple of 64 bytes. For example, if this field value is 16, the test frame size
++ // will be 16x64 = 1K.
++ u32 raw_test_frame_size :16;
++ // Number of Raw Data Frames or HID Report Packets Generation. This field represents the number
++ // of test frames or HID reports to be generated when test mode is enabled. When multiple
++ // packets/frames are generated, they need be generated at 100 Hz frequency, i.e. 10ms per
++ // packet/frame.
++ u32 num_test_frames :16;
++ } fields;
++} touch_test_ctrl_reg_t;
++C_ASSERT(sizeof(touch_test_ctrl_reg_t) == 4);
++
++
++//
++// Offsets 0x000 to 0xFFF are reserved for Intel-defined Registers
++//
++#define TOUCH_REGISTER_LIMIT 0xFFF
++
++
++//
++// Data Window: Address 0x1000-0x1FFFF
++// The data window is reserved for writing and reading large quantities of data to and from the
++// sensor.
++//
++#define TOUCH_DATA_WINDOW_OFFSET 0x1000
++#define TOUCH_DATA_WINDOW_LIMIT 0x1FFFF
++
++#define TOUCH_SENSOR_MAX_OFFSET TOUCH_DATA_WINDOW_LIMIT
++
++
++//
++// The following data structures represent the headers defined in the Data Structures chapter of the
++// Intel Integrated Touch EDS
++//
++
++// Enumeration used in TOUCH_RAW_DATA_HDR
++typedef enum touch_raw_data_types
++{
++ TOUCH_RAW_DATA_TYPE_FRAME = 0,
++ TOUCH_RAW_DATA_TYPE_ERROR, // RawData will be the TOUCH_ERROR struct below
++ TOUCH_RAW_DATA_TYPE_VENDOR_DATA, // Set when InterruptType is Vendor Data
++ TOUCH_RAW_DATA_TYPE_HID_REPORT,
++ TOUCH_RAW_DATA_TYPE_GET_FEATURES,
++ TOUCH_RAW_DATA_TYPE_MAX
++} touch_raw_data_types_t;
++C_ASSERT(sizeof(touch_raw_data_types_t) == 4);
++
++// Private data structure. Kernels must copy to HID driver buffer
++typedef struct touch_hid_private_data
++{
++ u32 transaction_id;
++ u8 reserved[28];
++} touch_hid_private_data_t;
++C_ASSERT(sizeof(touch_hid_private_data_t) == 32);
++
++// This is the data structure sent from the PCH FW to the EU kernel
++typedef struct touch_raw_data_hdr
++{
++ u32 data_type; // use values from TOUCH_RAW_DATA_TYPES
++ u32 raw_data_size_bytes; // The size in bytes of the raw data read from the
++ // sensor, does not include TOUCH_RAW_DATA_HDR. Will
++ // be the sum of all uFrames, or size of TOUCH_ERROR
++ // for if DataType is TOUCH_RAW_DATA_TYPE_ERROR
++ u32 buffer_id; // An ID to qualify with the feedback data to track
++ // buffer usage
++ u32 protocol_ver; // Must match protocol version of the EDS
++ u8 kernel_compat_id; // Copied from the Compatibility Revision ID Reg
++ u8 reserved[15]; // Padding to extend header to full 64 bytes and
++ // allow for growth
++ touch_hid_private_data_t hid_private_data; // Private data structure. Kernels must copy to HID
++ // driver buffer
++} touch_raw_data_hdr_t;
++C_ASSERT(sizeof(touch_raw_data_hdr_t) == 64);
++
++typedef struct touch_raw_data
++{
++ touch_raw_data_hdr_t header;
++ u8 raw_data[1]; // used to access the raw data as an array and keep the
++ // compilers happy. Actual size of this array is
++ // Header.RawDataSizeBytes
++} touch_raw_data_t;
++
++
++// The following section describes the data passed in TOUCH_RAW_DATA.RawData when DataType equals
++// TOUCH_RAW_DATA_TYPE_ERROR
++// Note: This data structure is also applied to HID mode
++typedef enum touch_err_types
++{
++ TOUCH_RAW_DATA_ERROR = 0,
++ TOUCH_RAW_ERROR_MAX
++} touch_err_types_t;
++C_ASSERT(sizeof(touch_err_types_t) == 4);
++
++typedef union touch_me_fw_error
++{
++ u32 value;
++
++ struct
++ {
++ u32 invalid_frame_characteristics : 1;
++ u32 microframe_index_invalid : 1;
++ u32 reserved : 30;
++ } fields;
++} touch_me_fw_error_t;
++C_ASSERT(sizeof(touch_me_fw_error_t) == 4);
++
++typedef struct touch_error
++{
++ u8 touch_error_type; // This must be a value from TOUCH_ERROR_TYPES
++ u8 reserved[3];
++ touch_me_fw_error_t touch_me_fw_error;
++ touch_err_reg_t touch_error_register; // Contains the value copied from the Touch Error Reg
++} touch_error_t;
++C_ASSERT(sizeof(touch_error_t) == 12);
++
++// Enumeration used in TOUCH_FEEDBACK_BUFFER
++typedef enum touch_feedback_cmd_types
++{
++ TOUCH_FEEDBACK_CMD_TYPE_NONE = 0,
++ TOUCH_FEEDBACK_CMD_TYPE_SOFT_RESET,
++ TOUCH_FEEDBACK_CMD_TYPE_GOTO_ARMED,
++ TOUCH_FEEDBACK_CMD_TYPE_GOTO_SENSING,
++ TOUCH_FEEDBACK_CMD_TYPE_GOTO_SLEEP,
++ TOUCH_FEEDBACK_CMD_TYPE_GOTO_DOZE,
++ TOUCH_FEEDBACK_CMD_TYPE_HARD_RESET,
++ TOUCH_FEEDBACK_CMD_TYPE_MAX
++} touch_feedback_cmd_types_t;
++C_ASSERT(sizeof(touch_feedback_cmd_types_t) == 4);
++
++// Enumeration used in TOUCH_FEEDBACK_HDR
++typedef enum touch_feedback_data_types
++{
++ TOUCH_FEEDBACK_DATA_TYPE_FEEDBACK = 0, // This is vendor specific feedback to be written to the sensor
++ TOUCH_FEEDBACK_DATA_TYPE_SET_FEATURES, // This is a set features command to be written to the sensor
++ TOUCH_FEEDBACK_DATA_TYPE_GET_FEATURES, // This is a get features command to be written to the sensor
++ TOUCH_FEEDBACK_DATA_TYPE_OUTPUT_REPORT, // This is a HID output report to be written to the sensor
++ TOUCH_FEEDBACK_DATA_TYPE_STORE_DATA, // This is calibration data to be written to system flash
++ TOUCH_FEEDBACK_DATA_TYPE_MAX
++} touch_feedback_data_types_t;
++C_ASSERT(sizeof(touch_feedback_data_types_t) == 4);
++
++// This is the data structure sent from the EU kernels back to the ME FW.
++// In addition to "feedback" data, the FW can execute a "command" described by the command type parameter.
++// Any payload data will always be sent to the TIC first, then any command will be issued.
++typedef struct touch_feedback_hdr
++{
++ u32 feedback_cmd_type; // use values from TOUCH_FEEDBACK_CMD_TYPES
++ u32 payload_size_bytes; // The amount of data to be written to the sensor, not including the header
++ u32 buffer_id; // The ID of the raw data buffer that generated this feedback data
++ u32 protocol_ver; // Must match protocol version of the EDS
++ u32 feedback_data_type; // use values from TOUCH_FEEDBACK_DATA_TYPES. This is not relevant if PayloadSizeBytes is 0
++ u32 spi_offest; // The offset from TOUCH_DATA_WINDOW_OFFSET at which to write the Payload data. Maximum offset is 0x1EFFF.
++ u8 reserved[40]; // Padding to extend header to full 64 bytes and allow for growth
++} touch_feedback_hdr_t;
++C_ASSERT(sizeof(touch_feedback_hdr_t) == 64);
++
++typedef struct touch_feedback_buffer
++{
++ touch_feedback_hdr_t Header;
++ u8 feedback_data[1]; // used to access the feedback data as an array and keep the compilers happy. Actual size of this array is Header.PayloadSizeBytes
++} touch_feedback_buffer_t;
++
++
++//
++// This data structure describes the header prepended to all data
++// written to the touch IC at the bulk data write (TOUCH_DATA_WINDOW_OFFSET + TOUCH_FEEDBACK_HDR.SpiOffest) address.
++typedef enum touch_write_data_type
++{
++ TOUCH_WRITE_DATA_TYPE_FW_LOAD = 0,
++ TOUCH_WRITE_DATA_TYPE_DATA_LOAD,
++ TOUCH_WRITE_DATA_TYPE_FEEDBACK,
++ TOUCH_WRITE_DATA_TYPE_SET_FEATURES,
++ TOUCH_WRITE_DATA_TYPE_GET_FEATURES,
++ TOUCH_WRITE_DATA_TYPE_OUTPUT_REPORT,
++ TOUCH_WRITE_DATA_TYPE_NO_DATA_USE_DEFAULTS,
++ TOUCH_WRITE_DATA_TYPE_MAX
++} touch_write_data_type_t;
++C_ASSERT(sizeof(touch_write_data_type_t) == 4);
++
++typedef struct touch_write_hdr
++{
++ u32 write_data_type; // Use values from TOUCH_WRITE_DATA_TYPE
++ u32 write_data_len; // This field designates the amount of data to follow
++} touch_write_hdr_t;
++C_ASSERT(sizeof(touch_write_hdr_t) == 8);
++
++typedef struct touch_write_data
++{
++ touch_write_hdr_t header;
++ u8 write_data[1]; // used to access the write data as an array and keep the compilers happy. Actual size of this array is Header.WriteDataLen
++} touch_write_data_t;
++
++#pragma pack()
++
++#endif // _TOUCH_SENSOR_REGS_H
+diff --git a/drivers/misc/ipts/ipts-state.h b/drivers/misc/ipts/ipts-state.h
+new file mode 100644
+index 0000000..39a2eaf
+--- /dev/null
++++ b/drivers/misc/ipts/ipts-state.h
+@@ -0,0 +1,29 @@
++/*
++ * Intel Precise Touch & Stylus state codes
++ *
++ * Copyright (c) 2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ */
++
++#ifndef _IPTS_STATE_H_
++#define _IPTS_STATE_H_
++
++/* ipts driver states */
++typedef enum ipts_state {
++ IPTS_STA_NONE,
++ IPTS_STA_INIT,
++ IPTS_STA_RESOURCE_READY,
++ IPTS_STA_HID_STARTED,
++ IPTS_STA_RAW_DATA_STARTED,
++ IPTS_STA_STOPPING
++} ipts_state_t;
++
++#endif // _IPTS_STATE_H_
+diff --git a/drivers/misc/ipts/ipts.h b/drivers/misc/ipts/ipts.h
+new file mode 100644
+index 0000000..a7a4846
+--- /dev/null
++++ b/drivers/misc/ipts/ipts.h
+@@ -0,0 +1,200 @@
++/*
++ *
++ * Intel Management Engine Interface (Intel MEI) Client Driver for IPTS
++ * Copyright (c) 2016, Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ */
++
++#ifndef _IPTS_H_
++#define _IPTS_H_
++
++#include <linux/types.h>
++#include <linux/mei_cl_bus.h>
++#include <linux/hid.h>
++#include <linux/intel_ipts_if.h>
++
++#include "ipts-mei-msgs.h"
++#include "ipts-state.h"
++#include "ipts-binary-spec.h"
++
++//#define ENABLE_IPTS_DEBUG /* enable IPTS debug */
++
++#ifdef ENABLE_IPTS_DEBUG
++
++#define ipts_info(ipts, format, arg...) do {\
++ dev_info(&ipts->cldev->dev, format, ##arg);\
++} while (0)
++
++#define ipts_dbg(ipts, format, arg...) do {\
++ dev_info(&ipts->cldev->dev, format, ##arg);\
++} while (0)
++
++#define RUN_DBG_THREAD
++
++#else
++
++#define ipts_info(ipts, format, arg...) do {} while(0);
++#define ipts_dbg(ipts, format, arg...) do {} while(0);
++
++#endif
++
++#define ipts_err(ipts, format, arg...) do {\
++ dev_err(&ipts->cldev->dev, format, ##arg);\
++} while (0)
++
++#define HID_PARALLEL_DATA_BUFFERS TOUCH_SENSOR_MAX_DATA_BUFFERS
++
++#define IPTS_MAX_RETRY 3
++
++typedef struct ipts_buffer_info {
++ char *addr;
++ dma_addr_t dma_addr;
++} ipts_buffer_info_t;
++
++typedef struct ipts_gfx_info {
++ u64 gfx_handle;
++ intel_ipts_ops_t ipts_ops;
++} ipts_gfx_info_t;
++
++typedef struct ipts_resource {
++ /* ME & Gfx resource */
++ ipts_buffer_info_t touch_data_buffer_raw[HID_PARALLEL_DATA_BUFFERS];
++ ipts_buffer_info_t touch_data_buffer_hid;
++
++ ipts_buffer_info_t feedback_buffer[HID_PARALLEL_DATA_BUFFERS];
++
++ ipts_buffer_info_t hid2me_buffer;
++ u32 hid2me_buffer_size;
++
++ u8 wq_item_size;
++ intel_ipts_wq_info_t wq_info;
++
++ /* ME2HID buffer */
++ char *me2hid_buffer;
++
++ /* Gfx specific resource */
++ ipts_buffer_info_t raw_data_mode_output_buffer
++ [HID_PARALLEL_DATA_BUFFERS][MAX_NUM_OUTPUT_BUFFERS];
++
++ int num_of_outputs;
++
++ bool default_resource_ready;
++ bool raw_data_resource_ready;
++} ipts_resource_t;
++
++typedef struct ipts_info {
++ struct mei_cl_device *cldev;
++ struct hid_device *hid;
++
++ struct work_struct init_work;
++ struct work_struct raw_data_work;
++ struct work_struct gfx_status_work;
++
++ struct task_struct *event_loop;
++
++#if IS_ENABLED(CONFIG_DEBUG_FS)
++ struct dentry *dbgfs_dir;
++#endif
++
++ ipts_state_t state;
++
++ touch_sensor_mode_t sensor_mode;
++ touch_sensor_get_device_info_rsp_data_t device_info;
++ ipts_resource_t resource;
++ u8 hid_input_report[HID_MAX_BUFFER_SIZE];
++ int num_of_parallel_data_buffers;
++ bool hid_desc_ready;
++
++ int current_buffer_index;
++ int last_buffer_completed;
++ int *last_submitted_id;
++
++ ipts_gfx_info_t gfx_info;
++ u64 kernel_handle;
++ int gfx_status;
++ bool display_status;
++
++ bool switch_sensor_mode;
++ touch_sensor_mode_t new_sensor_mode;
++
++ int retry;
++ bool restart;
++} ipts_info_t;
++
++#if IS_ENABLED(CONFIG_DEBUG_FS)
++int ipts_dbgfs_register(ipts_info_t *ipts, const char *name);
++void ipts_dbgfs_deregister(ipts_info_t *ipts);
++#else
++static int ipts_dbgfs_register(ipts_info_t *ipts, const char *name);
++static void ipts_dbgfs_deregister(ipts_info_t *ipts);
++#endif /* CONFIG_DEBUG_FS */
++
++/* inline functions */
++static inline void ipts_set_state(ipts_info_t *ipts, ipts_state_t state)
++{
++ ipts->state = state;
++}
++
++static inline ipts_state_t ipts_get_state(const ipts_info_t *ipts)
++{
++ return ipts->state;
++}
++
++static inline bool ipts_is_default_resource_ready(const ipts_info_t *ipts)
++{
++ return ipts->resource.default_resource_ready;
++}
++
++static inline bool ipts_is_raw_data_resource_ready(const ipts_info_t *ipts)
++{
++ return ipts->resource.raw_data_resource_ready;
++}
++
++static inline ipts_buffer_info_t* ipts_get_feedback_buffer(ipts_info_t *ipts,
++ int buffer_idx)
++{
++ return &ipts->resource.feedback_buffer[buffer_idx];
++}
++
++static inline ipts_buffer_info_t* ipts_get_touch_data_buffer_hid(ipts_info_t *ipts)
++{
++ return &ipts->resource.touch_data_buffer_hid;
++}
++
++static inline ipts_buffer_info_t* ipts_get_output_buffers_by_parallel_id(
++ ipts_info_t *ipts,
++ int parallel_idx)
++{
++ return &ipts->resource.raw_data_mode_output_buffer[parallel_idx][0];
++}
++
++static inline ipts_buffer_info_t* ipts_get_hid2me_buffer(ipts_info_t *ipts)
++{
++ return &ipts->resource.hid2me_buffer;
++}
++
++static inline void ipts_set_wq_item_size(ipts_info_t *ipts, u8 size)
++{
++ ipts->resource.wq_item_size = size;
++}
++
++static inline u8 ipts_get_wq_item_size(const ipts_info_t *ipts)
++{
++ return ipts->resource.wq_item_size;
++}
++
++static inline int ipts_get_num_of_parallel_buffers(const ipts_info_t *ipts)
++{
++ return ipts->num_of_parallel_data_buffers;
++}
++
++#endif // _IPTS_H_
+diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h
+index 7ad15d6..92e105b 100644
+--- a/drivers/misc/mei/hw-me-regs.h
++++ b/drivers/misc/mei/hw-me-regs.h
+@@ -119,6 +119,7 @@
+
+ #define MEI_DEV_ID_SPT 0x9D3A /* Sunrise Point */
+ #define MEI_DEV_ID_SPT_2 0x9D3B /* Sunrise Point 2 */
++#define MEI_DEV_ID_SPT_4 0x9D3E /* Sunrise Point 4 */
+ #define MEI_DEV_ID_SPT_H 0xA13A /* Sunrise Point H */
+ #define MEI_DEV_ID_SPT_H_2 0xA13B /* Sunrise Point H 2 */
+
+diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
+index f3ffd88..1a0af7f 100644
+--- a/drivers/misc/mei/pci-me.c
++++ b/drivers/misc/mei/pci-me.c
+@@ -85,6 +85,7 @@ static const struct pci_device_id mei_me_pci_tbl[] = {
+
+ {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)},
+ {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)},
++ {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_4, mei_me_pch8_cfg)},
+ {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)},
+ {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)},
+
+diff --git a/firmware/Makefile b/firmware/Makefile
+index e297e1b..f6f9941 100644
+--- a/firmware/Makefile
++++ b/firmware/Makefile
+@@ -135,6 +135,7 @@ fw-shipped-$(CONFIG_USB_SERIAL_XIRCOM) += keyspan_pda/xircom_pgs.fw
+ fw-shipped-$(CONFIG_USB_VICAM) += vicam/firmware.fw
+ fw-shipped-$(CONFIG_VIDEO_CPIA2) += cpia2/stv0672_vp4.bin
+ fw-shipped-$(CONFIG_YAM) += yam/1200.bin yam/9600.bin
++fw-shipped-$(CONFIG_INTEL_IPTS) += intel/ipts/ipts_fw_config.bin
+
+ fw-shipped-all := $(fw-shipped-y) $(fw-shipped-m) $(fw-shipped-)
+
+diff --git a/firmware/intel/ipts/ipts_fw_config.bin b/firmware/intel/ipts/ipts_fw_config.bin
+new file mode 100644
+index 0000000..2522e8f
+Binary files /dev/null and b/firmware/intel/ipts/ipts_fw_config.bin differ
+diff --git a/include/linux/intel_ipts_if.h b/include/linux/intel_ipts_if.h
+new file mode 100644
+index 0000000..f329bbf
+--- /dev/null
++++ b/include/linux/intel_ipts_if.h
+@@ -0,0 +1,75 @@
++/*
++ *
++ * GFX interface to support Intel Precise Touch & Stylus
++ * Copyright (c) 2016 Intel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ */
++
++#ifndef INTEL_IPTS_IF_H
++#define INTEL_IPTS_IF_H
++
++enum {
++ IPTS_INTERFACE_V1 = 1,
++};
++
++#define IPTS_BUF_FLAG_CONTIGUOUS 0x01
++
++#define IPTS_NOTIFY_STA_BACKLIGHT_OFF 0x00
++#define IPTS_NOTIFY_STA_BACKLIGHT_ON 0x01
++
++typedef struct intel_ipts_mapbuffer {
++ u32 size;
++ u32 flags;
++ void *gfx_addr;
++ void *cpu_addr;
++ u64 buf_handle;
++ u64 phy_addr;
++} intel_ipts_mapbuffer_t;
++
++typedef struct intel_ipts_wq_info {
++ u64 db_addr;
++ u64 db_phy_addr;
++ u32 db_cookie_offset;
++ u32 wq_size;
++ u64 wq_addr;
++ u64 wq_phy_addr;
++ u64 wq_head_addr; /* head of wq is managed by GPU */
++ u64 wq_head_phy_addr; /* head of wq is managed by GPU */
++ u64 wq_tail_addr; /* tail of wq is managed by CSME */
++ u64 wq_tail_phy_addr; /* tail of wq is managed by CSME */
++} intel_ipts_wq_info_t;
++
++typedef struct intel_ipts_ops {
++ int (*get_wq_info)(uint64_t gfx_handle, intel_ipts_wq_info_t *wq_info);
++ int (*map_buffer)(uint64_t gfx_handle, intel_ipts_mapbuffer_t *mapbuffer);
++ int (*unmap_buffer)(uint64_t gfx_handle, uint64_t buf_handle);
++} intel_ipts_ops_t;
++
++typedef struct intel_ipts_callback {
++ void (*workload_complete)(void *data);
++ void (*notify_gfx_status)(u32 status, void *data);
++} intel_ipts_callback_t;
++
++typedef struct intel_ipts_connect {
++ intel_ipts_callback_t ipts_cb; /* input : callback addresses */
++ void *data; /* input : callback data */
++ u32 if_version; /* input : interface version */
++
++ u32 gfx_version; /* output : gfx version */
++ u64 gfx_handle; /* output : gfx handle */
++ intel_ipts_ops_t ipts_ops; /* output : gfx ops for IPTS */
++} intel_ipts_connect_t;
++
++int intel_ipts_connect(intel_ipts_connect_t *ipts_connect);
++void intel_ipts_disconnect(uint64_t gfx_handle);
++
++#endif // INTEL_IPTS_IF_H
diff --git a/0003-surface-cover.patch b/0003-surface-cover.patch
deleted file mode 100644
index 7117c2416db..00000000000
--- a/0003-surface-cover.patch
+++ /dev/null
@@ -1,119 +0,0 @@
-diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
-index 9369602..67a1149 100644
---- a/drivers/hid/hid-core.c
-+++ b/drivers/hid/hid-core.c
-@@ -724,11 +724,7 @@ static void hid_scan_collection(struct hid_parser *parser, unsigned type)
- hid->group = HID_GROUP_SENSOR_HUB;
-
- if (hid->vendor == USB_VENDOR_ID_MICROSOFT &&
-- (hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3 ||
-- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2 ||
-- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP ||
-- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_3 ||
-- hid->product == USB_DEVICE_ID_MS_POWER_COVER) &&
-+ hid->product == USB_DEVICE_ID_MS_POWER_COVER &&
- hid->group == HID_GROUP_MULTITOUCH)
- hid->group = HID_GROUP_GENERIC;
-
-@@ -1937,10 +1933,6 @@ static const struct hid_device_id hid_have_special_driver[] = {
- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K) },
- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0) },
- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_OFFICE_KB) },
-- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3) },
-- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2) },
-- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP) },
-- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3) },
- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER) },
- { HID_USB_DEVICE(USB_VENDOR_ID_MONTEREY, USB_DEVICE_ID_GENIUS_KB29E) },
- { HID_USB_DEVICE(USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GT683R_LED_PANEL) },
-diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
-index 909ab01..7a310a4 100644
---- a/drivers/hid/hid-ids.h
-+++ b/drivers/hid/hid-ids.h
-@@ -682,9 +682,13 @@
- #define USB_DEVICE_ID_MS_TOUCH_COVER_2 0x07a7
- #define USB_DEVICE_ID_MS_TYPE_COVER_2 0x07a9
- #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3 0x07dc
-+#define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_1 0x07de
- #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2 0x07e2
- #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP 0x07dd
- #define USB_DEVICE_ID_MS_TYPE_COVER_3 0x07de
-+#define USB_DEVICE_ID_MS_SURFACE_BOOK 0x07cd
-+#define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4 0x07e8
-+#define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_1 0x07e4
- #define USB_DEVICE_ID_MS_POWER_COVER 0x07da
-
- #define USB_VENDOR_ID_MOJO 0x8282
-diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c
-index 77a2cf3..3110927 100644
---- a/drivers/hid/hid-microsoft.c
-+++ b/drivers/hid/hid-microsoft.c
-@@ -276,14 +276,6 @@ static const struct hid_device_id ms_devices[] = {
- .driver_data = MS_NOGET },
- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_MOUSE_4500),
- .driver_data = MS_DUPLICATE_USAGES },
-- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3),
-- .driver_data = MS_HIDINPUT },
-- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2),
-- .driver_data = MS_HIDINPUT },
-- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP),
-- .driver_data = MS_HIDINPUT },
-- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3),
-- .driver_data = MS_HIDINPUT },
- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER),
- .driver_data = MS_HIDINPUT },
-
-diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
-index f62a9d6..44a2726 100644
---- a/drivers/hid/hid-multitouch.c
-+++ b/drivers/hid/hid-multitouch.c
-@@ -1358,6 +1358,35 @@ static const struct hid_device_id mt_devices[] = {
- MT_USB_DEVICE(USB_VENDOR_ID_ILITEK,
- USB_DEVICE_ID_ILITEK_MULTITOUCH) },
-
-+ /* Microsoft Type Cover */
-+ { .driver_data = MT_CLS_EXPORT_ALL_INPUTS,
-+ MT_USB_DEVICE(USB_VENDOR_ID_MICROSOFT,
-+ USB_DEVICE_ID_MS_TYPE_COVER_PRO_3) },
-+ { .driver_data = MT_CLS_EXPORT_ALL_INPUTS,
-+ MT_USB_DEVICE(USB_VENDOR_ID_MICROSOFT,
-+ USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_1) },
-+ { .driver_data = MT_CLS_EXPORT_ALL_INPUTS,
-+ MT_USB_DEVICE(USB_VENDOR_ID_MICROSOFT,
-+ USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2) },
-+ { .driver_data = MT_CLS_EXPORT_ALL_INPUTS,
-+ MT_USB_DEVICE(USB_VENDOR_ID_MICROSOFT,
-+ USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP) },
-+ { .driver_data = MT_CLS_EXPORT_ALL_INPUTS,
-+ MT_USB_DEVICE(USB_VENDOR_ID_MICROSOFT,
-+ USB_DEVICE_ID_MS_TYPE_COVER_3) },
-+ { .driver_data = MT_CLS_EXPORT_ALL_INPUTS,
-+ MT_USB_DEVICE(USB_VENDOR_ID_MICROSOFT,
-+ USB_DEVICE_ID_MS_TYPE_COVER_PRO_4) },
-+ { .driver_data = MT_CLS_EXPORT_ALL_INPUTS,
-+ MT_USB_DEVICE(USB_VENDOR_ID_MICROSOFT,
-+ USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_1) },
-+
-+ /* Microsoft Surface Book */
-+ { .driver_data = MT_CLS_EXPORT_ALL_INPUTS,
-+ MT_USB_DEVICE(USB_VENDOR_ID_MICROSOFT,
-+ USB_DEVICE_ID_MS_SURFACE_BOOK) },
-+
-+
- /* MosArt panels */
- { .driver_data = MT_CLS_CONFIDENCE_MINUS_ONE,
- MT_USB_DEVICE(USB_VENDOR_ID_ASUS,
-diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
-index dc8e6ad..cfcd027 100644
---- a/drivers/hid/usbhid/hid-quirks.c
-+++ b/drivers/hid/usbhid/hid-quirks.c
-@@ -94,6 +94,9 @@ static const struct hid_blacklist {
- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2, HID_QUIRK_NO_INIT_REPORTS },
- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP, HID_QUIRK_NO_INIT_REPORTS },
- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3, HID_QUIRK_NO_INIT_REPORTS },
-+ { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4, HID_QUIRK_NO_INIT_REPORTS },
-+ { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_1, HID_QUIRK_NO_INIT_REPORTS },
-+ { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_SURFACE_BOOK, HID_QUIRK_NO_INIT_REPORTS },
- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER, HID_QUIRK_NO_INIT_REPORTS },
- { USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GT683R_LED_PANEL, HID_QUIRK_NO_INIT_REPORTS },
- { USB_VENDOR_ID_NEXIO, USB_DEVICE_ID_NEXIO_MULTITOUCH_PTI0750, HID_QUIRK_NO_INIT_REPORTS },
diff --git a/0004-i2c-hid-fix.patch b/0004-i2c-hid-fix.patch
new file mode 100644
index 00000000000..931a2607506
--- /dev/null
+++ b/0004-i2c-hid-fix.patch
@@ -0,0 +1,43 @@
+diff --git a/drivers/hid/i2c-hid/i2c-hid.c b/drivers/hid/i2c-hid/i2c-hid.c
+index b3ec4f2de875..8d0bad0b68f4 100644
+--- a/drivers/hid/i2c-hid/i2c-hid.c
++++ b/drivers/hid/i2c-hid/i2c-hid.c
+@@ -22,6 +22,7 @@
+ #include <linux/i2c.h>
+ #include <linux/interrupt.h>
+ #include <linux/input.h>
++#include <linux/irq.h>
+ #include <linux/delay.h>
+ #include <linux/slab.h>
+ #include <linux/pm.h>
+@@ -716,9 +717,11 @@ static int i2c_hid_start(struct hid_device *hid)
+ i2c_hid_find_max_report(hid, HID_FEATURE_REPORT, &bufsize);
+
+ if (bufsize > ihid->bufsize) {
++ disable_irq(ihid->irq);
+ i2c_hid_free_buffers(ihid);
+
+ ret = i2c_hid_alloc_buffers(ihid, bufsize);
++ enable_irq(ihid->irq);
+
+ if (ret)
+ return ret;
+@@ -806,13 +809,16 @@ static struct hid_ll_driver i2c_hid_ll_driver = {
+ static int i2c_hid_init_irq(struct i2c_client *client)
+ {
+ struct i2c_hid *ihid = i2c_get_clientdata(client);
++ unsigned long irqflags = 0;
+ int ret;
+
+ dev_dbg(&client->dev, "Requesting IRQ: %d\n", ihid->irq);
+
++ if (!irq_get_trigger_type(ihid->irq))
++ irqflags = IRQF_TRIGGER_LOW;
++
+ ret = request_threaded_irq(ihid->irq, NULL, i2c_hid_irq,
+- IRQF_TRIGGER_LOW | IRQF_ONESHOT,
+- client->name, ihid);
++ irqflags | IRQF_ONESHOT, client->name, ihid);
+ if (ret < 0) {
+ dev_warn(&client->dev,
+ "Could not register for %s interrupt, irq = %d,"
diff --git a/0004-surface-pro4-button.patch b/0004-surface-pro4-button.patch
deleted file mode 100644
index b6aec4362ea..00000000000
--- a/0004-surface-pro4-button.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
-index 1089eaa..ea76d67 100644
---- a/drivers/platform/x86/Kconfig
-+++ b/drivers/platform/x86/Kconfig
-@@ -940,8 +940,8 @@ config INTEL_PMC_IPC
- with other entities in the CPU.
-
- config SURFACE_PRO3_BUTTON
-- tristate "Power/home/volume buttons driver for Microsoft Surface Pro 3 tablet"
-+ tristate "Power/home/volume buttons driver for Microsoft Surface Pro 3/4 tablet"
- depends on ACPI && INPUT
- ---help---
-- This driver handles the power/home/volume buttons on the Microsoft Surface Pro 3 tablet.
-+ This driver handles the power/home/volume buttons on the Microsoft Surface Pro 3/4 tablet.
- endif # X86_PLATFORM_DEVICES
-diff --git a/drivers/platform/x86/surfacepro3_button.c b/drivers/platform/x86/surfacepro3_button.c
-index f7dade3..6505c97 100644
---- a/drivers/platform/x86/surfacepro3_button.c
-+++ b/drivers/platform/x86/surfacepro3_button.c
-@@ -1,6 +1,6 @@
- /*
- * power/home/volume button support for
-- * Microsoft Surface Pro 3 tablet.
-+ * Microsoft Surface Pro 3/4 tablet.
- *
- * Copyright (c) 2015 Intel Corporation.
- * All rights reserved.
-@@ -19,9 +19,12 @@
- #include <linux/acpi.h>
- #include <acpi/button.h>
-
--#define SURFACE_BUTTON_HID "MSHW0028"
-+#define SURFACE_PRO3_BUTTON_HID "MSHW0028"
-+#define SURFACE_PRO4_BUTTON_HID "MSHW0040"
- #define SURFACE_BUTTON_OBJ_NAME "VGBI"
--#define SURFACE_BUTTON_DEVICE_NAME "Surface Pro 3 Buttons"
-+#define SURFACE_BUTTON_DEVICE_NAME "Surface Pro 3/4 Buttons"
-+
-+#define SURFACE_BUTTON_NOTIFY_TABLET_MODE 0xc8
-
- #define SURFACE_BUTTON_NOTIFY_PRESS_POWER 0xc6
- #define SURFACE_BUTTON_NOTIFY_RELEASE_POWER 0xc7
-@@ -32,7 +35,7 @@
- #define SURFACE_BUTTON_NOTIFY_PRESS_VOLUME_UP 0xc0
- #define SURFACE_BUTTON_NOTIFY_RELEASE_VOLUME_UP 0xc1
-
--#define SURFACE_BUTTON_NOTIFY_PRESS_VOLUME_DOWN 0xc2
-+#define SURFACE_BUTTON_NOTIFY_PRESS_VOLUME_DOWN 0xc2
- #define SURFACE_BUTTON_NOTIFY_RELEASE_VOLUME_DOWN 0xc3
-
- ACPI_MODULE_NAME("surface pro 3 button");
-@@ -54,7 +57,8 @@ MODULE_LICENSE("GPL v2");
- * acpi_driver.
- */
- static const struct acpi_device_id surface_button_device_ids[] = {
-- {SURFACE_BUTTON_HID, 0},
-+ {SURFACE_PRO3_BUTTON_HID, 0},
-+ {SURFACE_PRO4_BUTTON_HID, 0},
- {"", 0},
- };
- MODULE_DEVICE_TABLE(acpi, surface_button_device_ids);
-@@ -103,13 +107,16 @@ static void surface_button_notify(struct acpi_device *device, u32 event)
- case SURFACE_BUTTON_NOTIFY_RELEASE_VOLUME_DOWN:
- key_code = KEY_VOLUMEDOWN;
- break;
-+ case SURFACE_BUTTON_NOTIFY_TABLET_MODE:
-+ dev_warn_once(&device->dev, "Tablet mode is not supported\n");
-+ break;
- default:
- dev_info_ratelimited(&device->dev,
-- "Unsupported event [0x%x]\n", event);
-+ "Unsupported event [0x%x]\n", event);
- break;
- }
- input = button->input;
-- if (KEY_RESERVED == key_code)
-+ if (key_code == KEY_RESERVED)
- return;
- if (pressed)
- pm_wakeup_event(&device->dev, 0);
diff --git a/0005-HID-multitouch-Add-MT_QUIRK_NOT_SEEN_MEANS_UP.patch b/0005-HID-multitouch-Add-MT_QUIRK_NOT_SEEN_MEANS_UP.patch
deleted file mode 100644
index 64d6725b888..00000000000
--- a/0005-HID-multitouch-Add-MT_QUIRK_NOT_SEEN_MEANS_UP.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 909b254eb818f63ba0e541abbbe829d923c19234 Mon Sep 17 00:00:00 2001
-From: Daniel Martin <consume.noise@gmail.com>
-Date: Fri, 2 Oct 2015 10:07:15 +0200
-Subject: [PATCH 2/4] HID: multitouch: Add MT_QUIRK_NOT_SEEN_MEANS_UP to
- MT_CLS_WIN_8
-
-The firmware found in the touch screen of an SP3 is buggy and may miss
-to send lift off reports for contacts. Try to work around that issue by
-using MT_QUIRK_NOT_SEEN_MEANS_UP.
-
-Signed-off-by: Daniel Martin <consume.noise@gmail.com>
----
- drivers/hid/hid-multitouch.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
-index 1cc1108..625f1ee 100644
---- a/drivers/hid/hid-multitouch.c
-+++ b/drivers/hid/hid-multitouch.c
-@@ -206,7 +206,8 @@ static struct mt_class mt_classes[] = {
- .quirks = MT_QUIRK_ALWAYS_VALID |
- MT_QUIRK_IGNORE_DUPLICATES |
- MT_QUIRK_HOVERING |
-- MT_QUIRK_CONTACT_CNT_ACCURATE },
-+ MT_QUIRK_CONTACT_CNT_ACCURATE |
-+ MT_QUIRK_NOT_SEEN_MEANS_UP },
- { .name = MT_CLS_EXPORT_ALL_INPUTS,
- .quirks = MT_QUIRK_ALWAYS_VALID |
- MT_QUIRK_CONTACT_CNT_ACCURATE,
-@@ -1054,7 +1055,8 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)
- return -ENOMEM;
- }
-
-- if (id->vendor == HID_ANY_ID && id->product == HID_ANY_ID)
-+ if (id->vendor == HID_ANY_ID && id->product == HID_ANY_ID &&
-+ id->group != HID_GROUP_MULTITOUCH_WIN_8)
- td->serial_maybe = true;
-
- ret = hid_parse(hdev);
---
-2.1.4
-
diff --git a/0006-HID-multitouch-Ignore-invalid-reports.patch b/0006-HID-multitouch-Ignore-invalid-reports.patch
deleted file mode 100644
index ec15011020c..00000000000
--- a/0006-HID-multitouch-Ignore-invalid-reports.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From a84d692a5e0f894d7e9c81208197423d023f50d9 Mon Sep 17 00:00:00 2001
-From: Daniel Martin <consume.noise@gmail.com>
-Date: Fri, 2 Oct 2015 10:05:29 +0200
-Subject: [PATCH 1/4] HID: multitouch: Ignore invalid reports
-
-Drop reports with invalid values.
-
-Signed-off-by: Daniel Martin <consume.noise@gmail.com>
----
- drivers/hid/hid-multitouch.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
-index 7c81125..1cc1108 100644
---- a/drivers/hid/hid-multitouch.c
-+++ b/drivers/hid/hid-multitouch.c
-@@ -559,6 +559,10 @@ static void mt_complete_slot(struct mt_device *td, struct input_dev *input)
- td->num_received >= td->num_expected)
- return;
-
-+ if (td->curdata.x == 0xffff && td->curdata.x == td->curdata.y &&
-+ td->curdata.w == 0xffff && td->curdata.w == td->curdata.h)
-+ goto inc_num_received;
-+
- if (td->curvalid || (td->mtclass.quirks & MT_QUIRK_ALWAYS_VALID)) {
- int slotnum = mt_compute_slot(td, input);
- struct mt_slot *s = &td->curdata;
-@@ -597,6 +601,7 @@ static void mt_complete_slot(struct mt_device *td, struct input_dev *input)
- }
- }
-
-+inc_num_received:
- td->num_received++;
- }
-
---
-2.1.4
-
diff --git a/99-linux.hook b/90-linux.hook
index 9851151995b..9851151995b 100644
--- a/99-linux.hook
+++ b/90-linux.hook
diff --git a/PKGBUILD b/PKGBUILD
index e8e17daa865..776bfcf01b8 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -1,50 +1,45 @@
-# $Id: PKGBUILD 280536 2016-11-11 13:55:29Z andyrtr $
-# Maintainer: Super Bo <superbo@gmail.com>
+# $Id: PKGBUILD 291970 2017-04-01 08:21:20Z andyrtr $
+# Maintainer: Andreas Radke <andyrtr@archlinux.org>
#pkgbase=linux-lts
pkgbase=linux-lts-surface4
-_srcname=linux-4.4
-pkgver=4.4.51
+_srcname=linux-4.9
+pkgver=4.9.20
pkgrel=1
arch=('i686' 'x86_64')
url="https://www.kernel.org/"
license=('GPL2')
-makedepends=('xmlto' 'docbook-xsl' 'kmod' 'inetutils' 'bc')
+makedepends=('xmlto' 'docbook-xsl' 'kmod' 'inetutils' 'bc' 'libelf')
options=('!strip')
source=(https://www.kernel.org/pub/linux/kernel/v4.x/${_srcname}.tar.{xz,sign}
https://www.kernel.org/pub/linux/kernel/v4.x/patch-${pkgver}.{xz,sign}
# the main kernel config files
'config' 'config.x86_64'
# pacman hook for initramfs regeneration
- '99-linux.hook'
+ '90-linux.hook'
# standard config files for mkinitcpio ramdisk
linux-lts.preset
change-default-console-loglevel.patch
- 0001-sdhci-revert.patch
- 0002-surface-wifi.patch
- 0003-surface-cover.patch
- 0004-surface-pro4-button.patch
- 0005-HID-multitouch-Add-MT_QUIRK_NOT_SEEN_MEANS_UP.patch
- 0006-HID-multitouch-Ignore-invalid-reports.patch)
+ '0002-surface4-type-cover.patch'
+ '0003-add-ipts.patch'
+ '0004-i2c-hid-fix.patch')
# https://www.kernel.org/pub/linux/kernel/v4.x/sha256sums.asc
-sha256sums=('401d7c8fef594999a460d10c72c5a94e9c2e1022f16795ec51746b0d165418b2'
+sha256sums=('029098dcffab74875e086ae970e3828456838da6e0ba22ce3f64ef764f3d7f1a'
'SKIP'
- 'dded5f71d8533a38e8aafad224e0fe5f7d3a4eed1cfc1a79c321581e148821e8'
+ 'fb856acd9195e7d83ef9971ec7be55eca0d6fdf0fbfbe9a8f3bb04590d44b51f'
'SKIP'
- 'e8d200b125b4391020c2bc1f43bf8f3a372f0bbdaf9bad71b31574edab7f908f'
- '236fc805c543cb774785f630bf37c7fdc2ff7c9904bb240ff70e0b7213058de5'
+ '53f57faf59621f1db6d97ef5d2e5141ab47278c34ae0308ca7196ad4021149a4'
+ '93f63b05fb6792c16ffda86ce99ab488223347a4a46ea61f9a28523a0289e357'
'834bd254b56ab71d73f59b3221f056c72f559553c04718e350ab2a3e2991afe0'
- '9e9e7ee3476e55e68390eda7e983fa18d44e76db5521f023fd2b388b1150bc40'
+ '1f036f7464da54ae510630f0edb69faa115287f86d9f17641197ffda8cfd49e0'
'1256b241cd477b265a3c2d64bdc19ffe3c9bbcee82ea3994c590c2c76e767d99'
- '5313df7cb5b4d005422bd4cd0dae956b2dadba8f3db904275aaf99ac53894375'
- 'c59a18d38d75fec7e9cc3b4efb6a997b3714c3156f6f80a6915bd16db409cde9'
- '243be112ad418060b7c94361f6664e17cf17a854b77dc65a3e53b16881b4785f'
- '1a34eae36a3f686f1bc158d7d13564f009e30b8866c919d7fe14590e872f095d'
- '47a80bb6e1f113ccf2b3eff0b277a398b84b54f2100ddf42e31b94ea04654f49'
- 'a9ce07b6533d86c3ffae8d5240d9c58b18778d0c5fed8ed97bde98ae43c4df71')
+ '814f395fb39b5da77699ec5480d8176f6e9eefd5dd50c157945ceba6169a0658'
+ 'c6c6645a1a0e58ed32daf283f3cebafb5c195a2b4091bd1208eda073692ca383'
+ 'e0337e929f2eb3689332ada9ee0766a9cb06b0cf6ba3dd16416e72009ec91eb9')
validpgpkeys=('ABAF11C65A2970B130ABE3C479BE3E4300411886' # Linus Torvalds <torvalds@linux-foundation.org>
'647F28654894E3BD457199BE38DBBDC86092693E' # Greg Kroah-Hartman (Linux kernel stable release signing key) <greg@kroah.com>
)
+
_kernelname=${pkgbase#linux}
prepare() {
@@ -56,17 +51,10 @@ prepare() {
# add latest fixes from stable queue, if needed
# http://git.kernel.org/?p=linux/kernel/git/stable/stable-queue.git
- # revert http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=9faac7b95ea4f9e83b7a914084cc81ef1632fd91
- # fixes #47778 sdhci broken on some boards
- # https://bugzilla.kernel.org/show_bug.cgi?id=106541
- patch -Rp1 -i "${srcdir}/0001-sdhci-revert.patch"
-
- # Add Surface Pro 4 patch
- patch -p1 -i "${srcdir}/0002-surface-wifi.patch"
- patch -p1 -i "${srcdir}/0003-surface-cover.patch"
- patch -p1 -i "${srcdir}/0004-surface-pro4-button.patch"
- patch -p1 -i "${srcdir}/0005-HID-multitouch-Add-MT_QUIRK_NOT_SEEN_MEANS_UP.patch"
- patch -p1 -i "${srcdir}/0006-HID-multitouch-Ignore-invalid-reports.patch"
+ # Add MS Surface Pro 4 patch
+ patch -p1 -i "${srcdir}/0002-surface4-type-cover.patch"
+ patch -p1 -i "${srcdir}/0003-add-ipts.patch"
+ patch -p1 -i "${srcdir}/0004-i2c-hid-fix.patch"
# set DEFAULT_CONSOLE_LOGLEVEL to 4 (same value as the 'quiet' kernel param)
# remove this when a Kconfig knob is made available by upstream
@@ -150,8 +138,8 @@ _package() {
-i "${pkgdir}/etc/mkinitcpio.d/${pkgbase}.preset"
# install pacman hook for initramfs regeneration
- sed "s|%PKGBASE%|${pkgbase}|g" "${srcdir}/99-linux.hook" |
- install -D -m644 /dev/stdin "${pkgdir}/usr/share/libalpm/hooks/99-${pkgbase}.hook"
+ sed "s|%PKGBASE%|${pkgbase}|g" "${srcdir}/90-linux.hook" |
+ install -D -m644 /dev/stdin "${pkgdir}/usr/share/libalpm/hooks/90-${pkgbase}.hook"
# remove build and source links
rm -f "${pkgdir}"/lib/modules/${_kernver}/{source,build}
@@ -175,7 +163,7 @@ _package() {
}
_package-headers() {
- pkgdesc="Header files and scripts for building modules for ${pkgbase/linux/Linux} kernel for Microsoft Surface Pro 4"
+ pkgdesc="Header files and scripts for building modules for ${pkgbase/linux/Linux} kernel"
install -dm755 "${pkgdir}/usr/lib/modules/${_kernver}"
@@ -190,7 +178,7 @@ _package-headers() {
mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/include"
for i in acpi asm-generic config crypto drm generated keys linux math-emu \
- media net pcmcia scsi sound trace uapi video xen; do
+ media net pcmcia scsi soc sound trace uapi video xen; do
cp -a include/${i} "${pkgdir}/usr/lib/modules/${_kernver}/build/include/"
done
@@ -270,6 +258,12 @@ _package-headers() {
cp ${i} "${pkgdir}/usr/lib/modules/${_kernver}/build/${i}"
done
+ # add objtool for external module building and enabled VALIDATION_STACK option
+ if [ -f tools/objtool/objtool ]; then
+ mkdir -p "${pkgdir}/usr/lib/modules/${_kernver}/build/tools/objtool"
+ cp -a tools/objtool/objtool ${pkgdir}/usr/lib/modules/${_kernver}/build/tools/objtool/
+ fi
+
chown -R root.root "${pkgdir}/usr/lib/modules/${_kernver}/build"
find "${pkgdir}/usr/lib/modules/${_kernver}/build" -type d -exec chmod 755 {} \;
@@ -287,7 +281,7 @@ _package-headers() {
# remove unneeded architectures
rm -rf "${pkgdir}"/usr/lib/modules/${_kernver}/build/arch/{alpha,arc,arm,arm26,arm64,avr32,blackfin,c6x,cris,frv,h8300,hexagon,ia64,m32r,m68k,m68knommu,metag,mips,microblaze,mn10300,openrisc,parisc,powerpc,ppc,s390,score,sh,sh64,sparc,sparc64,tile,unicore32,um,v850,xtensa}
-
+
# remove files already in linux-docs package
rm -f "${pkgdir}/usr/lib/modules/${_kernver}/build/Documentation/kbuild/Kconfig.recursion-issue-01"
rm -f "${pkgdir}/usr/lib/modules/${_kernver}/build/Documentation/kbuild/Kconfig.recursion-issue-02"
@@ -295,7 +289,7 @@ _package-headers() {
}
_package-docs() {
- pkgdesc="Kernel hackers manual - HTML documentation that comes with the ${pkgbase/linux/Linux} kernel for Microsoft Surface Pro 4"
+ pkgdesc="Kernel hackers manual - HTML documentation that comes with the ${pkgbase/linux/Linux} kernel"
cd "${srcdir}/${_srcname}"
diff --git a/config b/config
index 9ec86a67193..f9aa20c004a 100644
--- a/config
+++ b/config
@@ -1,18 +1,20 @@
#
# Automatically generated file; DO NOT EDIT.
-# Linux/x86 4.4.6-1 Kernel Configuration
+# Linux/x86 4.9.13-1 Kernel Configuration
#
# CONFIG_64BIT is not set
CONFIG_X86_32=y
CONFIG_X86=y
CONFIG_INSTRUCTION_DECODER=y
-CONFIG_PERF_EVENTS_INTEL_UNCORE=y
CONFIG_OUTPUT_FORMAT="elf32-i386"
CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig"
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_MMU=y
+CONFIG_ARCH_MMAP_RND_BITS_MIN=8
+CONFIG_ARCH_MMAP_RND_BITS_MAX=16
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_GENERIC_ISA_DMA=y
@@ -34,13 +36,14 @@ CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_HAVE_INTEL_TXT=y
CONFIG_X86_32_SMP=y
-CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-ecx -fcall-saved-edx"
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_DEBUG_RODATA=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_EXTABLE_SORT=y
+CONFIG_THREAD_INFO_IN_TASK=y
#
# General setup
@@ -138,30 +141,30 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=19
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
+CONFIG_NMI_LOG_BUF_SHIFT=13
CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y
CONFIG_CGROUPS=y
-# CONFIG_CGROUP_DEBUG is not set
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_PIDS=y
-CONFIG_CGROUP_DEVICE=y
-CONFIG_CPUSETS=y
-CONFIG_PROC_PID_CPUSET=y
-CONFIG_CGROUP_CPUACCT=y
CONFIG_PAGE_COUNTER=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_MEMCG_SWAP_ENABLED=y
-CONFIG_MEMCG_KMEM=y
-# CONFIG_CGROUP_HUGETLB is not set
-# CONFIG_CGROUP_PERF is not set
+CONFIG_BLK_CGROUP=y
+# CONFIG_DEBUG_BLK_CGROUP is not set
+CONFIG_CGROUP_WRITEBACK=y
CONFIG_CGROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_CFS_BANDWIDTH=y
# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_BLK_CGROUP=y
-# CONFIG_DEBUG_BLK_CGROUP is not set
-CONFIG_CGROUP_WRITEBACK=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_FREEZER=y
+# CONFIG_CGROUP_HUGETLB is not set
+CONFIG_CPUSETS=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+# CONFIG_CGROUP_PERF is not set
+# CONFIG_CGROUP_DEBUG is not set
# CONFIG_CHECKPOINT_RESTORE is not set
CONFIG_NAMESPACES=y
CONFIG_UTS_NS=y
@@ -180,6 +183,7 @@ CONFIG_RD_LZMA=y
CONFIG_RD_XZ=y
CONFIG_RD_LZO=y
CONFIG_RD_LZ4=y
+CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
@@ -195,7 +199,10 @@ CONFIG_SYSFS_SYSCALL=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set
+CONFIG_KALLSYMS_BASE_RELATIVE=y
CONFIG_PRINTK=y
+CONFIG_PRINTK_NMI=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_PCSPKR_PLATFORM=y
@@ -225,6 +232,7 @@ CONFIG_SLUB_DEBUG=y
# CONFIG_COMPAT_BRK is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
+# CONFIG_SLAB_FREELIST_RANDOM is not set
CONFIG_SLUB_CPU_PARTIAL=y
# CONFIG_SYSTEM_DATA_VERIFICATION is not set
CONFIG_PROFILING=y
@@ -250,8 +258,8 @@ CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_KPROBES_ON_FTRACE=y
+CONFIG_HAVE_NMI=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
-CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y
@@ -272,19 +280,29 @@ CONFIG_HAVE_CMPXCHG_DOUBLE=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_SECCOMP_FILTER=y
+CONFIG_HAVE_GCC_PLUGINS=y
+# CONFIG_GCC_PLUGINS is not set
CONFIG_HAVE_CC_STACKPROTECTOR=y
CONFIG_CC_STACKPROTECTOR=y
# CONFIG_CC_STACKPROTECTOR_NONE is not set
# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
CONFIG_CC_STACKPROTECTOR_STRONG=y
+CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
+CONFIG_HAVE_EXIT_THREAD=y
+CONFIG_ARCH_MMAP_RND_BITS=8
CONFIG_HAVE_COPY_THREAD_TLS=y
+# CONFIG_HAVE_ARCH_HASH is not set
+CONFIG_ISA_BUS_API=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OLD_SIGACTION=y
+# CONFIG_CPU_NO_EFFICIENT_FFS is not set
+# CONFIG_HAVE_ARCH_VMAP_STACK is not set
#
# GCOV-based kernel profiling
@@ -338,6 +356,7 @@ CONFIG_KARMA_PARTITION=y
CONFIG_EFI_PARTITION=y
# CONFIG_SYSV68_PARTITION is not set
# CONFIG_CMDLINE_PARTITION is not set
+CONFIG_BLK_MQ_PCI=y
#
# IO Schedulers
@@ -374,12 +393,14 @@ CONFIG_FREEZER=y
CONFIG_ZONE_DMA=y
CONFIG_SMP=y
CONFIG_X86_FEATURE_NAMES=y
+CONFIG_X86_FAST_FEATURE_TESTS=y
CONFIG_X86_MPPARSE=y
# CONFIG_X86_BIGSMP is not set
+# CONFIG_GOLDFISH is not set
# CONFIG_X86_EXTENDED_PLATFORM is not set
CONFIG_X86_INTEL_LPSS=y
# CONFIG_X86_AMD_PLATFORM_DEVICE is not set
-CONFIG_IOSF_MBI=m
+CONFIG_IOSF_MBI=y
# CONFIG_IOSF_MBI_DEBUG is not set
CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y
CONFIG_X86_32_IRIS=m
@@ -452,6 +473,14 @@ CONFIG_X86_MCE_AMD=y
CONFIG_X86_MCE_THRESHOLD=y
# CONFIG_X86_MCE_INJECT is not set
CONFIG_X86_THERMAL_VECTOR=y
+
+#
+# Performance monitoring
+#
+CONFIG_PERF_EVENTS_INTEL_UNCORE=y
+CONFIG_PERF_EVENTS_INTEL_RAPL=m
+CONFIG_PERF_EVENTS_INTEL_CSTATE=m
+CONFIG_PERF_EVENTS_AMD_POWER=m
# CONFIG_X86_LEGACY_VM86 is not set
# CONFIG_VM86 is not set
CONFIG_X86_16BIT=y
@@ -491,7 +520,6 @@ CONFIG_BALLOON_COMPACTION=y
CONFIG_COMPACTION=y
CONFIG_MIGRATION=y
# CONFIG_PHYS_ADDR_T_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
CONFIG_MMU_NOTIFIER=y
@@ -503,12 +531,14 @@ CONFIG_HWPOISON_INJECT=m
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
+CONFIG_TRANSPARENT_HUGE_PAGECACHE=y
CONFIG_CLEANCACHE=y
CONFIG_FRONTSWAP=y
# CONFIG_CMA is not set
CONFIG_ZSWAP=y
CONFIG_ZPOOL=y
CONFIG_ZBUD=y
+CONFIG_Z3FOLD=y
CONFIG_ZSMALLOC=y
# CONFIG_PGTABLE_MAPPING is not set
# CONFIG_ZSMALLOC_STAT is not set
@@ -529,7 +559,7 @@ CONFIG_X86_PAT=y
CONFIG_ARCH_USES_PG_UNCACHED=y
CONFIG_ARCH_RANDOM=y
CONFIG_X86_SMAP=y
-# CONFIG_X86_INTEL_MPX is not set
+CONFIG_X86_INTEL_MPX=y
CONFIG_EFI=y
CONFIG_EFI_STUB=y
CONFIG_SECCOMP=y
@@ -574,11 +604,13 @@ CONFIG_PM_DEBUG=y
CONFIG_PM_ADVANCED_DEBUG=y
# CONFIG_PM_TEST_SUSPEND is not set
CONFIG_PM_SLEEP_DEBUG=y
-# CONFIG_DPM_WATCHDOG is not set
CONFIG_PM_TRACE=y
CONFIG_PM_TRACE_RTC=y
CONFIG_PM_CLK=y
-# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
+CONFIG_PM_GENERIC_DOMAINS=y
+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
+CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
+CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_ACPI=y
CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y
CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y
@@ -595,14 +627,16 @@ CONFIG_ACPI_VIDEO=m
CONFIG_ACPI_FAN=m
CONFIG_ACPI_DOCK=y
CONFIG_ACPI_CPU_FREQ_PSS=y
+CONFIG_ACPI_PROCESSOR_CSTATE=y
CONFIG_ACPI_PROCESSOR_IDLE=y
-CONFIG_ACPI_PROCESSOR=m
+CONFIG_ACPI_PROCESSOR=y
CONFIG_ACPI_IPMI=m
CONFIG_ACPI_HOTPLUG_CPU=y
CONFIG_ACPI_PROCESSOR_AGGREGATOR=m
CONFIG_ACPI_THERMAL=m
# CONFIG_ACPI_CUSTOM_DSDT is not set
-CONFIG_ACPI_INITRD_TABLE_OVERRIDE=y
+CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y
+CONFIG_ACPI_TABLE_UPGRADE=y
# CONFIG_ACPI_DEBUG is not set
CONFIG_ACPI_PCI_SLOT=y
CONFIG_X86_PM_TIMER=y
@@ -621,8 +655,13 @@ CONFIG_ACPI_APEI_PCIEAER=y
CONFIG_ACPI_APEI_MEMORY_FAILURE=y
CONFIG_ACPI_APEI_EINJ=m
CONFIG_ACPI_APEI_ERST_DEBUG=m
+CONFIG_DPTF_POWER=m
+CONFIG_ACPI_WATCHDOG=y
CONFIG_ACPI_EXTLOG=m
-# CONFIG_PMIC_OPREGION is not set
+CONFIG_PMIC_OPREGION=y
+CONFIG_CRC_PMIC_OPREGION=y
+CONFIG_BXT_WC_PMIC_OPREGION=y
+CONFIG_ACPI_CONFIGFS=m
CONFIG_SFI=y
CONFIG_X86_APM_BOOT=y
CONFIG_APM=y
@@ -636,19 +675,22 @@ CONFIG_APM_DO_ENABLE=y
# CPU Frequency scaling
#
CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
-CONFIG_CPU_FREQ_STAT=m
+CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=m
CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=m
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
#
# CPU frequency scaling drivers
@@ -713,6 +755,8 @@ CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_PERFORMANCE is not set
CONFIG_PCIE_PME=y
+CONFIG_PCIE_DPC=y
+CONFIG_PCIE_PTM=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
# CONFIG_PCI_DEBUG is not set
@@ -724,10 +768,21 @@ CONFIG_PCI_IOV=y
CONFIG_PCI_PRI=y
CONFIG_PCI_PASID=y
CONFIG_PCI_LABEL=y
+CONFIG_HOTPLUG_PCI=y
+CONFIG_HOTPLUG_PCI_COMPAQ=m
+# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
+CONFIG_HOTPLUG_PCI_IBM=m
+CONFIG_HOTPLUG_PCI_ACPI=y
+CONFIG_HOTPLUG_PCI_ACPI_IBM=m
+CONFIG_HOTPLUG_PCI_CPCI=y
+CONFIG_HOTPLUG_PCI_CPCI_ZT5550=m
+CONFIG_HOTPLUG_PCI_CPCI_GENERIC=m
+CONFIG_HOTPLUG_PCI_SHPC=m
#
# PCI host controller drivers
#
+# CONFIG_PCIE_DW_PLAT is not set
CONFIG_ISA_DMA_API=y
CONFIG_ISA=y
# CONFIG_EISA is not set
@@ -761,37 +816,14 @@ CONFIG_I82365=m
CONFIG_TCIC=m
CONFIG_PCMCIA_PROBE=y
CONFIG_PCCARD_NONSTATIC=y
-CONFIG_HOTPLUG_PCI=y
-CONFIG_HOTPLUG_PCI_COMPAQ=m
-# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
-CONFIG_HOTPLUG_PCI_IBM=m
-CONFIG_HOTPLUG_PCI_ACPI=y
-CONFIG_HOTPLUG_PCI_ACPI_IBM=m
-CONFIG_HOTPLUG_PCI_CPCI=y
-CONFIG_HOTPLUG_PCI_CPCI_ZT5550=m
-CONFIG_HOTPLUG_PCI_CPCI_GENERIC=m
-CONFIG_HOTPLUG_PCI_SHPC=m
-CONFIG_RAPIDIO=m
-CONFIG_RAPIDIO_TSI721=m
-CONFIG_RAPIDIO_DISC_TIMEOUT=30
-# CONFIG_RAPIDIO_ENABLE_RX_TX_PORTS is not set
-CONFIG_RAPIDIO_DMA_ENGINE=y
-CONFIG_RAPIDIO_DEBUG=y
-CONFIG_RAPIDIO_ENUM_BASIC=m
-
-#
-# RapidIO Switch drivers
-#
-CONFIG_RAPIDIO_TSI57X=m
-CONFIG_RAPIDIO_CPS_XX=m
-CONFIG_RAPIDIO_TSI568=m
-CONFIG_RAPIDIO_CPS_GEN2=m
+# CONFIG_RAPIDIO is not set
# CONFIG_X86_SYSFB is not set
#
# Executable file formats / Emulations
#
CONFIG_BINFMT_ELF=y
+CONFIG_ELFCORE=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_BINFMT_SCRIPT=y
CONFIG_HAVE_AOUT=y
@@ -802,6 +834,7 @@ CONFIG_HAVE_ATOMIC_IOMAP=y
CONFIG_PMC_ATOM=y
CONFIG_NET=y
CONFIG_NET_INGRESS=y
+CONFIG_NET_EGRESS=y
#
# Networking options
@@ -850,10 +883,10 @@ CONFIG_INET_TUNNEL=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m
CONFIG_INET_XFRM_MODE_BEET=m
-CONFIG_INET_LRO=y
CONFIG_INET_DIAG=m
CONFIG_INET_TCP_DIAG=m
CONFIG_INET_UDP_DIAG=m
+CONFIG_INET_DIAG_DESTROY=y
CONFIG_TCP_CONG_ADVANCED=y
CONFIG_TCP_CONG_BIC=m
CONFIG_TCP_CONG_CUBIC=y
@@ -862,6 +895,7 @@ CONFIG_TCP_CONG_HTCP=m
CONFIG_TCP_CONG_HSTCP=m
CONFIG_TCP_CONG_HYBLA=m
CONFIG_TCP_CONG_VEGAS=m
+CONFIG_TCP_CONG_NV=m
CONFIG_TCP_CONG_SCALABLE=m
CONFIG_TCP_CONG_LP=m
CONFIG_TCP_CONG_VENO=m
@@ -869,6 +903,7 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_CONG_ILLINOIS=m
CONFIG_TCP_CONG_DCTCP=m
CONFIG_TCP_CONG_CDG=m
+CONFIG_TCP_CONG_BBR=m
CONFIG_DEFAULT_CUBIC=y
# CONFIG_DEFAULT_RENO is not set
CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -894,6 +929,8 @@ CONFIG_IPV6_SIT_6RD=y
CONFIG_IPV6_NDISC_NODETYPE=y
CONFIG_IPV6_TUNNEL=m
CONFIG_IPV6_GRE=m
+CONFIG_IPV6_FOU=m
+CONFIG_IPV6_FOU_TUNNEL=m
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
CONFIG_IPV6_MROUTE=y
@@ -962,9 +999,10 @@ CONFIG_NF_TABLES_INET=m
CONFIG_NF_TABLES_NETDEV=m
CONFIG_NFT_EXTHDR=m
CONFIG_NFT_META=m
+CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m
-CONFIG_NFT_RBTREE=m
-CONFIG_NFT_HASH=m
+CONFIG_NFT_SET_RBTREE=m
+CONFIG_NFT_SET_HASH=m
CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m
@@ -972,9 +1010,14 @@ CONFIG_NFT_MASQ=m
CONFIG_NFT_REDIR=m
CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m
+CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
CONFIG_NFT_REJECT_INET=m
CONFIG_NFT_COMPAT=m
+CONFIG_NFT_HASH=m
+CONFIG_NF_DUP_NETDEV=m
+CONFIG_NFT_DUP_NETDEV=m
+CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XTABLES=m
#
@@ -1127,7 +1170,6 @@ CONFIG_IP_VS_PE_SIP=m
#
CONFIG_NF_DEFRAG_IPV4=m
CONFIG_NF_CONNTRACK_IPV4=m
-# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
CONFIG_NF_TABLES_IPV4=m
CONFIG_NFT_CHAIN_ROUTE_IPV4=m
CONFIG_NFT_REJECT_IPV4=m
@@ -1254,6 +1296,7 @@ CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1=y
# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set
CONFIG_SCTP_COOKIE_HMAC_MD5=y
CONFIG_SCTP_COOKIE_HMAC_SHA1=y
+CONFIG_INET_SCTP_DIAG=m
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
CONFIG_ATM=m
@@ -1280,6 +1323,7 @@ CONFIG_NET_DSA_TAG_BRCM=y
CONFIG_NET_DSA_TAG_DSA=y
CONFIG_NET_DSA_TAG_EDSA=y
CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_NET_DSA_TAG_QCA=y
CONFIG_VLAN_8021Q=m
# CONFIG_VLAN_8021Q_GVRP is not set
CONFIG_VLAN_8021Q_MVRP=y
@@ -1292,6 +1336,7 @@ CONFIG_LLC2=m
# CONFIG_LAPB is not set
CONFIG_PHONET=m
CONFIG_6LOWPAN=m
+# CONFIG_6LOWPAN_DEBUGFS is not set
CONFIG_6LOWPAN_NHC=m
CONFIG_6LOWPAN_NHC_DEST=m
CONFIG_6LOWPAN_NHC_FRAGMENT=m
@@ -1300,6 +1345,12 @@ CONFIG_6LOWPAN_NHC_IPV6=m
CONFIG_6LOWPAN_NHC_MOBILITY=m
CONFIG_6LOWPAN_NHC_ROUTING=m
CONFIG_6LOWPAN_NHC_UDP=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
+CONFIG_6LOWPAN_GHC_UDP=m
+CONFIG_6LOWPAN_GHC_ICMPV6=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_IEEE802154=m
CONFIG_IEEE802154_NL802154_EXPERIMENTAL=y
CONFIG_IEEE802154_SOCKET=m
@@ -1353,7 +1404,16 @@ CONFIG_NET_CLS_FLOW=m
CONFIG_NET_CLS_CGROUP=m
CONFIG_NET_CLS_BPF=m
CONFIG_NET_CLS_FLOWER=m
-# CONFIG_NET_EMATCH is not set
+CONFIG_NET_CLS_MATCHALL=m
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_STACK=32
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_EMATCH_META=m
+CONFIG_NET_EMATCH_TEXT=m
+CONFIG_NET_EMATCH_CANID=m
+CONFIG_NET_EMATCH_IPSET=m
CONFIG_NET_CLS_ACT=y
CONFIG_NET_ACT_POLICE=m
CONFIG_NET_ACT_GACT=m
@@ -1368,15 +1428,23 @@ CONFIG_NET_ACT_CSUM=m
CONFIG_NET_ACT_VLAN=m
CONFIG_NET_ACT_BPF=m
CONFIG_NET_ACT_CONNMARK=m
+CONFIG_NET_ACT_SKBMOD=m
+CONFIG_NET_ACT_IFE=m
+CONFIG_NET_ACT_TUNNEL_KEY=m
+CONFIG_NET_IFE_SKBMARK=m
+CONFIG_NET_IFE_SKBPRIO=m
+CONFIG_NET_IFE_SKBTCINDEX=m
CONFIG_NET_CLS_IND=y
CONFIG_NET_SCH_FIFO=y
# CONFIG_DCB is not set
CONFIG_DNS_RESOLVER=m
CONFIG_BATMAN_ADV=m
+CONFIG_BATMAN_ADV_BATMAN_V=y
CONFIG_BATMAN_ADV_BLA=y
CONFIG_BATMAN_ADV_DAT=y
CONFIG_BATMAN_ADV_NC=y
CONFIG_BATMAN_ADV_MCAST=y
+CONFIG_BATMAN_ADV_DEBUGFS=y
# CONFIG_BATMAN_ADV_DEBUG is not set
CONFIG_OPENVSWITCH=m
CONFIG_OPENVSWITCH_GRE=m
@@ -1384,7 +1452,8 @@ CONFIG_OPENVSWITCH_VXLAN=m
CONFIG_OPENVSWITCH_GENEVE=m
CONFIG_VSOCKETS=m
CONFIG_VMWARE_VMCI_VSOCKETS=m
-CONFIG_NETLINK_MMAP=y
+CONFIG_VIRTIO_VSOCKETS=m
+CONFIG_VIRTIO_VSOCKETS_COMMON=m
CONFIG_NETLINK_DIAG=m
CONFIG_MPLS=y
CONFIG_NET_MPLS_GSO=m
@@ -1393,9 +1462,11 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_HSR=m
CONFIG_NET_SWITCHDEV=y
CONFIG_NET_L3_MASTER_DEV=y
+CONFIG_NET_NCSI=y
CONFIG_RPS=y
CONFIG_RFS_ACCEL=y
CONFIG_XPS=y
+CONFIG_SOCK_CGROUP_DATA=y
# CONFIG_CGROUP_NET_PRIO is not set
CONFIG_CGROUP_NET_CLASSID=y
CONFIG_NET_RX_BUSY_POLL=y
@@ -1445,8 +1516,16 @@ CONFIG_CAN_SLCAN=m
CONFIG_CAN_DEV=m
CONFIG_CAN_CALC_BITTIMING=y
CONFIG_CAN_LEDS=y
-CONFIG_PCH_CAN=m
# CONFIG_CAN_GRCAN is not set
+CONFIG_PCH_CAN=m
+CONFIG_CAN_C_CAN=m
+CONFIG_CAN_C_CAN_PLATFORM=m
+CONFIG_CAN_C_CAN_PCI=m
+CONFIG_CAN_CC770=m
+# CONFIG_CAN_CC770_ISA is not set
+CONFIG_CAN_CC770_PLATFORM=m
+CONFIG_CAN_IFI_CANFD=m
+CONFIG_CAN_M_CAN=m
CONFIG_CAN_SJA1000=m
# CONFIG_CAN_SJA1000_ISA is not set
CONFIG_CAN_SJA1000_PLATFORM=m
@@ -1458,13 +1537,8 @@ CONFIG_CAN_PEAK_PCIEC=y
CONFIG_CAN_KVASER_PCI=m
CONFIG_CAN_PLX_PCI=m
# CONFIG_CAN_TSCAN1 is not set
-CONFIG_CAN_C_CAN=m
-CONFIG_CAN_C_CAN_PLATFORM=m
-CONFIG_CAN_C_CAN_PCI=m
-CONFIG_CAN_M_CAN=m
-CONFIG_CAN_CC770=m
-# CONFIG_CAN_CC770_ISA is not set
-CONFIG_CAN_CC770_PLATFORM=m
+CONFIG_CAN_SOFTING=m
+# CONFIG_CAN_SOFTING_CS is not set
#
# CAN SPI interfaces
@@ -1480,8 +1554,6 @@ CONFIG_CAN_GS_USB=m
CONFIG_CAN_KVASER_USB=m
CONFIG_CAN_PEAK_USB=m
CONFIG_CAN_8DEV_USB=m
-CONFIG_CAN_SOFTING=m
-# CONFIG_CAN_SOFTING_CS is not set
# CONFIG_CAN_DEBUG_DEVICES is not set
CONFIG_IRDA=m
@@ -1552,6 +1624,7 @@ CONFIG_BT_HIDP=m
CONFIG_BT_HS=y
CONFIG_BT_LE=y
CONFIG_BT_6LOWPAN=m
+CONFIG_BT_LEDS=y
# CONFIG_BT_SELFTEST is not set
CONFIG_BT_DEBUGFS=y
@@ -1575,6 +1648,8 @@ CONFIG_BT_HCIUART_3WIRE=y
CONFIG_BT_HCIUART_INTEL=y
CONFIG_BT_HCIUART_BCM=y
CONFIG_BT_HCIUART_QCA=y
+CONFIG_BT_HCIUART_AG6XX=y
+CONFIG_BT_HCIUART_MRVL=y
CONFIG_BT_HCIBCM203X=m
CONFIG_BT_HCIBPA10X=m
CONFIG_BT_HCIBFUSB=m
@@ -1588,8 +1663,12 @@ CONFIG_BT_MRVL_SDIO=m
CONFIG_BT_ATH3K=m
CONFIG_BT_WILINK=m
CONFIG_AF_RXRPC=m
+CONFIG_AF_RXRPC_IPV6=y
+# CONFIG_AF_RXRPC_INJECT_LOSS is not set
# CONFIG_AF_RXRPC_DEBUG is not set
-CONFIG_RXKAD=m
+CONFIG_RXKAD=y
+CONFIG_AF_KCM=m
+CONFIG_STREAM_PARSER=m
CONFIG_FIB_RULES=y
CONFIG_WIRELESS=y
CONFIG_WIRELESS_EXT=y
@@ -1600,7 +1679,6 @@ CONFIG_WEXT_PRIV=y
CONFIG_CFG80211=m
# CONFIG_NL80211_TESTMODE is not set
# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
-# CONFIG_CFG80211_REG_DEBUG is not set
CONFIG_CFG80211_DEFAULT_PS=y
# CONFIG_CFG80211_DEBUGFS is not set
# CONFIG_CFG80211_INTERNAL_REGDB is not set
@@ -1653,7 +1731,6 @@ CONFIG_NFC_HCI=m
#
# Near Field Communication (NFC) devices
#
-CONFIG_NFC_PN533=m
CONFIG_NFC_WILINK=m
CONFIG_NFC_TRF7970A=m
CONFIG_NFC_MEI_PHY=m
@@ -1663,18 +1740,24 @@ CONFIG_NFC_FDP=m
CONFIG_NFC_FDP_I2C=m
CONFIG_NFC_PN544=m
CONFIG_NFC_PN544_MEI=m
+CONFIG_NFC_PN533=m
+CONFIG_NFC_PN533_USB=m
+CONFIG_NFC_PN533_I2C=m
CONFIG_NFC_MICROREAD=m
CONFIG_NFC_MICROREAD_MEI=m
CONFIG_NFC_MRVL=m
CONFIG_NFC_MRVL_USB=m
CONFIG_NFC_MRVL_I2C=m
-CONFIG_NFC_ST21NFCA=m
CONFIG_NFC_ST_NCI=m
CONFIG_NFC_ST_NCI_I2C=m
# CONFIG_NFC_ST_NCI_SPI is not set
# CONFIG_NFC_NXP_NCI is not set
# CONFIG_NFC_S3FWRN5_I2C is not set
+# CONFIG_NFC_ST95HF is not set
CONFIG_LWTUNNEL=y
+CONFIG_DST_CACHE=y
+CONFIG_NET_DEVLINK=m
+CONFIG_MAY_USE_DEVLINK=m
#
# Device Drivers
@@ -1698,12 +1781,13 @@ CONFIG_ALLOW_DEV_COREDUMP=y
CONFIG_DEV_COREDUMP=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_GENERIC_CPU_DEVICES is not set
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
-CONFIG_REGMAP_SPI=m
+CONFIG_REGMAP_SPI=y
CONFIG_REGMAP_SPMI=m
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_IRQ=y
@@ -1773,6 +1857,7 @@ CONFIG_MTD_ABSENT=m
CONFIG_MTD_COMPLEX_MAPPINGS=y
# CONFIG_MTD_PHYSMAP is not set
CONFIG_MTD_PHYSMAP_OF=m
+# CONFIG_MTD_PHYSMAP_OF_VERSATILE is not set
# CONFIG_MTD_SBC_GXX is not set
# CONFIG_MTD_AMD76XROM is not set
# CONFIG_MTD_ICHXROM is not set
@@ -1807,32 +1892,8 @@ CONFIG_MTD_BLOCK2MTD=m
#
# Disk-On-Chip Device Drivers
#
-CONFIG_MTD_DOCG3=m
-CONFIG_BCH_CONST_M=14
-CONFIG_BCH_CONST_T=4
-CONFIG_MTD_NAND_ECC=m
-CONFIG_MTD_NAND_ECC_SMC=y
-CONFIG_MTD_NAND=m
-# CONFIG_MTD_NAND_ECC_BCH is not set
-CONFIG_MTD_SM_COMMON=m
-CONFIG_MTD_NAND_DENALI=m
-CONFIG_MTD_NAND_DENALI_PCI=m
-CONFIG_MTD_NAND_DENALI_DT=m
-CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xFF108018
-CONFIG_MTD_NAND_GPIO=m
-# CONFIG_MTD_NAND_OMAP_BCH_BUILD is not set
-CONFIG_MTD_NAND_IDS=m
-CONFIG_MTD_NAND_RICOH=m
-CONFIG_MTD_NAND_DISKONCHIP=m
-# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
-CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
-# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
-CONFIG_MTD_NAND_DOCG4=m
-CONFIG_MTD_NAND_CAFE=m
-CONFIG_MTD_NAND_CS553X=m
-CONFIG_MTD_NAND_NANDSIM=m
-# CONFIG_MTD_NAND_PLATFORM is not set
-# CONFIG_MTD_NAND_HISI504 is not set
+# CONFIG_MTD_DOCG3 is not set
+# CONFIG_MTD_NAND is not set
# CONFIG_MTD_ONENAND is not set
#
@@ -1857,7 +1918,6 @@ CONFIG_OF_NET=y
CONFIG_OF_MDIO=m
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
-CONFIG_OF_MTD=y
# CONFIG_OF_OVERLAY is not set
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_PARPORT=m
@@ -1885,7 +1945,6 @@ CONFIG_BLK_DEV_FD=m
# CONFIG_PARIDE is not set
CONFIG_BLK_DEV_PCIESSD_MTIP32XX=m
CONFIG_ZRAM=m
-CONFIG_ZRAM_LZ4_COMPRESS=y
CONFIG_BLK_CPQ_CISS_DA=m
# CONFIG_CISS_SCSI_TAPE is not set
CONFIG_BLK_DEV_DAC960=m
@@ -1910,7 +1969,14 @@ CONFIG_VIRTIO_BLK=m
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_RBD=m
CONFIG_BLK_DEV_RSXX=m
-CONFIG_BLK_DEV_NVME=y
+CONFIG_NVME_CORE=m
+CONFIG_BLK_DEV_NVME=m
+# CONFIG_BLK_DEV_NVME_SCSI is not set
+CONFIG_NVME_FABRICS=m
+CONFIG_NVME_RDMA=m
+CONFIG_NVME_TARGET=m
+CONFIG_NVME_TARGET_LOOP=m
+CONFIG_NVME_TARGET_RDMA=m
#
# Misc devices
@@ -1935,20 +2001,17 @@ CONFIG_APDS9802ALS=m
CONFIG_ISL29003=m
CONFIG_ISL29020=m
CONFIG_SENSORS_TSL2550=m
-CONFIG_SENSORS_BH1780=m
CONFIG_SENSORS_BH1770=m
CONFIG_SENSORS_APDS990X=m
CONFIG_HMC6352=m
CONFIG_DS1682=m
# CONFIG_TI_DAC7512 is not set
CONFIG_VMWARE_BALLOON=m
-CONFIG_BMP085=y
-CONFIG_BMP085_I2C=m
-# CONFIG_BMP085_SPI is not set
CONFIG_PCH_PHUB=m
CONFIG_USB_SWITCH_FSA9480=m
# CONFIG_LATTICE_ECP3_CONFIG is not set
# CONFIG_SRAM is not set
+# CONFIG_PANEL is not set
CONFIG_C2PORT=m
CONFIG_C2PORT_DURAMAR_2150=m
@@ -1978,6 +2041,7 @@ CONFIG_ALTERA_STAPL=m
CONFIG_INTEL_MEI=m
CONFIG_INTEL_MEI_ME=m
CONFIG_INTEL_MEI_TXE=m
+CONFIG_INTEL_IPTS=m
CONFIG_VMWARE_VMCI=m
#
@@ -1989,6 +2053,10 @@ CONFIG_VMWARE_VMCI=m
#
#
+# VOP Bus Driver
+#
+
+#
# Intel MIC Host Driver
#
@@ -2003,10 +2071,14 @@ CONFIG_VMWARE_VMCI=m
#
# Intel MIC Coprocessor State Management (COSM) Drivers
#
+
+#
+# VOP Driver
+#
+CONFIG_VHOST_RING=m
CONFIG_ECHO=m
# CONFIG_CXL_BASE is not set
-# CONFIG_CXL_KERNEL_API is not set
-# CONFIG_CXL_EEH is not set
+# CONFIG_CXL_AFU_DRIVER_OPS is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
@@ -2059,7 +2131,6 @@ CONFIG_BLK_DEV_3W_XXXX_RAID=m
CONFIG_SCSI_HPSA=m
CONFIG_SCSI_3W_9XXX=m
CONFIG_SCSI_3W_SAS=m
-CONFIG_SCSI_7000FASST=m
CONFIG_SCSI_ACARD=m
CONFIG_SCSI_AHA152X=m
CONFIG_SCSI_AHA1542=m
@@ -2084,7 +2155,6 @@ CONFIG_SCSI_MVSAS_TASKLET=y
CONFIG_SCSI_MVUMI=m
CONFIG_SCSI_DPT_I2O=m
CONFIG_SCSI_ADVANSYS=m
-CONFIG_SCSI_IN2000=m
CONFIG_SCSI_ARCMSR=m
CONFIG_SCSI_ESAS2R=m
CONFIG_MEGARAID_NEWGEN=y
@@ -2096,9 +2166,12 @@ CONFIG_SCSI_MPT3SAS=m
CONFIG_SCSI_MPT2SAS_MAX_SGE=128
CONFIG_SCSI_MPT3SAS_MAX_SGE=128
CONFIG_SCSI_MPT2SAS=m
+CONFIG_SCSI_SMARTPQI=m
CONFIG_SCSI_UFSHCD=m
CONFIG_SCSI_UFSHCD_PCI=m
+# CONFIG_SCSI_UFS_DWC_TC_PCI is not set
CONFIG_SCSI_UFSHCD_PLATFORM=m
+# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set
CONFIG_SCSI_HPTIOP=m
CONFIG_SCSI_BUSLOGIC=m
# CONFIG_SCSI_FLASHPOINT is not set
@@ -2111,7 +2184,6 @@ CONFIG_FCOE_FNIC=m
CONFIG_SCSI_SNIC=m
# CONFIG_SCSI_SNIC_DEBUG_FS is not set
CONFIG_SCSI_DMX3191D=m
-CONFIG_SCSI_DTC3280=m
CONFIG_SCSI_EATA=m
# CONFIG_SCSI_EATA_TAGGED_QUEUE is not set
# CONFIG_SCSI_EATA_LINKED_COMMANDS is not set
@@ -2121,7 +2193,6 @@ CONFIG_SCSI_GDTH=m
CONFIG_SCSI_ISCI=m
CONFIG_SCSI_GENERIC_NCR5380=m
CONFIG_SCSI_GENERIC_NCR5380_MMIO=m
-CONFIG_SCSI_GENERIC_NCR53C400=y
CONFIG_SCSI_IPS=m
CONFIG_SCSI_INITIO=m
CONFIG_SCSI_INIA100=m
@@ -2139,23 +2210,17 @@ CONFIG_SCSI_SYM53C8XX_MMIO=y
CONFIG_SCSI_IPR=m
# CONFIG_SCSI_IPR_TRACE is not set
# CONFIG_SCSI_IPR_DUMP is not set
-CONFIG_SCSI_PAS16=m
CONFIG_SCSI_QLOGIC_FAS=m
CONFIG_SCSI_QLOGIC_1280=m
CONFIG_SCSI_QLA_FC=m
CONFIG_TCM_QLA2XXX=m
+# CONFIG_TCM_QLA2XXX_DEBUG is not set
CONFIG_SCSI_QLA_ISCSI=m
CONFIG_SCSI_LPFC=m
# CONFIG_SCSI_LPFC_DEBUG_FS is not set
CONFIG_SCSI_SYM53C416=m
CONFIG_SCSI_DC395x=m
CONFIG_SCSI_AM53C974=m
-CONFIG_SCSI_T128=m
-CONFIG_SCSI_U14_34F=m
-# CONFIG_SCSI_U14_34F_TAGGED_QUEUE is not set
-# CONFIG_SCSI_U14_34F_LINKED_COMMANDS is not set
-CONFIG_SCSI_U14_34F_MAX_TAGS=8
-CONFIG_SCSI_ULTRASTOR=m
CONFIG_SCSI_NSP32=m
CONFIG_SCSI_WD719X=m
# CONFIG_SCSI_DEBUG is not set
@@ -2210,6 +2275,9 @@ CONFIG_ATA_BMDMA=y
# SATA SFF controllers with BMDMA
#
CONFIG_ATA_PIIX=m
+CONFIG_SATA_DWC=m
+# CONFIG_SATA_DWC_OLD_DMA is not set
+# CONFIG_SATA_DWC_DEBUG is not set
CONFIG_SATA_MV=m
CONFIG_SATA_NV=m
CONFIG_SATA_PROMISE=m
@@ -2300,14 +2368,13 @@ CONFIG_BLK_DEV_DM=m
# CONFIG_DM_MQ_DEFAULT is not set
# CONFIG_DM_DEBUG is not set
CONFIG_DM_BUFIO=m
+# CONFIG_DM_DEBUG_BLOCK_STACK_TRACING is not set
CONFIG_DM_BIO_PRISON=m
CONFIG_DM_PERSISTENT_DATA=m
-# CONFIG_DM_DEBUG_BLOCK_STACK_TRACING is not set
CONFIG_DM_CRYPT=m
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_THIN_PROVISIONING=m
CONFIG_DM_CACHE=m
-CONFIG_DM_CACHE_MQ=m
CONFIG_DM_CACHE_SMQ=m
CONFIG_DM_CACHE_CLEANER=m
CONFIG_DM_ERA=m
@@ -2322,6 +2389,7 @@ CONFIG_DM_DELAY=m
CONFIG_DM_UEVENT=y
CONFIG_DM_FLAKEY=m
CONFIG_DM_VERITY=m
+CONFIG_DM_VERITY_FEC=y
CONFIG_DM_SWITCH=m
CONFIG_DM_LOG_WRITES=m
CONFIG_TARGET_CORE=m
@@ -2332,6 +2400,7 @@ CONFIG_TCM_USER2=m
CONFIG_LOOPBACK_TARGET=m
CONFIG_TCM_FC=m
CONFIG_ISCSI_TARGET=m
+CONFIG_ISCSI_TARGET_CXGB4=m
CONFIG_SBP_TARGET=m
CONFIG_FUSION=y
CONFIG_FUSION_SPI=m
@@ -2370,13 +2439,12 @@ CONFIG_MACVTAP=m
CONFIG_IPVLAN=m
CONFIG_VXLAN=m
CONFIG_GENEVE=m
+CONFIG_GTP=m
+CONFIG_MACSEC=m
CONFIG_NETCONSOLE=m
CONFIG_NETCONSOLE_DYNAMIC=y
CONFIG_NETPOLL=y
CONFIG_NET_POLL_CONTROLLER=y
-CONFIG_RIONET=m
-CONFIG_RIONET_TX_SIZE=128
-CONFIG_RIONET_RX_SIZE=128
CONFIG_TUN=m
# CONFIG_TUN_VNET_CROSS_LE is not set
CONFIG_VETH=m
@@ -2424,23 +2492,20 @@ CONFIG_CAIF_SPI_SLAVE=m
CONFIG_CAIF_SPI_SYNC=y
CONFIG_CAIF_HSI=m
CONFIG_CAIF_VIRTIO=m
-CONFIG_VHOST_NET=m
-CONFIG_VHOST_SCSI=m
-CONFIG_VHOST_RING=m
-CONFIG_VHOST=m
-# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set
#
# Distributed Switch Architecture drivers
#
-CONFIG_NET_DSA_MV88E6XXX=m
CONFIG_NET_DSA_MV88E6060=m
-CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y
-CONFIG_NET_DSA_MV88E6131=m
-CONFIG_NET_DSA_MV88E6123_61_65=m
-CONFIG_NET_DSA_MV88E6171=m
-CONFIG_NET_DSA_MV88E6352=m
CONFIG_NET_DSA_BCM_SF2=m
+CONFIG_B53=m
+CONFIG_B53_SPI_DRIVER=m
+CONFIG_B53_MDIO_DRIVER=m
+CONFIG_B53_MMAP_DRIVER=m
+CONFIG_B53_SRAB_DRIVER=m
+CONFIG_NET_DSA_MV88E6XXX=m
+CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y
+CONFIG_NET_DSA_QCA8K=m
CONFIG_ETHERNET=y
CONFIG_MDIO=m
CONFIG_NET_VENDOR_3COM=y
@@ -2458,6 +2523,8 @@ CONFIG_NET_VENDOR_ALTEON=y
CONFIG_ACENIC=m
# CONFIG_ACENIC_OMIT_TIGON_I is not set
CONFIG_ALTERA_TSE=m
+CONFIG_NET_VENDOR_AMAZON=y
+CONFIG_ENA_ETHERNET=m
CONFIG_NET_VENDOR_AMD=y
CONFIG_AMD8111_ETH=m
CONFIG_LANCE=m
@@ -2488,7 +2555,6 @@ CONFIG_CNIC=m
CONFIG_TIGON3=m
CONFIG_BNX2X=m
CONFIG_BNX2X_SRIOV=y
-CONFIG_BNX2X_VXLAN=y
CONFIG_SYSTEMPORT=m
CONFIG_BNXT=m
CONFIG_BNXT_SRIOV=y
@@ -2501,6 +2567,7 @@ CONFIG_CHELSIO_T1_1G=y
CONFIG_CHELSIO_T3=m
CONFIG_CHELSIO_T4=m
CONFIG_CHELSIO_T4VF=m
+CONFIG_CHELSIO_LIB=m
CONFIG_NET_VENDOR_CIRRUS=y
CONFIG_CS89x0=m
# CONFIG_CS89x0_PLATFORM is not set
@@ -2528,7 +2595,6 @@ CONFIG_SUNDANCE=m
CONFIG_NET_VENDOR_EMULEX=y
CONFIG_BE2NET=m
CONFIG_BE2NET_HWMON=y
-CONFIG_BE2NET_VXLAN=y
# CONFIG_NET_VENDOR_EZCHIP is not set
CONFIG_NET_VENDOR_EXAR=y
CONFIG_S2IO=m
@@ -2542,23 +2608,22 @@ CONFIG_NET_VENDOR_INTEL=y
CONFIG_E100=m
CONFIG_E1000=m
CONFIG_E1000E=m
+CONFIG_E1000E_HWTS=y
CONFIG_IGB=m
CONFIG_IGB_HWMON=y
CONFIG_IGBVF=m
CONFIG_IXGB=m
CONFIG_IXGBE=m
-CONFIG_IXGBE_VXLAN=y
CONFIG_IXGBE_HWMON=y
CONFIG_IXGBEVF=m
CONFIG_I40E=m
-CONFIG_I40E_VXLAN=y
CONFIG_I40EVF=m
CONFIG_FM10K=m
-# CONFIG_FM10K_VXLAN is not set
CONFIG_NET_VENDOR_I825XX=y
CONFIG_JME=m
CONFIG_NET_VENDOR_MARVELL=y
CONFIG_MVMDIO=m
+# CONFIG_MVNETA_BM is not set
CONFIG_SKGE=m
# CONFIG_SKGE_DEBUG is not set
CONFIG_SKGE_GENESIS=y
@@ -2566,12 +2631,12 @@ CONFIG_SKY2=m
# CONFIG_SKY2_DEBUG is not set
CONFIG_NET_VENDOR_MELLANOX=y
CONFIG_MLX4_EN=m
-CONFIG_MLX4_EN_VXLAN=y
CONFIG_MLX4_CORE=m
CONFIG_MLX4_DEBUG=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_CORE_EN=y
CONFIG_MLXSW_CORE=m
+CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_PCI=m
CONFIG_MLXSW_SWITCHX2=m
CONFIG_MLXSW_SPECTRUM=m
@@ -2590,6 +2655,9 @@ CONFIG_FEALNX=m
CONFIG_NET_VENDOR_NATSEMI=y
CONFIG_NATSEMI=m
CONFIG_NS83820=m
+CONFIG_NET_VENDOR_NETRONOME=y
+CONFIG_NFP_NETVF=m
+# CONFIG_NFP_NET_DEBUG is not set
CONFIG_NET_VENDOR_8390=y
CONFIG_PCMCIA_AXNET=m
CONFIG_NE2000=m
@@ -2609,14 +2677,15 @@ CONFIG_NET_VENDOR_QLOGIC=y
CONFIG_QLA3XXX=m
CONFIG_QLCNIC=m
CONFIG_QLCNIC_SRIOV=y
-CONFIG_QLCNIC_VXLAN=y
CONFIG_QLCNIC_HWMON=y
CONFIG_QLGE=m
CONFIG_NETXEN_NIC=m
CONFIG_QED=m
+CONFIG_QED_SRIOV=y
CONFIG_QEDE=m
CONFIG_NET_VENDOR_QUALCOMM=y
CONFIG_QCA7000=m
+CONFIG_QCOM_EMAC=m
CONFIG_NET_VENDOR_REALTEK=y
CONFIG_ATP=m
CONFIG_8139CP=m
@@ -2677,47 +2746,57 @@ CONFIG_WIZNET_W5300=m
# CONFIG_WIZNET_BUS_DIRECT is not set
# CONFIG_WIZNET_BUS_INDIRECT is not set
CONFIG_WIZNET_BUS_ANY=y
+CONFIG_WIZNET_W5100_SPI=m
CONFIG_NET_VENDOR_XIRCOM=y
CONFIG_PCMCIA_XIRC2PS=m
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
CONFIG_NET_SB1000=m
CONFIG_PHYLIB=m
+CONFIG_SWPHY=y
+
+#
+# MDIO bus device drivers
+#
+CONFIG_MDIO_BCM_UNIMAC=m
+CONFIG_MDIO_BITBANG=m
+CONFIG_MDIO_BUS_MUX=m
+CONFIG_MDIO_BUS_MUX_GPIO=m
+CONFIG_MDIO_BUS_MUX_MMIOREG=m
+# CONFIG_MDIO_GPIO is not set
+# CONFIG_MDIO_HISI_FEMAC is not set
#
# MII PHY device drivers
#
+CONFIG_AMD_PHY=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AT803X_PHY=m
-CONFIG_AMD_PHY=m
-CONFIG_MARVELL_PHY=m
-CONFIG_DAVICOM_PHY=m
-CONFIG_QSEMI_PHY=m
-CONFIG_LXT_PHY=m
-CONFIG_CICADA_PHY=m
-CONFIG_VITESSE_PHY=m
-CONFIG_TERANETICS_PHY=m
-CONFIG_SMSC_PHY=m
-CONFIG_BCM_NET_PHYLIB=m
-CONFIG_BROADCOM_PHY=m
CONFIG_BCM7XXX_PHY=m
CONFIG_BCM87XX_PHY=m
+CONFIG_BCM_NET_PHYLIB=m
+CONFIG_BROADCOM_PHY=m
+CONFIG_CICADA_PHY=m
+CONFIG_DAVICOM_PHY=m
+CONFIG_DP83848_PHY=m
+CONFIG_DP83867_PHY=m
+CONFIG_FIXED_PHY=m
CONFIG_ICPLUS_PHY=m
-CONFIG_REALTEK_PHY=m
-CONFIG_NATIONAL_PHY=m
-CONFIG_STE10XP=m
+CONFIG_INTEL_XWAY_PHY=m
CONFIG_LSI_ET1011C_PHY=m
+CONFIG_LXT_PHY=m
+CONFIG_MARVELL_PHY=m
CONFIG_MICREL_PHY=m
-CONFIG_DP83848_PHY=m
-CONFIG_DP83867_PHY=m
CONFIG_MICROCHIP_PHY=m
-CONFIG_FIXED_PHY=m
-CONFIG_MDIO_BITBANG=m
-# CONFIG_MDIO_GPIO is not set
-CONFIG_MDIO_BUS_MUX=m
-CONFIG_MDIO_BUS_MUX_GPIO=m
-CONFIG_MDIO_BUS_MUX_MMIOREG=m
-CONFIG_MDIO_BCM_UNIMAC=m
+CONFIG_MICROSEMI_PHY=m
+CONFIG_NATIONAL_PHY=m
+CONFIG_QSEMI_PHY=m
+CONFIG_REALTEK_PHY=m
+CONFIG_SMSC_PHY=m
+CONFIG_STE10XP=m
+CONFIG_TERANETICS_PHY=m
+CONFIG_VITESSE_PHY=m
+CONFIG_XILINX_GMII2RGMII=m
# CONFIG_MICREL_KS8995MA is not set
CONFIG_PLIP=m
CONFIG_PPP=m
@@ -2766,6 +2845,7 @@ CONFIG_USB_NET_NET1080=m
CONFIG_USB_NET_PLUSB=m
CONFIG_USB_NET_MCS7830=m
CONFIG_USB_NET_RNDIS_HOST=m
+CONFIG_USB_NET_CDC_SUBSET_ENABLE=m
CONFIG_USB_NET_CDC_SUBSET=m
CONFIG_USB_ALI_M5632=y
CONFIG_USB_AN2720=y
@@ -2785,28 +2865,10 @@ CONFIG_USB_SIERRA_NET=m
CONFIG_USB_VL600=m
CONFIG_USB_NET_CH9200=m
CONFIG_WLAN=y
-CONFIG_PCMCIA_RAYCS=m
-CONFIG_LIBERTAS_THINFIRM=m
-# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set
-CONFIG_LIBERTAS_THINFIRM_USB=m
-CONFIG_AIRO=m
-CONFIG_ATMEL=m
-CONFIG_PCI_ATMEL=m
-CONFIG_PCMCIA_ATMEL=m
-CONFIG_AT76C50X_USB=m
-CONFIG_AIRO_CS=m
-CONFIG_PCMCIA_WL3501=m
-CONFIG_PRISM54=m
-CONFIG_USB_ZD1201=m
-CONFIG_USB_NET_RNDIS_WLAN=m
+CONFIG_WLAN_VENDOR_ADMTEK=y
CONFIG_ADM8211=m
-CONFIG_RTL8180=m
-CONFIG_RTL8187=m
-CONFIG_RTL8187_LEDS=y
-# CONFIG_MAC80211_HWSIM is not set
-CONFIG_MWL8K=m
CONFIG_ATH_COMMON=m
-CONFIG_ATH_CARDS=m
+CONFIG_WLAN_VENDOR_ATH=y
# CONFIG_ATH_DEBUG is not set
CONFIG_ATH5K=m
# CONFIG_ATH5K_DEBUG is not set
@@ -2827,6 +2889,7 @@ CONFIG_ATH9K_RFKILL=y
CONFIG_ATH9K_PCOEM=y
CONFIG_ATH9K_HTC=m
# CONFIG_ATH9K_HTC_DEBUGFS is not set
+# CONFIG_ATH9K_HWRNG is not set
CONFIG_CARL9170=m
CONFIG_CARL9170_LEDS=y
# CONFIG_CARL9170_DEBUGFS is not set
@@ -2843,11 +2906,18 @@ CONFIG_WIL6210_ISR_COR=y
# CONFIG_WIL6210_TRACING is not set
CONFIG_ATH10K=m
CONFIG_ATH10K_PCI=m
+CONFIG_ATH10K_AHB=y
# CONFIG_ATH10K_DEBUG is not set
CONFIG_ATH10K_DEBUGFS=y
# CONFIG_ATH10K_TRACING is not set
CONFIG_WCN36XX=m
# CONFIG_WCN36XX_DEBUGFS is not set
+CONFIG_WLAN_VENDOR_ATMEL=y
+CONFIG_ATMEL=m
+CONFIG_PCI_ATMEL=m
+CONFIG_PCMCIA_ATMEL=m
+CONFIG_AT76C50X_USB=m
+CONFIG_WLAN_VENDOR_BROADCOM=y
CONFIG_B43=m
CONFIG_B43_BCMA=y
CONFIG_B43_SSB=y
@@ -2887,12 +2957,10 @@ CONFIG_BRCMFMAC_USB=y
CONFIG_BRCMFMAC_PCIE=y
# CONFIG_BRCM_TRACING is not set
# CONFIG_BRCMDBG is not set
-CONFIG_HOSTAP=m
-CONFIG_HOSTAP_FIRMWARE=y
-# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set
-CONFIG_HOSTAP_PLX=m
-CONFIG_HOSTAP_PCI=m
-CONFIG_HOSTAP_CS=m
+CONFIG_WLAN_VENDOR_CISCO=y
+CONFIG_AIRO=m
+CONFIG_AIRO_CS=m
+CONFIG_WLAN_VENDOR_INTEL=y
CONFIG_IPW2100=m
CONFIG_IPW2100_MONITOR=y
# CONFIG_IPW2100_DEBUG is not set
@@ -2904,13 +2972,22 @@ CONFIG_IPW2200_QOS=y
# CONFIG_IPW2200_DEBUG is not set
CONFIG_LIBIPW=m
# CONFIG_LIBIPW_DEBUG is not set
+CONFIG_IWLEGACY=m
+CONFIG_IWL4965=m
+CONFIG_IWL3945=m
+
+#
+# iwl3945 / iwl4965 Debugging Options
+#
+# CONFIG_IWLEGACY_DEBUG is not set
+# CONFIG_IWLEGACY_DEBUGFS is not set
CONFIG_IWLWIFI=m
CONFIG_IWLWIFI_LEDS=y
CONFIG_IWLDVM=m
CONFIG_IWLMVM=m
CONFIG_IWLWIFI_OPMODE_MODULAR=y
# CONFIG_IWLWIFI_BCAST_FILTERING is not set
-# CONFIG_IWLWIFI_UAPSD is not set
+# CONFIG_IWLWIFI_PCIE_RTPM is not set
#
# Debugging Options
@@ -2918,22 +2995,13 @@ CONFIG_IWLWIFI_OPMODE_MODULAR=y
# CONFIG_IWLWIFI_DEBUG is not set
# CONFIG_IWLWIFI_DEBUGFS is not set
CONFIG_IWLWIFI_DEVICE_TRACING=y
-CONFIG_IWLEGACY=m
-CONFIG_IWL4965=m
-CONFIG_IWL3945=m
-
-#
-# iwl3945 / iwl4965 Debugging Options
-#
-# CONFIG_IWLEGACY_DEBUG is not set
-# CONFIG_IWLEGACY_DEBUGFS is not set
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_USB=m
-CONFIG_LIBERTAS_CS=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_LIBERTAS_SPI=m
-# CONFIG_LIBERTAS_DEBUG is not set
-CONFIG_LIBERTAS_MESH=y
+CONFIG_WLAN_VENDOR_INTERSIL=y
+CONFIG_HOSTAP=m
+CONFIG_HOSTAP_FIRMWARE=y
+# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set
+CONFIG_HOSTAP_PLX=m
+CONFIG_HOSTAP_PCI=m
+CONFIG_HOSTAP_CS=m
CONFIG_HERMES=m
CONFIG_HERMES_PRISM=y
CONFIG_HERMES_CACHE_FW_ON_INIT=y
@@ -2950,6 +3018,26 @@ CONFIG_P54_PCI=m
CONFIG_P54_SPI=m
# CONFIG_P54_SPI_DEFAULT_EEPROM is not set
CONFIG_P54_LEDS=y
+CONFIG_PRISM54=m
+CONFIG_WLAN_VENDOR_MARVELL=y
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_CS=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_SPI=m
+# CONFIG_LIBERTAS_DEBUG is not set
+CONFIG_LIBERTAS_MESH=y
+CONFIG_LIBERTAS_THINFIRM=m
+# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set
+CONFIG_LIBERTAS_THINFIRM_USB=m
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_MWIFIEX_PCIE=m
+CONFIG_MWIFIEX_USB=m
+CONFIG_MWL8K=m
+CONFIG_WLAN_VENDOR_MEDIATEK=y
+CONFIG_MT7601U=m
+CONFIG_WLAN_VENDOR_RALINK=y
CONFIG_RT2X00=m
CONFIG_RT2400PCI=m
CONFIG_RT2500PCI=m
@@ -2979,8 +3067,10 @@ CONFIG_RT2X00_LIB_CRYPTO=y
CONFIG_RT2X00_LIB_LEDS=y
# CONFIG_RT2X00_LIB_DEBUGFS is not set
# CONFIG_RT2X00_DEBUG is not set
-CONFIG_WL_MEDIATEK=y
-CONFIG_MT7601U=m
+CONFIG_WLAN_VENDOR_REALTEK=y
+CONFIG_RTL8180=m
+CONFIG_RTL8187=m
+CONFIG_RTL8187_LEDS=y
CONFIG_RTL_CARDS=m
CONFIG_RTL8192CE=m
CONFIG_RTL8192SE=m
@@ -3000,7 +3090,16 @@ CONFIG_RTL8723_COMMON=m
CONFIG_RTLBTCOEXIST=m
CONFIG_RTL8XXXU=m
CONFIG_RTL8XXXU_UNTESTED=y
-CONFIG_WL_TI=y
+CONFIG_WLAN_VENDOR_RSI=y
+CONFIG_RSI_91X=m
+# CONFIG_RSI_DEBUGFS is not set
+CONFIG_RSI_SDIO=m
+CONFIG_RSI_USB=m
+CONFIG_WLAN_VENDOR_ST=y
+CONFIG_CW1200=m
+CONFIG_CW1200_WLAN_SDIO=m
+CONFIG_CW1200_WLAN_SPI=m
+CONFIG_WLAN_VENDOR_TI=y
CONFIG_WL1251=m
# CONFIG_WL1251_SPI is not set
CONFIG_WL1251_SDIO=m
@@ -3010,19 +3109,14 @@ CONFIG_WLCORE=m
# CONFIG_WLCORE_SPI is not set
CONFIG_WLCORE_SDIO=m
CONFIG_WILINK_PLATFORM_DATA=y
+CONFIG_WLAN_VENDOR_ZYDAS=y
+CONFIG_USB_ZD1201=m
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
-CONFIG_MWIFIEX=m
-CONFIG_MWIFIEX_SDIO=m
-CONFIG_MWIFIEX_PCIE=m
-CONFIG_MWIFIEX_USB=m
-CONFIG_CW1200=m
-CONFIG_CW1200_WLAN_SDIO=m
-CONFIG_CW1200_WLAN_SPI=m
-CONFIG_RSI_91X=m
-# CONFIG_RSI_DEBUGFS is not set
-CONFIG_RSI_SDIO=m
-CONFIG_RSI_USB=m
+CONFIG_PCMCIA_RAYCS=m
+CONFIG_PCMCIA_WL3501=m
+# CONFIG_MAC80211_HWSIM is not set
+CONFIG_USB_NET_RNDIS_WLAN=m
#
# WiMAX Wireless Broadband devices
@@ -3038,6 +3132,7 @@ CONFIG_IEEE802154_AT86RF230=m
# CONFIG_IEEE802154_MRF24J40 is not set
# CONFIG_IEEE802154_CC2520 is not set
CONFIG_IEEE802154_ATUSB=m
+# CONFIG_IEEE802154_ADF7242 is not set
CONFIG_VMXNET3=m
CONFIG_FUJITSU_ES=m
CONFIG_HYPERV_NET=m
@@ -3125,14 +3220,6 @@ CONFIG_HISAX_ST5481=m
CONFIG_HISAX_HFCUSB=m
CONFIG_HISAX_HFC4S8S=m
CONFIG_HISAX_FRITZ_PCIPNP=m
-
-#
-# Active cards
-#
-CONFIG_ISDN_DRV_ICN=m
-CONFIG_ISDN_DRV_PCBIT=m
-CONFIG_ISDN_DRV_SC=m
-CONFIG_ISDN_DRV_ACT2000=m
CONFIG_ISDN_CAPI=m
CONFIG_CAPI_TRACE=y
CONFIG_ISDN_CAPI_CAPI20=m
@@ -3214,13 +3301,14 @@ CONFIG_INPUT_EVDEV=m
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADC is not set
CONFIG_KEYBOARD_ADP5588=m
CONFIG_KEYBOARD_ADP5589=m
CONFIG_KEYBOARD_ATKBD=m
CONFIG_KEYBOARD_QT1070=m
CONFIG_KEYBOARD_QT2160=m
# CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_GPIO is not set
+CONFIG_KEYBOARD_GPIO=m
# CONFIG_KEYBOARD_GPIO_POLLED is not set
CONFIG_KEYBOARD_TCA6416=m
CONFIG_KEYBOARD_TCA8418=m
@@ -3243,6 +3331,7 @@ CONFIG_KEYBOARD_MPR121=m
CONFIG_INPUT_MOUSE=y
CONFIG_MOUSE_PS2=m
CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_BYD=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
CONFIG_MOUSE_PS2_CYPRESS=y
@@ -3306,6 +3395,7 @@ CONFIG_TABLET_USB_AIPTEK=m
CONFIG_TABLET_USB_GTCO=m
CONFIG_TABLET_USB_HANWANG=m
CONFIG_TABLET_USB_KBTAB=m
+CONFIG_TABLET_USB_PEGASUS=m
CONFIG_TABLET_SERIAL_WACOM4=m
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_PROPERTIES=y
@@ -3316,6 +3406,7 @@ CONFIG_TOUCHSCREEN_AD7879_I2C=m
# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
# CONFIG_TOUCHSCREEN_AR1021_I2C is not set
CONFIG_TOUCHSCREEN_ATMEL_MXT=m
+CONFIG_TOUCHSCREEN_ATMEL_MXT_T37=y
CONFIG_TOUCHSCREEN_AUO_PIXCIR=m
CONFIG_TOUCHSCREEN_BU21013=m
# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
@@ -3330,11 +3421,12 @@ CONFIG_TOUCHSCREEN_DYNAPRO=m
CONFIG_TOUCHSCREEN_HAMPSHIRE=m
CONFIG_TOUCHSCREEN_EETI=m
CONFIG_TOUCHSCREEN_EGALAX=m
-CONFIG_TOUCHSCREEN_FT6236=m
+CONFIG_TOUCHSCREEN_EGALAX_SERIAL=m
CONFIG_TOUCHSCREEN_FUJITSU=m
CONFIG_TOUCHSCREEN_GOODIX=m
CONFIG_TOUCHSCREEN_ILI210X=m
CONFIG_TOUCHSCREEN_GUNZE=m
+CONFIG_TOUCHSCREEN_EKTF2127=m
CONFIG_TOUCHSCREEN_ELAN=m
CONFIG_TOUCHSCREEN_ELO=m
CONFIG_TOUCHSCREEN_WACOM_W8001=m
@@ -3342,6 +3434,7 @@ CONFIG_TOUCHSCREEN_WACOM_I2C=m
CONFIG_TOUCHSCREEN_MAX11801=m
CONFIG_TOUCHSCREEN_MCS5000=m
CONFIG_TOUCHSCREEN_MMS114=m
+CONFIG_TOUCHSCREEN_MELFAS_MIP4=m
CONFIG_TOUCHSCREEN_MTOUCH=m
CONFIG_TOUCHSCREEN_IMX6UL_TSC=m
CONFIG_TOUCHSCREEN_INEXIO=m
@@ -3385,8 +3478,12 @@ CONFIG_TOUCHSCREEN_TSC200X_CORE=m
CONFIG_TOUCHSCREEN_TSC2004=m
# CONFIG_TOUCHSCREEN_TSC2005 is not set
CONFIG_TOUCHSCREEN_TSC2007=m
+CONFIG_TOUCHSCREEN_RM_TS=m
+CONFIG_TOUCHSCREEN_SILEAD=m
+CONFIG_TOUCHSCREEN_SIS_I2C=m
CONFIG_TOUCHSCREEN_ST1232=m
CONFIG_TOUCHSCREEN_SUR40=m
+CONFIG_TOUCHSCREEN_SURFACE3_SPI=m
# CONFIG_TOUCHSCREEN_SX8654 is not set
CONFIG_TOUCHSCREEN_TPS6507X=m
CONFIG_TOUCHSCREEN_ZFORCE=m
@@ -3396,6 +3493,7 @@ CONFIG_INPUT_AD714X=m
CONFIG_INPUT_AD714X_I2C=m
CONFIG_INPUT_AD714X_SPI=m
# CONFIG_INPUT_ARIZONA_HAPTICS is not set
+# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
CONFIG_INPUT_BMA150=m
CONFIG_INPUT_E3X0_BUTTON=m
CONFIG_INPUT_PCSPKR=m
@@ -3406,6 +3504,7 @@ CONFIG_INPUT_APANEL=m
CONFIG_INPUT_GP2A=m
CONFIG_INPUT_GPIO_BEEPER=m
# CONFIG_INPUT_GPIO_TILT_POLLED is not set
+# CONFIG_INPUT_GPIO_DECODER is not set
CONFIG_INPUT_WISTRON_BTNS=m
CONFIG_INPUT_ATLAS_BTNS=m
CONFIG_INPUT_ATI_REMOTE2=m
@@ -3429,9 +3528,18 @@ CONFIG_INPUT_ADXL34X_SPI=m
CONFIG_INPUT_CMA3000=m
CONFIG_INPUT_CMA3000_I2C=m
CONFIG_INPUT_IDEAPAD_SLIDEBAR=m
+CONFIG_INPUT_SOC_BUTTON_ARRAY=m
# CONFIG_INPUT_DRV260X_HAPTICS is not set
# CONFIG_INPUT_DRV2665_HAPTICS is not set
# CONFIG_INPUT_DRV2667_HAPTICS is not set
+CONFIG_RMI4_CORE=m
+CONFIG_RMI4_I2C=m
+CONFIG_RMI4_SPI=m
+CONFIG_RMI4_2D_SENSOR=y
+CONFIG_RMI4_F11=y
+CONFIG_RMI4_F12=y
+CONFIG_RMI4_F30=y
+CONFIG_RMI4_F54=y
#
# Hardware I/O ports
@@ -3469,7 +3577,6 @@ CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_UNIX98_PTYS=y
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_NONSTANDARD=y
CONFIG_ROCKETPORT=m
@@ -3496,18 +3603,30 @@ CONFIG_SERIAL_EARLYCON=y
CONFIG_SERIAL_8250=y
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
CONFIG_SERIAL_8250_PNP=y
+# CONFIG_SERIAL_8250_FINTEK is not set
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_DMA=y
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_CS=m
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+# CONFIG_SERIAL_8250_FOURPORT is not set
+# CONFIG_SERIAL_8250_ACCENT is not set
+# CONFIG_SERIAL_8250_BOCA is not set
+# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set
+# CONFIG_SERIAL_8250_HUB6 is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+CONFIG_SERIAL_8250_RSA=y
# CONFIG_SERIAL_8250_FSL is not set
CONFIG_SERIAL_8250_DW=m
CONFIG_SERIAL_8250_RT288X=y
-# CONFIG_SERIAL_8250_FINTEK is not set
+CONFIG_SERIAL_8250_LPSS=y
CONFIG_SERIAL_8250_MID=y
+CONFIG_SERIAL_8250_MOXA=m
+CONFIG_SERIAL_OF_PLATFORM=m
#
# Non-8250 serial port support
@@ -3518,7 +3637,6 @@ CONFIG_SERIAL_8250_MID=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_SERIAL_JSM=m
-CONFIG_SERIAL_OF_PLATFORM=m
CONFIG_SERIAL_SCCNXP=m
CONFIG_SERIAL_SC16IS7XX_CORE=m
CONFIG_SERIAL_SC16IS7XX=m
@@ -3547,7 +3665,6 @@ CONFIG_IPMI_HANDLER=m
# CONFIG_IPMI_PANIC_EVENT is not set
CONFIG_IPMI_DEVICE_INTERFACE=m
CONFIG_IPMI_SI=m
-# CONFIG_IPMI_SI_PROBE_DEFAULTS is not set
CONFIG_IPMI_SSIF=m
CONFIG_IPMI_WATCHDOG=m
CONFIG_IPMI_POWEROFF=m
@@ -3582,7 +3699,9 @@ CONFIG_HPET_MMAP=y
CONFIG_HPET_MMAP_DEFAULT=y
CONFIG_HANGCHECK_TIMER=m
CONFIG_TCG_TPM=m
+CONFIG_TCG_TIS_CORE=m
CONFIG_TCG_TIS=m
+# CONFIG_TCG_TIS_SPI is not set
CONFIG_TCG_TIS_I2C_ATMEL=m
CONFIG_TCG_TIS_I2C_INFINEON=m
CONFIG_TCG_TIS_I2C_NUVOTON=m
@@ -3590,7 +3709,9 @@ CONFIG_TCG_NSC=m
CONFIG_TCG_ATMEL=m
CONFIG_TCG_INFINEON=m
CONFIG_TCG_CRB=m
-# CONFIG_TCG_TIS_ST33ZP24 is not set
+# CONFIG_TCG_VTPM_PROXY is not set
+# CONFIG_TCG_TIS_ST33ZP24_I2C is not set
+# CONFIG_TCG_TIS_ST33ZP24_SPI is not set
CONFIG_TELCLOCK=m
CONFIG_DEVPORT=y
# CONFIG_XILLYBUS is not set
@@ -3614,6 +3735,7 @@ CONFIG_I2C_MUX_PCA9541=m
CONFIG_I2C_MUX_PCA954x=m
# CONFIG_I2C_MUX_PINCTRL is not set
# CONFIG_I2C_MUX_REG is not set
+# CONFIG_I2C_DEMUX_PINCTRL is not set
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_SMBUS=m
CONFIG_I2C_ALGOBIT=m
@@ -3656,6 +3778,7 @@ CONFIG_I2C_SCMI=m
CONFIG_I2C_DESIGNWARE_CORE=m
CONFIG_I2C_DESIGNWARE_PLATFORM=m
CONFIG_I2C_DESIGNWARE_PCI=m
+CONFIG_I2C_DESIGNWARE_BAYTRAIL=y
CONFIG_I2C_EG20T=m
# CONFIG_I2C_EMEV2 is not set
# CONFIG_I2C_GPIO is not set
@@ -3698,30 +3821,32 @@ CONFIG_SPI_MASTER=y
# SPI Master Controller Drivers
#
CONFIG_SPI_ALTERA=m
+# CONFIG_SPI_AXI_SPI_ENGINE is not set
CONFIG_SPI_BITBANG=m
CONFIG_SPI_BUTTERFLY=m
# CONFIG_SPI_CADENCE is not set
+CONFIG_SPI_DESIGNWARE=m
+CONFIG_SPI_DW_PCI=m
+# CONFIG_SPI_DW_MID_DMA is not set
+CONFIG_SPI_DW_MMIO=m
CONFIG_SPI_GPIO=m
CONFIG_SPI_LM70_LLP=m
# CONFIG_SPI_FSL_SPI is not set
CONFIG_SPI_OC_TINY=m
-CONFIG_SPI_PXA2XX_DMA=y
CONFIG_SPI_PXA2XX=m
CONFIG_SPI_PXA2XX_PCI=m
+CONFIG_SPI_ROCKCHIP=m
CONFIG_SPI_SC18IS602=m
CONFIG_SPI_TOPCLIFF_PCH=m
CONFIG_SPI_XCOMM=m
CONFIG_SPI_XILINX=m
CONFIG_SPI_ZYNQMP_GQSPI=m
-CONFIG_SPI_DESIGNWARE=m
-CONFIG_SPI_DW_PCI=m
-# CONFIG_SPI_DW_MID_DMA is not set
-CONFIG_SPI_DW_MMIO=m
#
# SPI Protocol Masters
#
CONFIG_SPI_SPIDEV=m
+# CONFIG_SPI_LOOPBACK_TEST is not set
CONFIG_SPI_TLE62X0=m
CONFIG_SPMI=m
# CONFIG_HSI is not set
@@ -3762,13 +3887,11 @@ CONFIG_GENERIC_PINCONF=y
# CONFIG_PINCTRL_AMD is not set
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PINCTRL_BAYTRAIL=y
-CONFIG_PINCTRL_CHERRYVIEW=m
-CONFIG_PINCTRL_INTEL=m
-CONFIG_PINCTRL_BROXTON=m
-CONFIG_PINCTRL_SUNRISEPOINT=m
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_PINCTRL_CHERRYVIEW=y
+CONFIG_PINCTRL_INTEL=y
+CONFIG_PINCTRL_BROXTON=y
+CONFIG_PINCTRL_SUNRISEPOINT=y
CONFIG_GPIOLIB=y
-CONFIG_GPIO_DEVRES=y
CONFIG_OF_GPIO=y
CONFIG_GPIO_ACPI=y
CONFIG_GPIOLIB_IRQCHIP=y
@@ -3785,7 +3908,8 @@ CONFIG_GPIO_SYSFS=y
# CONFIG_GPIO_GENERIC_PLATFORM is not set
# CONFIG_GPIO_GRGPIO is not set
CONFIG_GPIO_ICH=m
-CONFIG_GPIO_LYNXPOINT=m
+CONFIG_GPIO_LYNXPOINT=y
+# CONFIG_GPIO_MOCKUP is not set
# CONFIG_GPIO_SYSCON is not set
# CONFIG_GPIO_VX855 is not set
# CONFIG_GPIO_XILINX is not set
@@ -3794,11 +3918,15 @@ CONFIG_GPIO_LYNXPOINT=m
#
# Port-mapped I/O GPIO drivers
#
+# CONFIG_GPIO_104_DIO_48E is not set
# CONFIG_GPIO_104_IDIO_16 is not set
+# CONFIG_GPIO_104_IDI_48 is not set
# CONFIG_GPIO_F7188X is not set
+# CONFIG_GPIO_GPIO_MM is not set
# CONFIG_GPIO_IT87 is not set
CONFIG_GPIO_SCH=m
CONFIG_GPIO_SCH311X=m
+# CONFIG_GPIO_WS16C48 is not set
#
# I2C GPIO expanders
@@ -3810,6 +3938,8 @@ CONFIG_GPIO_SCH311X=m
# CONFIG_GPIO_PCA953X is not set
# CONFIG_GPIO_PCF857X is not set
# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_TPIC2810 is not set
+# CONFIG_GPIO_TS4900 is not set
#
# MFD GPIO expanders
@@ -3818,13 +3948,14 @@ CONFIG_GPIO_SCH311X=m
CONFIG_GPIO_CRYSTAL_COVE=y
CONFIG_GPIO_CS5535=y
# CONFIG_GPIO_LP3943 is not set
+# CONFIG_GPIO_TPS65218 is not set
# CONFIG_GPIO_UCB1400 is not set
+CONFIG_GPIO_WHISKEY_COVE=y
#
# PCI GPIO expanders
#
CONFIG_GPIO_AMD8111=m
-# CONFIG_GPIO_INTEL_MID is not set
# CONFIG_GPIO_ML_IOH is not set
# CONFIG_GPIO_PCH is not set
# CONFIG_GPIO_RDC321X is not set
@@ -3836,6 +3967,7 @@ CONFIG_GPIO_AMD8111=m
# CONFIG_GPIO_74X164 is not set
# CONFIG_GPIO_MAX7301 is not set
# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_PISOSR is not set
#
# SPI or I2C GPIO expanders
@@ -3847,6 +3979,16 @@ CONFIG_GPIO_AMD8111=m
#
CONFIG_GPIO_VIPERBOARD=m
# CONFIG_W1 is not set
+CONFIG_POWER_AVS=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_GPIO=y
+# CONFIG_POWER_RESET_GPIO_RESTART is not set
+# CONFIG_POWER_RESET_LTC2952 is not set
+# CONFIG_POWER_RESET_RESTART is not set
+# CONFIG_POWER_RESET_SYSCON is not set
+# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
+CONFIG_REBOOT_MODE=m
+CONFIG_SYSCON_REBOOT_MODE=m
CONFIG_POWER_SUPPLY=y
# CONFIG_POWER_SUPPLY_DEBUG is not set
CONFIG_PDA_POWER=m
@@ -3875,14 +4017,6 @@ CONFIG_CHARGER_BQ24735=m
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
# CONFIG_BATTERY_RT5033 is not set
# CONFIG_CHARGER_RT9455 is not set
-CONFIG_POWER_RESET=y
-CONFIG_POWER_RESET_GPIO=y
-# CONFIG_POWER_RESET_GPIO_RESTART is not set
-# CONFIG_POWER_RESET_LTC2952 is not set
-# CONFIG_POWER_RESET_RESTART is not set
-# CONFIG_POWER_RESET_SYSCON is not set
-# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
-CONFIG_POWER_AVS=y
CONFIG_HWMON=y
CONFIG_HWMON_VID=m
# CONFIG_HWMON_DEBUG_CHIP is not set
@@ -3924,6 +4058,7 @@ CONFIG_SENSORS_F71882FG=m
CONFIG_SENSORS_F75375S=m
CONFIG_SENSORS_MC13783_ADC=m
CONFIG_SENSORS_FSCHMD=m
+CONFIG_SENSORS_FTSTEUTATES=m
CONFIG_SENSORS_GL518SM=m
CONFIG_SENSORS_GL520SM=m
CONFIG_SENSORS_G760A=m
@@ -3940,6 +4075,7 @@ CONFIG_SENSORS_JC42=m
CONFIG_SENSORS_POWR1220=m
CONFIG_SENSORS_LINEAGE=m
CONFIG_SENSORS_LTC2945=m
+CONFIG_SENSORS_LTC2990=m
CONFIG_SENSORS_LTC4151=m
CONFIG_SENSORS_LTC4215=m
CONFIG_SENSORS_LTC4222=m
@@ -3951,12 +4087,12 @@ CONFIG_SENSORS_MAX16065=m
CONFIG_SENSORS_MAX1619=m
CONFIG_SENSORS_MAX1668=m
CONFIG_SENSORS_MAX197=m
+CONFIG_SENSORS_MAX31722=m
CONFIG_SENSORS_MAX6639=m
CONFIG_SENSORS_MAX6642=m
CONFIG_SENSORS_MAX6650=m
CONFIG_SENSORS_MAX6697=m
CONFIG_SENSORS_MAX31790=m
-CONFIG_SENSORS_HTU21=m
CONFIG_SENSORS_MCP3021=m
CONFIG_SENSORS_ADCXX=m
CONFIG_SENSORS_LM63=m
@@ -3988,6 +4124,7 @@ CONFIG_SENSORS_PMBUS=m
CONFIG_SENSORS_ADM1275=m
CONFIG_SENSORS_LM25066=m
CONFIG_SENSORS_LTC2978=m
+CONFIG_SENSORS_LTC3815=m
CONFIG_SENSORS_MAX16064=m
CONFIG_SENSORS_MAX20751=m
CONFIG_SENSORS_MAX34440=m
@@ -3999,6 +4136,7 @@ CONFIG_SENSORS_ZL6100=m
CONFIG_SENSORS_PWM_FAN=m
CONFIG_SENSORS_SHT15=m
CONFIG_SENSORS_SHT21=m
+CONFIG_SENSORS_SHT3x=m
CONFIG_SENSORS_SHTC1=m
CONFIG_SENSORS_SIS5595=m
CONFIG_SENSORS_DME1737=m
@@ -4019,6 +4157,7 @@ CONFIG_SENSORS_ADS7871=m
CONFIG_SENSORS_AMC6821=m
CONFIG_SENSORS_INA209=m
CONFIG_SENSORS_INA2XX=m
+CONFIG_SENSORS_INA3221=m
CONFIG_SENSORS_TC74=m
CONFIG_SENSORS_THMC50=m
CONFIG_SENSORS_TMP102=m
@@ -4060,24 +4199,35 @@ CONFIG_THERMAL_GOV_USER_SPACE=y
# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set
# CONFIG_CPU_THERMAL is not set
# CONFIG_THERMAL_EMULATION is not set
+# CONFIG_QORIQ_THERMAL is not set
CONFIG_INTEL_POWERCLAMP=m
CONFIG_X86_PKG_TEMP_THERMAL=m
CONFIG_INTEL_SOC_DTS_IOSF_CORE=m
CONFIG_INTEL_SOC_DTS_THERMAL=m
+
+#
+# ACPI INT340X thermal drivers
+#
CONFIG_INT340X_THERMAL=m
CONFIG_ACPI_THERMAL_REL=m
+CONFIG_INT3406_THERMAL=m
+CONFIG_INTEL_BXT_PMIC_THERMAL=m
CONFIG_INTEL_PCH_THERMAL=m
CONFIG_QCOM_SPMI_TEMP_ALARM=m
+CONFIG_GENERIC_ADC_THERMAL=m
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
+CONFIG_WATCHDOG_SYSFS=y
#
# Watchdog Device Drivers
#
CONFIG_SOFT_WATCHDOG=m
CONFIG_GPIO_WATCHDOG=m
+CONFIG_WDAT_WDT=m
CONFIG_XILINX_WATCHDOG=m
+CONFIG_ZIIRAVE_WATCHDOG=m
# CONFIG_CADENCE_WATCHDOG is not set
CONFIG_DW_WATCHDOG=m
# CONFIG_RN5T618_WATCHDOG is not set
@@ -4087,6 +4237,7 @@ CONFIG_ACQUIRE_WDT=m
CONFIG_ADVANTECH_WDT=m
CONFIG_ALIM1535_WDT=m
CONFIG_ALIM7101_WDT=m
+CONFIG_EBC_C384_WDT=m
CONFIG_F71808E_WDT=m
CONFIG_SP5100_TCO=m
CONFIG_GEODE_WDT=m
@@ -4118,7 +4269,8 @@ CONFIG_W83877F_WDT=m
CONFIG_W83977F_WDT=m
CONFIG_MACHZ_WDT=m
CONFIG_SBC_EPX_C3_WATCHDOG=m
-CONFIG_BCM7038_WDT=m
+CONFIG_INTEL_MEI_WDT=m
+CONFIG_NI903X_WDT=m
CONFIG_MEN_A21_WDT=m
#
@@ -4138,6 +4290,15 @@ CONFIG_WDTPCI=m
# USB-based Watchdog Cards
#
CONFIG_USBPCWATCHDOG=m
+
+#
+# Watchdog Pretimeout Governors
+#
+CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
+# CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP is not set
+CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
+CONFIG_WATCHDOG_PRETIMEOUT_GOV_NOOP=m
+CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
CONFIG_SSB_POSSIBLE=y
#
@@ -4153,7 +4314,6 @@ CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
CONFIG_SSB_PCMCIAHOST=y
CONFIG_SSB_SDIOHOST_POSSIBLE=y
CONFIG_SSB_SDIOHOST=y
-CONFIG_SSB_HOST_SOC=y
# CONFIG_SSB_DEBUG is not set
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_DRIVER_PCICORE=y
@@ -4178,6 +4338,7 @@ CONFIG_BCMA_DRIVER_GPIO=y
#
CONFIG_MFD_CORE=y
CONFIG_MFD_CS5535=m
+# CONFIG_MFD_ACT8945A is not set
# CONFIG_MFD_AS3711 is not set
# CONFIG_MFD_AS3722 is not set
# CONFIG_PMIC_ADP5520 is not set
@@ -4185,7 +4346,7 @@ CONFIG_MFD_CS5535=m
# CONFIG_MFD_ATMEL_FLEXCOM is not set
# CONFIG_MFD_ATMEL_HLCDC is not set
CONFIG_MFD_BCM590XX=m
-# CONFIG_MFD_AXP20X is not set
+# CONFIG_MFD_AXP20X_I2C is not set
CONFIG_MFD_CROS_EC=m
CONFIG_MFD_CROS_EC_I2C=m
CONFIG_MFD_CROS_EC_SPI=m
@@ -4197,6 +4358,7 @@ CONFIG_MFD_CROS_EC_SPI=m
# CONFIG_MFD_DA9063 is not set
# CONFIG_MFD_DA9150 is not set
# CONFIG_MFD_DLN2 is not set
+# CONFIG_MFD_EXYNOS_LPASS is not set
CONFIG_MFD_MC13XXX=m
# CONFIG_MFD_MC13XXX_SPI is not set
CONFIG_MFD_MC13XXX_I2C=m
@@ -4216,6 +4378,7 @@ CONFIG_MFD_INTEL_LPSS_PCI=m
# CONFIG_MFD_88PM805 is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_MFD_MAX14577 is not set
+# CONFIG_MFD_MAX77620 is not set
# CONFIG_MFD_MAX77686 is not set
# CONFIG_MFD_MAX77693 is not set
# CONFIG_MFD_MAX77843 is not set
@@ -4256,12 +4419,13 @@ CONFIG_MFD_LP3943=m
# CONFIG_TPS6105X is not set
CONFIG_TPS65010=m
CONFIG_TPS6507X=m
+# CONFIG_MFD_TPS65086 is not set
# CONFIG_MFD_TPS65090 is not set
CONFIG_MFD_TPS65217=m
+# CONFIG_MFD_TI_LP873X is not set
CONFIG_MFD_TPS65218=m
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65910 is not set
-# CONFIG_MFD_TPS65912 is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS65912_SPI is not set
# CONFIG_MFD_TPS80031 is not set
@@ -4276,6 +4440,7 @@ CONFIG_MFD_VX855=m
CONFIG_MFD_ARIZONA=y
CONFIG_MFD_ARIZONA_I2C=m
# CONFIG_MFD_ARIZONA_SPI is not set
+# CONFIG_MFD_CS47L24 is not set
CONFIG_MFD_WM5102=y
CONFIG_MFD_WM5110=y
# CONFIG_MFD_WM8997 is not set
@@ -4297,12 +4462,15 @@ CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
CONFIG_MEDIA_RADIO_SUPPORT=y
CONFIG_MEDIA_SDR_SUPPORT=y
CONFIG_MEDIA_RC_SUPPORT=y
+CONFIG_MEDIA_CEC_EDID=y
CONFIG_MEDIA_CONTROLLER=y
+# CONFIG_MEDIA_CONTROLLER_DVB is not set
CONFIG_VIDEO_DEV=m
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_VIDEO_V4L2=m
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_PCI_SKELETON is not set
CONFIG_VIDEO_TUNER=m
CONFIG_V4L2_MEM2MEM_DEV=m
# CONFIG_V4L2_FLASH_LED_CLASS is not set
@@ -4458,6 +4626,7 @@ CONFIG_VIDEO_TM6000_DVB=m
#
CONFIG_DVB_USB=m
# CONFIG_DVB_USB_DEBUG is not set
+CONFIG_DVB_USB_DIB3000MC=m
CONFIG_DVB_USB_A800=m
CONFIG_DVB_USB_DIBUSB_MB=m
CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y
@@ -4525,7 +4694,9 @@ CONFIG_MEDIA_PCI_SUPPORT=y
#
CONFIG_VIDEO_MEYE=m
CONFIG_VIDEO_SOLO6X10=m
+CONFIG_VIDEO_TW5864=m
CONFIG_VIDEO_TW68=m
+CONFIG_VIDEO_TW686X=m
CONFIG_VIDEO_ZORAN=m
CONFIG_VIDEO_ZORAN_DC30=m
CONFIG_VIDEO_ZORAN_ZR36060=m
@@ -4659,7 +4830,7 @@ CONFIG_SMS_SIANO_RC=y
# CONFIG_SMS_SIANO_DEBUGFS is not set
#
-# Media ancillary drivers (tuners, sensors, i2c, frontends)
+# Media ancillary drivers (tuners, sensors, i2c, spi, frontends)
#
CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
CONFIG_MEDIA_ATTACH=y
@@ -4674,6 +4845,7 @@ CONFIG_VIDEO_TDA9840=m
CONFIG_VIDEO_TEA6415C=m
CONFIG_VIDEO_TEA6420=m
CONFIG_VIDEO_MSP3400=m
+CONFIG_VIDEO_CS3308=m
CONFIG_VIDEO_CS5345=m
CONFIG_VIDEO_CS53L32A=m
CONFIG_VIDEO_UDA1342=m
@@ -4800,6 +4972,8 @@ CONFIG_DVB_M88DS3103=m
CONFIG_DVB_DRXK=m
CONFIG_DVB_TDA18271C2DD=m
CONFIG_DVB_SI2165=m
+CONFIG_DVB_MN88472=m
+CONFIG_DVB_MN88473=m
#
# DVB-S (satellite) frontends
@@ -4860,6 +5034,7 @@ CONFIG_DVB_RTL2832=m
CONFIG_DVB_RTL2832_SDR=m
CONFIG_DVB_SI2168=m
CONFIG_DVB_AS102_FE=m
+CONFIG_DVB_GP8PSK_FE=m
#
# DVB-C (cable) frontends
@@ -4925,6 +5100,7 @@ CONFIG_DVB_M88RS2000=m
CONFIG_DVB_AF9033=m
CONFIG_DVB_HORUS3A=m
CONFIG_DVB_ASCOT2E=m
+CONFIG_DVB_HELENE=m
#
# Tools to develop new frontends
@@ -4951,6 +5127,7 @@ CONFIG_VGA_ARB_MAX_GPUS=16
CONFIG_VGA_SWITCHEROO=y
CONFIG_DRM=m
CONFIG_DRM_MIPI_DSI=y
+CONFIG_DRM_DP_AUX_CHARDEV=y
CONFIG_DRM_KMS_HELPER=m
CONFIG_DRM_KMS_FB_HELPER=y
CONFIG_DRM_FBDEV_EMULATION=y
@@ -4960,29 +5137,29 @@ CONFIG_DRM_TTM=m
#
# I2C encoder or helper chips
#
-CONFIG_DRM_I2C_ADV7511=m
CONFIG_DRM_I2C_CH7006=m
CONFIG_DRM_I2C_SIL164=m
CONFIG_DRM_I2C_NXP_TDA998X=m
-CONFIG_DRM_TDFX=m
-CONFIG_DRM_R128=m
CONFIG_DRM_RADEON=m
-# CONFIG_DRM_RADEON_USERPTR is not set
-# CONFIG_DRM_RADEON_UMS is not set
+CONFIG_DRM_RADEON_USERPTR=y
CONFIG_DRM_AMDGPU=m
-# CONFIG_DRM_AMDGPU_CIK is not set
+CONFIG_DRM_AMDGPU_SI=y
+CONFIG_DRM_AMDGPU_CIK=y
CONFIG_DRM_AMDGPU_USERPTR=y
+# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set
+
+#
+# ACP (Audio CoProcessor) Configuration
+#
+CONFIG_DRM_AMD_ACP=y
CONFIG_DRM_NOUVEAU=m
CONFIG_NOUVEAU_DEBUG=5
CONFIG_NOUVEAU_DEBUG_DEFAULT=3
CONFIG_DRM_NOUVEAU_BACKLIGHT=y
-# CONFIG_DRM_I810 is not set
CONFIG_DRM_I915=m
# CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT is not set
-CONFIG_DRM_MGA=m
-CONFIG_DRM_SIS=m
-CONFIG_DRM_VIA=m
-CONFIG_DRM_SAVAGE=m
+CONFIG_DRM_I915_USERPTR=y
+CONFIG_DRM_I915_GVT=y
CONFIG_DRM_VGEM=m
CONFIG_DRM_VMWGFX=m
CONFIG_DRM_VMWGFX_FBCON=y
@@ -5002,17 +5179,28 @@ CONFIG_DRM_PANEL=y
# Display Panels
#
# CONFIG_DRM_PANEL_SIMPLE is not set
+# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
# CONFIG_DRM_PANEL_LG_LG4573 is not set
+# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
+# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
CONFIG_DRM_BRIDGE=y
#
# Display Interface Bridges
#
+CONFIG_DRM_ANALOGIX_ANX78XX=m
+# CONFIG_DRM_DUMB_VGA_DAC is not set
# CONFIG_DRM_NXP_PTN3460 is not set
# CONFIG_DRM_PARADE_PS8622 is not set
+# CONFIG_DRM_SII902X is not set
+# CONFIG_DRM_TOSHIBA_TC358767 is not set
+CONFIG_DRM_I2C_ADV7511=m
+# CONFIG_DRM_I2C_ADV7533 is not set
+# CONFIG_DRM_ARCPGU is not set
+# CONFIG_DRM_LEGACY is not set
#
# Frame buffer Devices
@@ -5020,6 +5208,7 @@ CONFIG_DRM_BRIDGE=y
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
CONFIG_FB_CMDLINE=y
+CONFIG_FB_NOTIFY=y
CONFIG_FB_DDC=m
CONFIG_FB_BOOT_VESA_SUPPORT=y
CONFIG_FB_CFB_FILLRECT=y
@@ -5151,11 +5340,14 @@ CONFIG_SOUND_OSS_CORE=y
CONFIG_SND=m
CONFIG_SND_TIMER=m
CONFIG_SND_PCM=m
+CONFIG_SND_PCM_ELD=y
+CONFIG_SND_PCM_IEC958=y
CONFIG_SND_DMAENGINE_PCM=m
CONFIG_SND_HWDEP=m
CONFIG_SND_RAWMIDI=m
CONFIG_SND_COMPRESS_OFFLOAD=m
CONFIG_SND_JACK=y
+CONFIG_SND_JACK_INPUT_DEV=y
CONFIG_SND_SEQUENCER=m
CONFIG_SND_SEQ_DUMMY=m
CONFIG_SND_OSSEMUL=y
@@ -5361,7 +5553,6 @@ CONFIG_SND_FIREWIRE_LIB=m
CONFIG_SND_DICE=m
CONFIG_SND_OXFW=m
CONFIG_SND_ISIGHT=m
-CONFIG_SND_SCS1X=m
CONFIG_SND_FIREWORKS=m
CONFIG_SND_BEBOB=m
CONFIG_SND_FIREWIRE_DIGI00X=m
@@ -5374,8 +5565,10 @@ CONFIG_SND_SOC_AC97_BUS=y
CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
CONFIG_SND_SOC_COMPRESS=y
CONFIG_SND_SOC_TOPOLOGY=y
+CONFIG_SND_SOC_AMD_ACP=m
# CONFIG_SND_ATMEL_SOC is not set
CONFIG_SND_DESIGNWARE_I2S=m
+CONFIG_SND_DESIGNWARE_PCM=m
#
# SoC Audio for Freescale CPUs
@@ -5390,28 +5583,29 @@ CONFIG_SND_DESIGNWARE_I2S=m
# CONFIG_SND_SOC_FSL_SPDIF is not set
# CONFIG_SND_SOC_FSL_ESAI is not set
# CONFIG_SND_SOC_IMX_AUDMUX is not set
+# CONFIG_SND_SOC_IMG is not set
CONFIG_SND_SST_MFLD_PLATFORM=m
CONFIG_SND_SST_IPC=m
CONFIG_SND_SST_IPC_ACPI=m
CONFIG_SND_SOC_INTEL_SST=m
+CONFIG_SND_SOC_INTEL_SST_FIRMWARE=m
CONFIG_SND_SOC_INTEL_SST_ACPI=m
+CONFIG_SND_SOC_INTEL_SST_MATCH=m
CONFIG_SND_SOC_INTEL_HASWELL=m
-CONFIG_SND_SOC_INTEL_BAYTRAIL=m
CONFIG_SND_SOC_INTEL_HASWELL_MACH=m
-CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH=m
-CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH=m
+CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH=m
+CONFIG_SND_SOC_INTEL_BXT_RT298_MACH=m
+CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH=m
CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m
CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m
+CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m
CONFIG_SND_SOC_INTEL_SKYLAKE=m
CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m
-
-#
-# Allwinner SoC Audio support
-#
-# CONFIG_SND_SUN4I_CODEC is not set
+CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m
+CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m
# CONFIG_SND_SOC_XTFPGA_I2S is not set
CONFIG_SND_SOC_I2C_AND_SPI=m
@@ -5420,13 +5614,16 @@ CONFIG_SND_SOC_I2C_AND_SPI=m
#
CONFIG_SND_SOC_AC97_CODEC=m
# CONFIG_SND_SOC_ADAU1701 is not set
+# CONFIG_SND_SOC_ADAU7002 is not set
# CONFIG_SND_SOC_AK4104 is not set
# CONFIG_SND_SOC_AK4554 is not set
# CONFIG_SND_SOC_AK4613 is not set
# CONFIG_SND_SOC_AK4642 is not set
# CONFIG_SND_SOC_AK5386 is not set
# CONFIG_SND_SOC_ALC5623 is not set
+# CONFIG_SND_SOC_BT_SCO is not set
# CONFIG_SND_SOC_CS35L32 is not set
+# CONFIG_SND_SOC_CS35L33 is not set
# CONFIG_SND_SOC_CS42L51_I2C is not set
# CONFIG_SND_SOC_CS42L52 is not set
# CONFIG_SND_SOC_CS42L56 is not set
@@ -5437,35 +5634,52 @@ CONFIG_SND_SOC_AC97_CODEC=m
# CONFIG_SND_SOC_CS4271_SPI is not set
# CONFIG_SND_SOC_CS42XX8_I2C is not set
# CONFIG_SND_SOC_CS4349 is not set
+# CONFIG_SND_SOC_CS53L30 is not set
+CONFIG_SND_SOC_DA7219=m
CONFIG_SND_SOC_DMIC=m
+CONFIG_SND_SOC_HDMI_CODEC=m
# CONFIG_SND_SOC_ES8328 is not set
# CONFIG_SND_SOC_GTM601 is not set
+CONFIG_SND_SOC_HDAC_HDMI=m
+# CONFIG_SND_SOC_INNO_RK3036 is not set
CONFIG_SND_SOC_MAX98090=m
+CONFIG_SND_SOC_MAX98357A=m
+# CONFIG_SND_SOC_MAX98504 is not set
+# CONFIG_SND_SOC_MAX9860 is not set
# CONFIG_SND_SOC_PCM1681 is not set
-# CONFIG_SND_SOC_PCM1792A is not set
+# CONFIG_SND_SOC_PCM179X_I2C is not set
+# CONFIG_SND_SOC_PCM179X_SPI is not set
+# CONFIG_SND_SOC_PCM3168A_I2C is not set
+# CONFIG_SND_SOC_PCM3168A_SPI is not set
# CONFIG_SND_SOC_PCM512x_I2C is not set
# CONFIG_SND_SOC_PCM512x_SPI is not set
CONFIG_SND_SOC_RL6231=m
CONFIG_SND_SOC_RL6347A=m
CONFIG_SND_SOC_RT286=m
+CONFIG_SND_SOC_RT298=m
+# CONFIG_SND_SOC_RT5616 is not set
# CONFIG_SND_SOC_RT5631 is not set
CONFIG_SND_SOC_RT5640=m
CONFIG_SND_SOC_RT5645=m
+CONFIG_SND_SOC_RT5651=m
+CONFIG_SND_SOC_RT5663=m
CONFIG_SND_SOC_RT5670=m
-# CONFIG_SND_SOC_RT5677_SPI is not set
+CONFIG_SND_SOC_RT5677=m
+CONFIG_SND_SOC_RT5677_SPI=m
# CONFIG_SND_SOC_SGTL5000 is not set
CONFIG_SND_SOC_SI476X=m
# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
CONFIG_SND_SOC_SPDIF=m
# CONFIG_SND_SOC_SSM2602_SPI is not set
# CONFIG_SND_SOC_SSM2602_I2C is not set
-# CONFIG_SND_SOC_SSM4567 is not set
+CONFIG_SND_SOC_SSM4567=m
# CONFIG_SND_SOC_STA32X is not set
# CONFIG_SND_SOC_STA350 is not set
# CONFIG_SND_SOC_STI_SAS is not set
# CONFIG_SND_SOC_TAS2552 is not set
# CONFIG_SND_SOC_TAS5086 is not set
# CONFIG_SND_SOC_TAS571X is not set
+# CONFIG_SND_SOC_TAS5720 is not set
# CONFIG_SND_SOC_TFA9879 is not set
# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
@@ -5487,10 +5701,17 @@ CONFIG_SND_SOC_TS3A227E=m
# CONFIG_SND_SOC_WM8804_I2C is not set
# CONFIG_SND_SOC_WM8804_SPI is not set
# CONFIG_SND_SOC_WM8903 is not set
+# CONFIG_SND_SOC_WM8960 is not set
# CONFIG_SND_SOC_WM8962 is not set
+# CONFIG_SND_SOC_WM8974 is not set
# CONFIG_SND_SOC_WM8978 is not set
+# CONFIG_SND_SOC_WM8985 is not set
+# CONFIG_SND_SOC_NAU8810 is not set
+CONFIG_SND_SOC_NAU8825=m
# CONFIG_SND_SOC_TPA6130A2 is not set
+CONFIG_SND_SIMPLE_CARD_UTILS=m
CONFIG_SND_SIMPLE_CARD=m
+# CONFIG_SND_SIMPLE_SCU_CARD is not set
# CONFIG_SOUND_PRIME is not set
CONFIG_AC97_BUS=m
@@ -5511,6 +5732,7 @@ CONFIG_HID_ACRUX=m
CONFIG_HID_ACRUX_FF=y
CONFIG_HID_APPLE=m
CONFIG_HID_APPLEIR=m
+CONFIG_HID_ASUS=m
CONFIG_HID_AUREAL=m
CONFIG_HID_BELKIN=m
CONFIG_HID_BETOP_FF=m
@@ -5518,6 +5740,7 @@ CONFIG_HID_CHERRY=m
CONFIG_HID_CHICONY=m
CONFIG_HID_CORSAIR=m
CONFIG_HID_PRODIKEYS=m
+CONFIG_HID_CMEDIA=m
CONFIG_HID_CP2112=m
CONFIG_HID_CYPRESS=m
CONFIG_HID_DRAGONRISE=m
@@ -5540,6 +5763,7 @@ CONFIG_HID_ICADE=m
CONFIG_HID_TWINHAN=m
CONFIG_HID_KENSINGTON=m
CONFIG_HID_LCPOWER=m
+CONFIG_HID_LED=m
CONFIG_HID_LENOVO=m
CONFIG_HID_LOGITECH=m
CONFIG_HID_LOGITECH_DJ=m
@@ -5593,6 +5817,7 @@ CONFIG_ZEROPLUS_FF=y
CONFIG_HID_ZYDACRON=m
CONFIG_HID_SENSOR_HUB=m
# CONFIG_HID_SENSOR_CUSTOM_SENSOR is not set
+CONFIG_HID_ALPS=m
#
# USB HID support
@@ -5619,7 +5844,7 @@ CONFIG_USB_DEFAULT_PERSIST=y
CONFIG_USB_DYNAMIC_MINORS=y
# CONFIG_USB_OTG is not set
# CONFIG_USB_OTG_WHITELIST is not set
-# CONFIG_USB_ULPI_BUS is not set
+CONFIG_USB_LEDS_TRIGGER_USBPORT=m
CONFIG_USB_MON=m
CONFIG_USB_WUSB=m
CONFIG_USB_WUSB_CBAF=m
@@ -5698,12 +5923,12 @@ CONFIG_USB_MDC800=m
CONFIG_USB_MICROTEK=m
CONFIG_USBIP_CORE=m
CONFIG_USBIP_VHCI_HCD=m
+CONFIG_USBIP_VHCI_HC_PORTS=8
+CONFIG_USBIP_VHCI_NR_HCS=1
CONFIG_USBIP_HOST=m
# CONFIG_USBIP_DEBUG is not set
CONFIG_USB_MUSB_HDRC=m
-# CONFIG_USB_MUSB_HOST is not set
-# CONFIG_USB_MUSB_GADGET is not set
-CONFIG_USB_MUSB_DUAL_ROLE=y
+CONFIG_USB_MUSB_HOST=y
#
# Platform Glue Layer
@@ -5787,7 +6012,6 @@ CONFIG_USB_SEVSEG=m
CONFIG_USB_RIO500=m
CONFIG_USB_LEGOTOWER=m
CONFIG_USB_LCD=m
-CONFIG_USB_LED=m
CONFIG_USB_CYPRESS_CY7C63=m
CONFIG_USB_CYTHERM=m
CONFIG_USB_IDMOUSE=m
@@ -5804,8 +6028,10 @@ CONFIG_USB_ISIGHTFW=m
CONFIG_USB_YUREX=m
CONFIG_USB_EZUSB_FX2=m
CONFIG_USB_HSIC_USB3503=m
+CONFIG_USB_HSIC_USB4604=m
CONFIG_USB_LINK_LAYER_TEST=m
CONFIG_USB_CHAOSKEY=m
+CONFIG_UCSI=m
CONFIG_USB_ATM=m
CONFIG_USB_SPEEDTOUCH=m
CONFIG_USB_CXACRU=m
@@ -5821,89 +6047,17 @@ CONFIG_NOP_USB_XCEIV=m
CONFIG_TAHVO_USB=m
# CONFIG_TAHVO_USB_HOST_BY_DEFAULT is not set
CONFIG_USB_ISP1301=m
-CONFIG_USB_GADGET=m
-# CONFIG_USB_GADGET_DEBUG is not set
-# CONFIG_USB_GADGET_DEBUG_FILES is not set
-# CONFIG_USB_GADGET_DEBUG_FS is not set
-CONFIG_USB_GADGET_VBUS_DRAW=2
-CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
-
-#
-# USB Peripheral Controller
-#
-CONFIG_USB_FUSB300=m
-# CONFIG_USB_FOTG210_UDC is not set
-CONFIG_USB_GR_UDC=m
-CONFIG_USB_R8A66597=m
-CONFIG_USB_PXA27X=m
-CONFIG_USB_MV_UDC=m
-CONFIG_USB_MV_U3D=m
-CONFIG_USB_M66592=m
-CONFIG_USB_BDC_UDC=m
-
-#
-# Platform Support
-#
-CONFIG_USB_BDC_PCI=m
-CONFIG_USB_AMD5536UDC=m
-CONFIG_USB_NET2272=m
-CONFIG_USB_NET2272_DMA=y
-CONFIG_USB_NET2280=m
-CONFIG_USB_GOKU=m
-CONFIG_USB_EG20T=m
-CONFIG_USB_GADGET_XILINX=m
-CONFIG_USB_DUMMY_HCD=m
-CONFIG_USB_LIBCOMPOSITE=m
-CONFIG_USB_F_ACM=m
-CONFIG_USB_U_SERIAL=m
-CONFIG_USB_U_ETHER=m
-CONFIG_USB_F_SERIAL=m
-CONFIG_USB_F_OBEX=m
-CONFIG_USB_F_NCM=m
-CONFIG_USB_F_ECM=m
-CONFIG_USB_F_SUBSET=m
-CONFIG_USB_F_RNDIS=m
-CONFIG_USB_F_MASS_STORAGE=m
-CONFIG_USB_F_FS=m
-CONFIG_USB_F_UAC2=m
-CONFIG_USB_F_UVC=m
-CONFIG_USB_F_MIDI=m
-CONFIG_USB_F_HID=m
-CONFIG_USB_F_PRINTER=m
-# CONFIG_USB_CONFIGFS is not set
-# CONFIG_USB_ZERO is not set
-CONFIG_USB_AUDIO=m
-# CONFIG_GADGET_UAC1 is not set
-CONFIG_USB_ETH=m
-CONFIG_USB_ETH_RNDIS=y
-# CONFIG_USB_ETH_EEM is not set
-CONFIG_USB_G_NCM=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_FUNCTIONFS=m
-CONFIG_USB_FUNCTIONFS_ETH=y
-CONFIG_USB_FUNCTIONFS_RNDIS=y
-CONFIG_USB_FUNCTIONFS_GENERIC=y
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_GADGET_TARGET=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_MIDI_GADGET=m
-CONFIG_USB_G_PRINTER=m
-# CONFIG_USB_CDC_COMPOSITE is not set
-# CONFIG_USB_G_NOKIA is not set
-# CONFIG_USB_G_ACM_MS is not set
-# CONFIG_USB_G_MULTI is not set
-CONFIG_USB_G_HID=m
-CONFIG_USB_G_DBGP=m
-# CONFIG_USB_G_DBGP_PRINTK is not set
-CONFIG_USB_G_DBGP_SERIAL=y
-CONFIG_USB_G_WEBCAM=m
+# CONFIG_USB_GADGET is not set
CONFIG_USB_LED_TRIG=y
+# CONFIG_USB_ULPI_BUS is not set
CONFIG_UWB=m
CONFIG_UWB_HWA=m
CONFIG_UWB_WHCI=m
CONFIG_UWB_I1480U=m
CONFIG_MMC=m
# CONFIG_MMC_DEBUG is not set
+CONFIG_PWRSEQ_EMMC=m
+CONFIG_PWRSEQ_SIMPLE=m
#
# MMC/SD/SDIO Card Drivers
@@ -5972,6 +6126,7 @@ CONFIG_LEDS_PCA9532=m
# CONFIG_LEDS_PCA9532_GPIO is not set
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_LP3944=m
+CONFIG_LEDS_LP3952=m
# CONFIG_LEDS_LP5521 is not set
# CONFIG_LEDS_LP5523 is not set
# CONFIG_LEDS_LP5562 is not set
@@ -5992,6 +6147,8 @@ CONFIG_LEDS_TLC591XX=m
CONFIG_LEDS_LM355x=m
CONFIG_LEDS_OT200=m
CONFIG_LEDS_KTD2692=m
+# CONFIG_LEDS_IS31FL319X is not set
+# CONFIG_LEDS_IS31FL32XX is not set
#
# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)
@@ -6004,6 +6161,8 @@ CONFIG_LEDS_BLINKM=m
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=m
CONFIG_LEDS_TRIGGER_ONESHOT=m
+CONFIG_LEDS_TRIGGER_DISK=y
+CONFIG_LEDS_TRIGGER_MTD=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
CONFIG_LEDS_TRIGGER_BACKLIGHT=m
CONFIG_LEDS_TRIGGER_CPU=y
@@ -6015,6 +6174,7 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
#
CONFIG_LEDS_TRIGGER_TRANSIENT=m
CONFIG_LEDS_TRIGGER_CAMERA=m
+CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_ACCESSIBILITY=y
CONFIG_A11Y_BRAILLE_CONSOLE=y
CONFIG_INFINIBAND=m
@@ -6023,11 +6183,13 @@ CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MEM=y
CONFIG_INFINIBAND_ON_DEMAND_PAGING=y
CONFIG_INFINIBAND_ADDR_TRANS=y
+CONFIG_INFINIBAND_ADDR_TRANS_CONFIGFS=y
CONFIG_INFINIBAND_MTHCA=m
CONFIG_INFINIBAND_MTHCA_DEBUG=y
CONFIG_INFINIBAND_CXGB3=m
# CONFIG_INFINIBAND_CXGB3_DEBUG is not set
CONFIG_INFINIBAND_CXGB4=m
+CONFIG_INFINIBAND_I40IW=m
CONFIG_MLX4_INFINIBAND=m
CONFIG_MLX5_INFINIBAND=m
CONFIG_INFINIBAND_NES=m
@@ -6042,6 +6204,7 @@ CONFIG_INFINIBAND_SRP=m
CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_ISER=m
CONFIG_INFINIBAND_ISERT=m
+CONFIG_RDMA_RXE=m
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EDAC=y
@@ -6068,6 +6231,7 @@ CONFIG_EDAC_I5000=m
CONFIG_EDAC_I5100=m
CONFIG_EDAC_I7300=m
CONFIG_RTC_LIB=y
+CONFIG_RTC_MC146818_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
@@ -6090,32 +6254,31 @@ CONFIG_RTC_DRV_TEST=m
# CONFIG_RTC_DRV_ABB5ZES3 is not set
CONFIG_RTC_DRV_ABX80X=m
CONFIG_RTC_DRV_DS1307=m
+CONFIG_RTC_DRV_DS1307_HWMON=y
+# CONFIG_RTC_DRV_DS1307_CENTURY is not set
CONFIG_RTC_DRV_DS1374=m
CONFIG_RTC_DRV_DS1374_WDT=y
CONFIG_RTC_DRV_DS1672=m
-CONFIG_RTC_DRV_DS3232=m
CONFIG_RTC_DRV_HYM8563=m
CONFIG_RTC_DRV_MAX6900=m
CONFIG_RTC_DRV_RK808=m
CONFIG_RTC_DRV_RS5C372=m
CONFIG_RTC_DRV_ISL1208=m
CONFIG_RTC_DRV_ISL12022=m
-CONFIG_RTC_DRV_ISL12057=m
CONFIG_RTC_DRV_X1205=m
-CONFIG_RTC_DRV_PCF2127=m
CONFIG_RTC_DRV_PCF8523=m
-CONFIG_RTC_DRV_PCF8563=m
CONFIG_RTC_DRV_PCF85063=m
+CONFIG_RTC_DRV_PCF8563=m
CONFIG_RTC_DRV_PCF8583=m
CONFIG_RTC_DRV_M41T80=m
CONFIG_RTC_DRV_M41T80_WDT=y
CONFIG_RTC_DRV_BQ32K=m
CONFIG_RTC_DRV_S35390A=m
CONFIG_RTC_DRV_FM3130=m
+CONFIG_RTC_DRV_RX8010=m
CONFIG_RTC_DRV_RX8581=m
CONFIG_RTC_DRV_RX8025=m
CONFIG_RTC_DRV_EM3027=m
-CONFIG_RTC_DRV_RV3029C2=m
# CONFIG_RTC_DRV_RV8803 is not set
#
@@ -6123,17 +6286,28 @@ CONFIG_RTC_DRV_RV3029C2=m
#
# CONFIG_RTC_DRV_M41T93 is not set
# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1302 is not set
# CONFIG_RTC_DRV_DS1305 is not set
# CONFIG_RTC_DRV_DS1343 is not set
# CONFIG_RTC_DRV_DS1347 is not set
# CONFIG_RTC_DRV_DS1390 is not set
-# CONFIG_RTC_DRV_MAX6902 is not set
+CONFIG_RTC_DRV_MAX6916=m
# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RX4581 is not set
+# CONFIG_RTC_DRV_RX6110 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
-# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_PCF2123 is not set
-# CONFIG_RTC_DRV_RX4581 is not set
# CONFIG_RTC_DRV_MCP795 is not set
+CONFIG_RTC_I2C_AND_SPI=y
+
+#
+# SPI and I2C RTC drivers
+#
+CONFIG_RTC_DRV_DS3232=m
+CONFIG_RTC_DRV_PCF2127=m
+CONFIG_RTC_DRV_RV3029C2=m
+CONFIG_RTC_DRV_RV3029_HWMON=y
#
# Platform RTC drivers
@@ -6186,9 +6360,11 @@ CONFIG_DMA_OF=y
CONFIG_FSL_EDMA=m
CONFIG_INTEL_IDMA64=m
CONFIG_PCH_DMA=m
-CONFIG_DW_DMAC_CORE=m
-CONFIG_DW_DMAC=m
-CONFIG_DW_DMAC_PCI=m
+# CONFIG_QCOM_HIDMA_MGMT is not set
+# CONFIG_QCOM_HIDMA is not set
+CONFIG_DW_DMAC_CORE=y
+CONFIG_DW_DMAC=y
+CONFIG_DW_DMAC_PCI=y
CONFIG_HSU_DMA=y
#
@@ -6196,12 +6372,19 @@ CONFIG_HSU_DMA=y
#
CONFIG_ASYNC_TX_DMA=y
# CONFIG_DMATEST is not set
+
+#
+# DMABUF options
+#
+CONFIG_SYNC_FILE=y
+# CONFIG_SW_SYNC is not set
CONFIG_AUXDISPLAY=y
CONFIG_KS0108=m
CONFIG_KS0108_PORT=0x378
CONFIG_KS0108_DELAY=2
CONFIG_CFAG12864B=m
CONFIG_CFAG12864B_RATE=20
+# CONFIG_IMG_ASCII_LCD is not set
CONFIG_UIO=m
CONFIG_UIO_CIF=m
CONFIG_UIO_PDRV_GENIRQ=m
@@ -6215,10 +6398,12 @@ CONFIG_UIO_PRUSS=m
CONFIG_VFIO_IOMMU_TYPE1=m
CONFIG_VFIO_VIRQFD=m
CONFIG_VFIO=m
+# CONFIG_VFIO_NOIOMMU is not set
CONFIG_VFIO_PCI=m
CONFIG_VFIO_PCI_VGA=y
CONFIG_VFIO_PCI_MMAP=y
CONFIG_VFIO_PCI_INTX=y
+CONFIG_VFIO_PCI_IGD=y
CONFIG_IRQ_BYPASS_MANAGER=m
CONFIG_VIRT_DRIVERS=y
CONFIG_VIRTIO=m
@@ -6317,8 +6502,10 @@ CONFIG_COMEDI_ADL_PCI8164=m
CONFIG_COMEDI_ADL_PCI9111=m
CONFIG_COMEDI_ADL_PCI9118=m
CONFIG_COMEDI_ADV_PCI1710=m
+CONFIG_COMEDI_ADV_PCI1720=m
CONFIG_COMEDI_ADV_PCI1723=m
CONFIG_COMEDI_ADV_PCI1724=m
+CONFIG_COMEDI_ADV_PCI1760=m
CONFIG_COMEDI_ADV_PCI_DIO=m
CONFIG_COMEDI_AMPLC_DIO200_PCI=m
CONFIG_COMEDI_AMPLC_PC236_PCI=m
@@ -6382,7 +6569,6 @@ CONFIG_COMEDI_NI_TIO=m
CONFIG_FB_OLPC_DCON=m
CONFIG_FB_OLPC_DCON_1=y
CONFIG_FB_OLPC_DCON_1_5=y
-# CONFIG_PANEL is not set
CONFIG_RTL8192U=m
CONFIG_RTLLIB=m
CONFIG_RTLLIB_CRYPTO_CCMP=m
@@ -6392,9 +6578,6 @@ CONFIG_RTL8192E=m
CONFIG_R8712U=m
CONFIG_R8188EU=m
CONFIG_88EU_AP_MODE=y
-CONFIG_R8723AU=m
-CONFIG_8723AU_AP_MODE=y
-CONFIG_8723AU_BT_COEXIST=y
CONFIG_RTS5208=m
CONFIG_VT6655=m
CONFIG_VT6656=m
@@ -6408,11 +6591,8 @@ CONFIG_VT6656=m
#
# CONFIG_ADIS16201 is not set
# CONFIG_ADIS16203 is not set
-# CONFIG_ADIS16204 is not set
# CONFIG_ADIS16209 is not set
-# CONFIG_ADIS16220 is not set
# CONFIG_ADIS16240 is not set
-# CONFIG_LIS3L02DQ is not set
# CONFIG_SCA3000 is not set
#
@@ -6461,13 +6641,6 @@ CONFIG_VT6656=m
# CONFIG_TSL2x7x is not set
#
-# Magnetometer sensors
-#
-CONFIG_SENSORS_HMC5843=m
-CONFIG_SENSORS_HMC5843_I2C=m
-CONFIG_SENSORS_HMC5843_SPI=m
-
-#
# Active energy metering IC
#
# CONFIG_ADE7753 is not set
@@ -6486,8 +6659,6 @@ CONFIG_SENSORS_HMC5843_SPI=m
#
# Triggers - standalone
#
-# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set
-# CONFIG_IIO_SIMPLE_DUMMY is not set
# CONFIG_FB_SM750 is not set
CONFIG_FB_XGI=m
@@ -6510,12 +6681,10 @@ CONFIG_SPEAKUP_SYNTH_SOFT=m
CONFIG_SPEAKUP_SYNTH_SPKOUT=m
CONFIG_SPEAKUP_SYNTH_TXPRT=m
CONFIG_SPEAKUP_SYNTH_DUMMY=m
-CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m
CONFIG_STAGING_MEDIA=y
CONFIG_I2C_BCM2048=m
+# CONFIG_MEDIA_CEC is not set
CONFIG_DVB_CXD2099=m
-CONFIG_DVB_MN88472=m
-CONFIG_DVB_MN88473=m
CONFIG_LIRC_STAGING=y
CONFIG_LIRC_BT829=m
CONFIG_LIRC_IMON=m
@@ -6525,44 +6694,43 @@ CONFIG_LIRC_SERIAL=m
CONFIG_LIRC_SERIAL_TRANSMITTER=y
CONFIG_LIRC_SIR=m
CONFIG_LIRC_ZILOG=m
-# CONFIG_STAGING_RDMA is not set
#
# Android
#
# CONFIG_STAGING_BOARD is not set
-CONFIG_WIMAX_GDM72XX=m
-CONFIG_WIMAX_GDM72XX_QOS=y
-CONFIG_WIMAX_GDM72XX_K_MODE=y
-CONFIG_WIMAX_GDM72XX_WIMAX2=y
-CONFIG_WIMAX_GDM72XX_USB=y
-# CONFIG_WIMAX_GDM72XX_SDIO is not set
-CONFIG_WIMAX_GDM72XX_USB_PM=y
CONFIG_LTE_GDM724X=m
CONFIG_FIREWIRE_SERIAL=m
CONFIG_FWTTY_MAX_TOTAL_PORTS=64
CONFIG_FWTTY_MAX_CARD_PORTS=32
-# CONFIG_MTD_SPINAND_MT29F is not set
-CONFIG_LUSTRE_FS=m
-CONFIG_LUSTRE_OBD_MAX_IOCTL_BUFFER=8192
-# CONFIG_LUSTRE_DEBUG_EXPENSIVE_CHECK is not set
-CONFIG_LUSTRE_LLITE_LLOOP=m
CONFIG_LNET=m
CONFIG_LNET_MAX_PAYLOAD=1048576
CONFIG_LNET_SELFTEST=m
-CONFIG_LNET_XPRT_IB=m
+CONFIG_LUSTRE_FS=m
+CONFIG_LUSTRE_OBD_MAX_IOCTL_BUFFER=8192
+# CONFIG_LUSTRE_DEBUG_EXPENSIVE_CHECK is not set
CONFIG_DGNC=m
-CONFIG_DGAP=m
CONFIG_GS_FPGABOOT=m
CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
# CONFIG_FB_TFT is not set
-# CONFIG_WILC1000_DRIVER is not set
+# CONFIG_WILC1000_SDIO is not set
+# CONFIG_WILC1000_SPI is not set
# CONFIG_MOST is not set
+
+#
+# Old ISDN4Linux (deprecated)
+#
+CONFIG_ISDN_DRV_ICN=m
+CONFIG_ISDN_DRV_PCBIT=m
+CONFIG_ISDN_DRV_ACT2000=m
+# CONFIG_KS7010 is not set
+# CONFIG_GREYBUS is not set
CONFIG_X86_PLATFORM_DEVICES=y
CONFIG_ACER_WMI=m
CONFIG_ACERHDF=m
CONFIG_ALIENWARE_WMI=m
CONFIG_ASUS_LAPTOP=m
+CONFIG_DELL_SMBIOS=m
CONFIG_DELL_LAPTOP=m
CONFIG_DELL_WMI=m
CONFIG_DELL_WMI_AIO=m
@@ -6595,6 +6763,7 @@ CONFIG_EEEPC_LAPTOP=m
CONFIG_ASUS_WMI=m
CONFIG_ASUS_NB_WMI=m
CONFIG_EEEPC_WMI=m
+CONFIG_ASUS_WIRELESS=m
CONFIG_ACPI_WMI=m
CONFIG_MSI_WMI=m
CONFIG_TOPSTAR_LAPTOP=m
@@ -6603,7 +6772,10 @@ CONFIG_TOSHIBA_BT_RFKILL=m
CONFIG_TOSHIBA_HAPS=m
CONFIG_TOSHIBA_WMI=m
CONFIG_ACPI_CMPC=m
+CONFIG_INTEL_HID_EVENT=m
+CONFIG_INTEL_VBTN=m
CONFIG_INTEL_IPS=m
+CONFIG_INTEL_PMC_CORE=y
CONFIG_IBM_RTL=m
CONFIG_XO1_RFKILL=m
CONFIG_XO15_EBOOK=m
@@ -6613,16 +6785,18 @@ CONFIG_INTEL_OAKTRAIL=m
CONFIG_SAMSUNG_Q10=m
CONFIG_APPLE_GMUX=m
CONFIG_INTEL_RST=m
-CONFIG_INTEL_SMARTCONNECT=y
+CONFIG_INTEL_SMARTCONNECT=m
CONFIG_PVPANIC=m
CONFIG_INTEL_PMC_IPC=m
CONFIG_SURFACE_PRO3_BUTTON=m
+CONFIG_INTEL_PUNIT_IPC=m
CONFIG_CHROME_PLATFORMS=y
CONFIG_CHROMEOS_LAPTOP=m
CONFIG_CHROMEOS_PSTORE=m
CONFIG_CROS_EC_CHARDEV=m
CONFIG_CROS_EC_LPC=m
CONFIG_CROS_EC_PROTO=y
+CONFIG_CROS_KBD_LED_BACKLIGHT=m
CONFIG_CLKDEV_LOOKUP=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_COMMON_CLK=y
@@ -6634,10 +6808,13 @@ CONFIG_COMMON_CLK_RK808=m
# CONFIG_COMMON_CLK_SI5351 is not set
# CONFIG_COMMON_CLK_SI514 is not set
# CONFIG_COMMON_CLK_SI570 is not set
+# CONFIG_COMMON_CLK_CDCE706 is not set
# CONFIG_COMMON_CLK_CDCE925 is not set
+# CONFIG_COMMON_CLK_CS2000_CP is not set
+# CONFIG_COMMON_CLK_NXP is not set
# CONFIG_COMMON_CLK_PWM is not set
# CONFIG_COMMON_CLK_PXA is not set
-# CONFIG_COMMON_CLK_CDCE706 is not set
+# CONFIG_COMMON_CLK_PIC32 is not set
#
# Hardware Spinlock drivers
@@ -6683,6 +6860,10 @@ CONFIG_STE_MODEM_RPROC=m
#
# SOC (System On Chip) specific Drivers
#
+
+#
+# Broadcom SoC drivers
+#
# CONFIG_SUNXI_SRAM is not set
# CONFIG_SOC_TI is not set
CONFIG_PM_DEVFREQ=y
@@ -6694,6 +6875,7 @@ CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m
CONFIG_DEVFREQ_GOV_PERFORMANCE=m
CONFIG_DEVFREQ_GOV_POWERSAVE=m
CONFIG_DEVFREQ_GOV_USERSPACE=m
+CONFIG_DEVFREQ_GOV_PASSIVE=m
#
# DEVFREQ Drivers
@@ -6707,6 +6889,8 @@ CONFIG_EXTCON=m
# CONFIG_EXTCON_ADC_JACK is not set
# CONFIG_EXTCON_ARIZONA is not set
CONFIG_EXTCON_GPIO=m
+# CONFIG_EXTCON_MAX3355 is not set
+# CONFIG_EXTCON_QCOM_SPMI_MISC is not set
# CONFIG_EXTCON_RT8973A is not set
CONFIG_EXTCON_SM5502=m
# CONFIG_EXTCON_USB_GPIO is not set
@@ -6716,24 +6900,35 @@ CONFIG_IIO_BUFFER=y
CONFIG_IIO_BUFFER_CB=m
CONFIG_IIO_KFIFO_BUF=m
CONFIG_IIO_TRIGGERED_BUFFER=m
+CONFIG_IIO_CONFIGFS=m
CONFIG_IIO_TRIGGER=y
CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
+CONFIG_IIO_SW_DEVICE=m
+CONFIG_IIO_SW_TRIGGER=m
#
# Accelerometers
#
# CONFIG_BMA180 is not set
+# CONFIG_BMA220 is not set
# CONFIG_BMC150_ACCEL is not set
+# CONFIG_DMARD06 is not set
+# CONFIG_DMARD09 is not set
CONFIG_HID_SENSOR_ACCEL_3D=m
CONFIG_IIO_ST_ACCEL_3AXIS=m
CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m
CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m
# CONFIG_KXSD9 is not set
CONFIG_KXCJK1013=m
+# CONFIG_MC3230 is not set
+# CONFIG_MMA7455_I2C is not set
+# CONFIG_MMA7455_SPI is not set
+CONFIG_MMA7660=m
# CONFIG_MMA8452 is not set
# CONFIG_MMA9551 is not set
# CONFIG_MMA9553 is not set
# CONFIG_MXC4005 is not set
+# CONFIG_MXC6255 is not set
# CONFIG_STK8312 is not set
# CONFIG_STK8BA50 is not set
@@ -6750,6 +6945,8 @@ CONFIG_KXCJK1013=m
# CONFIG_AD7923 is not set
# CONFIG_AD799X is not set
# CONFIG_HI8435 is not set
+# CONFIG_INA2XX_ADC is not set
+# CONFIG_LTC2485 is not set
# CONFIG_MAX1027 is not set
# CONFIG_MAX1363 is not set
# CONFIG_MCP320X is not set
@@ -6757,8 +6954,14 @@ CONFIG_KXCJK1013=m
# CONFIG_NAU7802 is not set
# CONFIG_QCOM_SPMI_IADC is not set
# CONFIG_QCOM_SPMI_VADC is not set
+# CONFIG_STX104 is not set
# CONFIG_TI_ADC081C is not set
+# CONFIG_TI_ADC0832 is not set
+# CONFIG_TI_ADC12138 is not set
# CONFIG_TI_ADC128S052 is not set
+# CONFIG_TI_ADC161S626 is not set
+# CONFIG_TI_ADS1015 is not set
+# CONFIG_TI_ADS8688 is not set
# CONFIG_TI_AM335X_ADC is not set
# CONFIG_VF610_ADC is not set
# CONFIG_VIPERBOARD_ADC is not set
@@ -6771,6 +6974,8 @@ CONFIG_KXCJK1013=m
#
# Chemical Sensors
#
+# CONFIG_ATLAS_PH_SENSOR is not set
+# CONFIG_IAQCORE is not set
# CONFIG_VZ89X is not set
#
@@ -6796,18 +7001,29 @@ CONFIG_IIO_ST_SENSORS_CORE=m
# CONFIG_AD5421 is not set
# CONFIG_AD5446 is not set
# CONFIG_AD5449 is not set
+# CONFIG_AD5592R is not set
+# CONFIG_AD5593R is not set
# CONFIG_AD5504 is not set
# CONFIG_AD5624R_SPI is not set
# CONFIG_AD5686 is not set
# CONFIG_AD5755 is not set
+# CONFIG_AD5761 is not set
# CONFIG_AD5764 is not set
# CONFIG_AD5791 is not set
# CONFIG_AD7303 is not set
+# CONFIG_CIO_DAC is not set
+# CONFIG_AD8801 is not set
# CONFIG_M62332 is not set
# CONFIG_MAX517 is not set
# CONFIG_MAX5821 is not set
# CONFIG_MCP4725 is not set
# CONFIG_MCP4922 is not set
+# CONFIG_VF610_DAC is not set
+
+#
+# IIO dummy driver
+#
+# CONFIG_IIO_SIMPLE_DUMMY is not set
#
# Frequency Synthesizers DDS/PLL
@@ -6839,8 +7055,20 @@ CONFIG_IIO_ST_GYRO_SPI_3AXIS=m
# CONFIG_ITG3200 is not set
#
+# Health Sensors
+#
+
+#
+# Heart Rate Monitors
+#
+# CONFIG_AFE4403 is not set
+# CONFIG_AFE4404 is not set
+CONFIG_MAX30100=m
+
+#
# Humidity sensors
#
+# CONFIG_AM2315 is not set
# CONFIG_DHT11 is not set
# CONFIG_HDC100X is not set
# CONFIG_HTU21 is not set
@@ -6852,8 +7080,12 @@ CONFIG_IIO_ST_GYRO_SPI_3AXIS=m
#
# CONFIG_ADIS16400 is not set
# CONFIG_ADIS16480 is not set
+# CONFIG_BMI160_I2C is not set
+# CONFIG_BMI160_SPI is not set
# CONFIG_KMX61 is not set
-# CONFIG_INV_MPU6050_IIO is not set
+CONFIG_INV_MPU6050_IIO=m
+# CONFIG_INV_MPU6050_I2C is not set
+CONFIG_INV_MPU6050_SPI=m
#
# Light sensors
@@ -6864,6 +7096,7 @@ CONFIG_ACPI_ALS=m
# CONFIG_APDS9300 is not set
# CONFIG_APDS9960 is not set
CONFIG_BH1750=m
+CONFIG_BH1780=m
# CONFIG_CM32181 is not set
# CONFIG_CM3232 is not set
# CONFIG_CM3323 is not set
@@ -6876,8 +7109,10 @@ CONFIG_HID_SENSOR_ALS=m
CONFIG_RPR0521=m
# CONFIG_SENSORS_LM3533 is not set
# CONFIG_LTR501 is not set
+# CONFIG_MAX44000 is not set
CONFIG_OPT3001=m
CONFIG_PA12203001=m
+# CONFIG_SI1145 is not set
CONFIG_STK3310=m
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
@@ -6885,19 +7120,25 @@ CONFIG_STK3310=m
# CONFIG_TSL4531 is not set
# CONFIG_US5182D is not set
# CONFIG_VCNL4000 is not set
+# CONFIG_VEML6070 is not set
#
# Magnetometer sensors
#
+# CONFIG_AK8974 is not set
# CONFIG_AK8975 is not set
# CONFIG_AK09911 is not set
-# CONFIG_BMC150_MAGN is not set
+# CONFIG_BMC150_MAGN_I2C is not set
+# CONFIG_BMC150_MAGN_SPI is not set
# CONFIG_MAG3110 is not set
CONFIG_HID_SENSOR_MAGNETOMETER_3D=m
# CONFIG_MMC35240 is not set
CONFIG_IIO_ST_MAGN_3AXIS=m
CONFIG_IIO_ST_MAGN_I2C_3AXIS=m
CONFIG_IIO_ST_MAGN_SPI_3AXIS=m
+CONFIG_SENSORS_HMC5843=m
+CONFIG_SENSORS_HMC5843_I2C=m
+CONFIG_SENSORS_HMC5843_SPI=m
#
# Inclinometer sensors
@@ -6908,25 +7149,35 @@ CONFIG_HID_SENSOR_DEVICE_ROTATION=m
#
# Triggers - standalone
#
+# CONFIG_IIO_HRTIMER_TRIGGER is not set
CONFIG_IIO_INTERRUPT_TRIGGER=m
+CONFIG_IIO_TIGHTLOOP_TRIGGER=m
# CONFIG_IIO_SYSFS_TRIGGER is not set
#
# Digital potentiometers
#
+# CONFIG_DS1803 is not set
+# CONFIG_MAX5487 is not set
+# CONFIG_MCP4131 is not set
# CONFIG_MCP4531 is not set
+# CONFIG_TPL0102 is not set
#
# Pressure sensors
#
# CONFIG_BMP280 is not set
# CONFIG_HID_SENSOR_PRESS is not set
-# CONFIG_MPL115 is not set
+# CONFIG_HP03 is not set
+# CONFIG_MPL115_I2C is not set
+# CONFIG_MPL115_SPI is not set
# CONFIG_MPL3115 is not set
# CONFIG_MS5611 is not set
# CONFIG_MS5637 is not set
# CONFIG_IIO_ST_PRESS is not set
# CONFIG_T5403 is not set
+# CONFIG_HP206C is not set
+# CONFIG_ZPA2326 is not set
#
# Lightning sensors
@@ -6942,6 +7193,7 @@ CONFIG_IIO_INTERRUPT_TRIGGER=m
#
# Temperature sensors
#
+# CONFIG_MAXIM_THERMOCOUPLE is not set
# CONFIG_MLX90614 is not set
# CONFIG_TMP006 is not set
# CONFIG_TSYS01 is not set
@@ -6951,6 +7203,7 @@ CONFIG_IIO_INTERRUPT_TRIGGER=m
CONFIG_PWM=y
CONFIG_PWM_SYSFS=y
# CONFIG_PWM_CRC is not set
+# CONFIG_PWM_CROS_EC is not set
CONFIG_PWM_FSL_FTM=m
# CONFIG_PWM_LP3943 is not set
CONFIG_PWM_LPSS=m
@@ -6958,10 +7211,21 @@ CONFIG_PWM_LPSS_PCI=m
CONFIG_PWM_LPSS_PLATFORM=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_IRQCHIP=y
+CONFIG_ARM_GIC_MAX_NR=1
CONFIG_IPACK_BUS=m
CONFIG_BOARD_TPCI200=m
CONFIG_SERIAL_IPOCTAL=m
CONFIG_RESET_CONTROLLER=y
+# CONFIG_RESET_ATH79 is not set
+# CONFIG_RESET_BERLIN is not set
+# CONFIG_RESET_LPC18XX is not set
+# CONFIG_RESET_MESON is not set
+# CONFIG_RESET_PISTACHIO is not set
+# CONFIG_RESET_SOCFPGA is not set
+# CONFIG_RESET_STM32 is not set
+# CONFIG_RESET_SUNXI is not set
+# CONFIG_TI_SYSCON_RESET is not set
+# CONFIG_RESET_ZYNQ is not set
CONFIG_FMC=m
CONFIG_FMC_FAKEDEV=m
CONFIG_FMC_TRIVIAL=m
@@ -6983,18 +7247,27 @@ CONFIG_INTEL_RAPL=m
# Performance monitor support
#
CONFIG_RAS=y
-CONFIG_AMD_MCE_INJ=m
+# CONFIG_MCE_AMD_INJ is not set
CONFIG_THUNDERBOLT=m
#
# Android
#
# CONFIG_ANDROID is not set
-# CONFIG_NVMEM is not set
-# CONFIG_STM is not set
+CONFIG_DEV_DAX=m
+CONFIG_NR_DEV_DAX=32768
+CONFIG_NVMEM=m
+CONFIG_STM=m
# CONFIG_STM_DUMMY is not set
-# CONFIG_STM_SOURCE_CONSOLE is not set
-# CONFIG_INTEL_TH is not set
+CONFIG_STM_SOURCE_CONSOLE=m
+CONFIG_STM_SOURCE_HEARTBEAT=m
+CONFIG_INTEL_TH=m
+CONFIG_INTEL_TH_PCI=m
+CONFIG_INTEL_TH_GTH=m
+CONFIG_INTEL_TH_STH=m
+CONFIG_INTEL_TH_MSU=m
+CONFIG_INTEL_TH_PTI=m
+# CONFIG_INTEL_TH_DEBUG is not set
#
# FPGA Configuration Support
@@ -7014,6 +7287,8 @@ CONFIG_DMI_SYSFS=m
CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y
CONFIG_ISCSI_IBFT_FIND=y
CONFIG_ISCSI_IBFT=m
+CONFIG_FW_CFG_SYSFS=m
+# CONFIG_FW_CFG_SYSFS_CMDLINE is not set
# CONFIG_GOOGLE_FIRMWARE is not set
#
@@ -7024,19 +7299,23 @@ CONFIG_EFI_ESRT=y
CONFIG_EFI_RUNTIME_MAP=y
# CONFIG_EFI_FAKE_MEMMAP is not set
CONFIG_EFI_RUNTIME_WRAPPERS=y
+CONFIG_EFI_CAPSULE_LOADER=m
+# CONFIG_EFI_TEST is not set
CONFIG_UEFI_CPER=y
#
# File systems
#
CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_FS_IOMAP=y
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
CONFIG_EXT4_FS=m
CONFIG_EXT4_USE_FOR_EXT2=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
-# CONFIG_EXT4_ENCRYPTION is not set
+CONFIG_EXT4_ENCRYPTION=y
+CONFIG_EXT4_FS_ENCRYPTION=y
# CONFIG_EXT4_DEBUG is not set
CONFIG_JBD2=m
# CONFIG_JBD2_DEBUG is not set
@@ -7081,10 +7360,14 @@ CONFIG_F2FS_FS_SECURITY=y
CONFIG_F2FS_CHECK_FS=y
CONFIG_F2FS_FS_ENCRYPTION=y
# CONFIG_F2FS_IO_TRACE is not set
+# CONFIG_F2FS_FAULT_INJECTION is not set
# CONFIG_FS_DAX is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y
+CONFIG_EXPORTFS_BLOCK_OPS=y
CONFIG_FILE_LOCKING=y
+# CONFIG_MANDATORY_FILE_LOCKING is not set
+CONFIG_FS_ENCRYPTION=m
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
@@ -7132,6 +7415,7 @@ CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_FAT_DEFAULT_UTF8 is not set
CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set
CONFIG_NTFS_RW=y
@@ -7155,6 +7439,7 @@ CONFIG_HUGETLB_PAGE=y
CONFIG_CONFIGFS_FS=y
CONFIG_EFIVAR_FS=y
CONFIG_MISC_FILESYSTEMS=y
+CONFIG_ORANGEFS_FS=m
# CONFIG_ADFS_FS is not set
CONFIG_AFFS_FS=m
CONFIG_ECRYPT_FS=m
@@ -7210,10 +7495,13 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
# CONFIG_ROMFS_BACKED_BY_BOTH is not set
CONFIG_ROMFS_ON_BLOCK=y
CONFIG_PSTORE=y
+CONFIG_PSTORE_ZLIB_COMPRESS=y
+# CONFIG_PSTORE_LZO_COMPRESS is not set
+# CONFIG_PSTORE_LZ4_COMPRESS is not set
# CONFIG_PSTORE_CONSOLE is not set
# CONFIG_PSTORE_PMSG is not set
# CONFIG_PSTORE_FTRACE is not set
-CONFIG_PSTORE_RAM=m
+CONFIG_PSTORE_RAM=y
# CONFIG_SYSV_FS is not set
CONFIG_UFS_FS=m
# CONFIG_UFS_FS_WRITE is not set
@@ -7247,6 +7535,9 @@ CONFIG_NFSD_V3=y
CONFIG_NFSD_V3_ACL=y
CONFIG_NFSD_V4=y
CONFIG_NFSD_PNFS=y
+CONFIG_NFSD_BLOCKLAYOUT=y
+CONFIG_NFSD_SCSILAYOUT=y
+# CONFIG_NFSD_FLEXFILELAYOUT is not set
CONFIG_NFSD_V4_SECURITY_LABEL=y
# CONFIG_NFSD_FAULT_INJECTION is not set
CONFIG_GRACE_PERIOD=m
@@ -7267,7 +7558,7 @@ CONFIG_CEPH_FS_POSIX_ACL=y
CONFIG_CIFS=m
CONFIG_CIFS_STATS=y
# CONFIG_CIFS_STATS2 is not set
-CONFIG_CIFS_WEAK_PW_HASH=y
+# CONFIG_CIFS_WEAK_PW_HASH is not set
CONFIG_CIFS_UPCALL=y
CONFIG_CIFS_XATTR=y
CONFIG_CIFS_POSIX=y
@@ -7277,15 +7568,7 @@ CONFIG_CIFS_DFS_UPCALL=y
CONFIG_CIFS_SMB2=y
CONFIG_CIFS_SMB311=y
CONFIG_CIFS_FSCACHE=y
-CONFIG_NCP_FS=m
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-CONFIG_NCPFS_NFS_NS=y
-CONFIG_NCPFS_OS2_NS=y
-CONFIG_NCPFS_SMALLDOS=y
-CONFIG_NCPFS_NLS=y
-# CONFIG_NCPFS_EXTRAS is not set
+# CONFIG_NCP_FS is not set
CONFIG_CODA_FS=m
CONFIG_AFS_FS=m
# CONFIG_AFS_DEBUG is not set
@@ -7365,7 +7648,7 @@ CONFIG_DYNAMIC_DEBUG=y
# Compile-time checks and compiler options
#
# CONFIG_DEBUG_INFO is not set
-CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_FRAME_WARN=1024
CONFIG_STRIP_ASM_SYMS=y
@@ -7388,6 +7671,8 @@ CONFIG_DEBUG_KERNEL=y
#
# CONFIG_PAGE_EXTENSION is not set
# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_PAGE_POISONING is not set
+# CONFIG_DEBUG_PAGE_REF is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
@@ -7417,6 +7702,7 @@ CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_WQ_WATCHDOG is not set
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
@@ -7455,21 +7741,21 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_PROVE_RCU is not set
# CONFIG_SPARSE_RCU_POINTER is not set
# CONFIG_TORTURE_TEST is not set
+# CONFIG_RCU_PERF_TEST is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=60
# CONFIG_RCU_TRACE is not set
# CONFIG_RCU_EQS_DEBUG is not set
+# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
-CONFIG_ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS=y
-# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
CONFIG_USER_STACKTRACE_SUPPORT=y
CONFIG_NOP_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
@@ -7489,6 +7775,7 @@ CONFIG_FUNCTION_TRACER=y
CONFIG_FUNCTION_GRAPH_TRACER=y
# CONFIG_IRQSOFF_TRACER is not set
CONFIG_SCHED_TRACER=y
+CONFIG_HWLAT_TRACER=y
CONFIG_FTRACE_SYSCALLS=y
CONFIG_TRACER_SNAPSHOT=y
# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set
@@ -7507,6 +7794,7 @@ CONFIG_FUNCTION_PROFILER=y
CONFIG_FTRACE_MCOUNT_RECORD=y
# CONFIG_FTRACE_STARTUP_TEST is not set
CONFIG_MMIOTRACE=y
+# CONFIG_HIST_TRIGGERS is not set
# CONFIG_MMIOTRACE_TEST is not set
# CONFIG_TRACEPOINT_BENCHMARK is not set
CONFIG_RING_BUFFER_BENCHMARK=m
@@ -7530,7 +7818,10 @@ CONFIG_ASYNC_RAID6_TEST=m
# CONFIG_TEST_STRING_HELPERS is not set
CONFIG_TEST_KSTRTOX=m
# CONFIG_TEST_PRINTF is not set
+# CONFIG_TEST_BITMAP is not set
+# CONFIG_TEST_UUID is not set
# CONFIG_TEST_RHASHTABLE is not set
+# CONFIG_TEST_HASH is not set
# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set
# CONFIG_DMA_API_DEBUG is not set
# CONFIG_TEST_LKM is not set
@@ -7543,7 +7834,12 @@ CONFIG_TEST_KSTRTOX=m
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
+CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y
+# CONFIG_ARCH_WANTS_UBSAN_NO_NULL is not set
+# CONFIG_UBSAN is not set
+CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
CONFIG_STRICT_DEVMEM=y
+CONFIG_IO_STRICT_DEVMEM=y
# CONFIG_X86_VERBOSE_BOOTUP is not set
CONFIG_EARLY_PRINTK=y
# CONFIG_EARLY_PRINTK_DBGP is not set
@@ -7551,7 +7847,6 @@ CONFIG_EARLY_PRINTK_EFI=y
# CONFIG_X86_PTDUMP_CORE is not set
# CONFIG_X86_PTDUMP is not set
# CONFIG_EFI_PGT_DUMP is not set
-CONFIG_DEBUG_RODATA=y
# CONFIG_DEBUG_RODATA_TEST is not set
# CONFIG_DEBUG_WX is not set
CONFIG_DEBUG_SET_MODULE_RONX=y
@@ -7575,7 +7870,6 @@ CONFIG_DEFAULT_IO_DELAY_TYPE=0
# CONFIG_OPTIMIZE_INLINING is not set
# CONFIG_DEBUG_ENTRY is not set
# CONFIG_DEBUG_NMI_SELFTEST is not set
-# CONFIG_X86_DEBUG_STATIC_CPU_HAS is not set
# CONFIG_X86_DEBUG_FPU is not set
# CONFIG_PUNIT_ATOM_DEBUG is not set
@@ -7584,18 +7878,22 @@ CONFIG_DEFAULT_IO_DELAY_TYPE=0
#
CONFIG_KEYS=y
CONFIG_PERSISTENT_KEYRINGS=y
-CONFIG_BIG_KEYS=y
CONFIG_TRUSTED_KEYS=m
CONFIG_ENCRYPTED_KEYS=m
+CONFIG_KEY_DH_OPERATIONS=y
# CONFIG_SECURITY_DMESG_RESTRICT is not set
CONFIG_SECURITY=y
CONFIG_SECURITYFS=y
# CONFIG_SECURITY_NETWORK is not set
CONFIG_SECURITY_PATH=y
# CONFIG_INTEL_TXT is not set
+CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
+CONFIG_HAVE_ARCH_HARDENED_USERCOPY=y
+CONFIG_HARDENED_USERCOPY=y
# CONFIG_SECURITY_SMACK is not set
# CONFIG_SECURITY_TOMOYO is not set
# CONFIG_SECURITY_APPARMOR is not set
+# CONFIG_SECURITY_LOADPIN is not set
CONFIG_SECURITY_YAMA=y
CONFIG_INTEGRITY=y
# CONFIG_INTEGRITY_SIGNATURE is not set
@@ -7618,19 +7916,21 @@ CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=m
CONFIG_CRYPTO_AEAD2=y
-CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG=m
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=m
-CONFIG_CRYPTO_PCOMP=m
-CONFIG_CRYPTO_PCOMP2=y
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_AKCIPHER=m
+CONFIG_CRYPTO_KPP2=y
+CONFIG_CRYPTO_KPP=m
CONFIG_CRYPTO_RSA=m
-CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_DH=m
+CONFIG_CRYPTO_ECDH=m
+CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_USER=m
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
@@ -7661,7 +7961,7 @@ CONFIG_CRYPTO_ECHAINIV=m
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_CTR=m
CONFIG_CRYPTO_CTS=m
-CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_XTS=m
@@ -7695,6 +7995,7 @@ CONFIG_CRYPTO_RMD320=m
CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m
@@ -7730,7 +8031,6 @@ CONFIG_CRYPTO_TWOFISH_586=m
# Compression
#
CONFIG_CRYPTO_DEFLATE=m
-CONFIG_CRYPTO_ZLIB=m
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_842=m
CONFIG_CRYPTO_LZ4=m
@@ -7764,25 +8064,29 @@ CONFIG_CRYPTO_DEV_CCP_DD=m
CONFIG_CRYPTO_DEV_CCP_CRYPTO=m
CONFIG_CRYPTO_DEV_QAT=m
CONFIG_CRYPTO_DEV_QAT_DH895xCC=m
+CONFIG_CRYPTO_DEV_QAT_C3XXX=m
+CONFIG_CRYPTO_DEV_QAT_C62X=m
CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m
-CONFIG_ASYMMETRIC_KEY_TYPE=m
+CONFIG_CRYPTO_DEV_QAT_C3XXXVF=m
+CONFIG_CRYPTO_DEV_QAT_C62XVF=m
+CONFIG_CRYPTO_DEV_CHELSIO=m
+CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m
-CONFIG_PUBLIC_KEY_ALGO_RSA=m
CONFIG_X509_CERTIFICATE_PARSER=m
CONFIG_PKCS7_MESSAGE_PARSER=m
-CONFIG_PKCS7_TEST_KEY=m
#
# Certificates for signature checking
#
CONFIG_SYSTEM_TRUSTED_KEYRING=y
CONFIG_SYSTEM_TRUSTED_KEYS=""
+# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set
+CONFIG_SECONDARY_TRUSTED_KEYRING=y
CONFIG_HAVE_KVM=y
CONFIG_HAVE_KVM_IRQCHIP=y
CONFIG_HAVE_KVM_IRQFD=y
CONFIG_HAVE_KVM_IRQ_ROUTING=y
CONFIG_HAVE_KVM_EVENTFD=y
-CONFIG_KVM_APIC_ARCHITECTURE=y
CONFIG_KVM_MMIO=y
CONFIG_KVM_ASYNC_PF=y
CONFIG_HAVE_KVM_MSI=y
@@ -7796,6 +8100,11 @@ CONFIG_KVM_INTEL=m
CONFIG_KVM_AMD=m
CONFIG_KVM_MMU_AUDIT=y
CONFIG_KVM_DEVICE_ASSIGNMENT=y
+CONFIG_VHOST_NET=m
+CONFIG_VHOST_SCSI=m
+CONFIG_VHOST_VSOCK=m
+CONFIG_VHOST=m
+# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set
# CONFIG_LGUEST is not set
CONFIG_BINARY_PRINTF=y
@@ -7814,7 +8123,7 @@ CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IO=y
CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
-CONFIG_CRC_CCITT=m
+CONFIG_CRC_CCITT=y
CONFIG_CRC16=m
CONFIG_CRC_T10DIF=y
CONFIG_CRC_ITU_T=m
@@ -7854,18 +8163,16 @@ CONFIG_DECOMPRESS_XZ=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_REED_SOLOMON=m
+CONFIG_REED_SOLOMON=y
CONFIG_REED_SOLOMON_ENC8=y
CONFIG_REED_SOLOMON_DEC8=y
-CONFIG_REED_SOLOMON_DEC16=y
-CONFIG_BCH=m
-CONFIG_BCH_CONST_PARAMS=y
CONFIG_TEXTSEARCH=y
CONFIG_TEXTSEARCH_KMP=m
CONFIG_TEXTSEARCH_BM=m
CONFIG_TEXTSEARCH_FSM=m
CONFIG_BTREE=y
CONFIG_INTERVAL_TREE=y
+CONFIG_RADIX_TREE_MULTIORDER=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
@@ -7876,12 +8183,12 @@ CONFIG_DQL=y
CONFIG_GLOB=y
# CONFIG_GLOB_SELFTEST is not set
CONFIG_NLATTR=y
-CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_LRU_CACHE=m
CONFIG_CLZ_TAB=y
CONFIG_CORDIC=m
CONFIG_DDR=y
-CONFIG_MPILIB=m
+CONFIG_IRQ_POLL=y
+CONFIG_MPILIB=y
CONFIG_OID_REGISTRY=m
CONFIG_UCS2_STRING=y
CONFIG_FONT_SUPPORT=y
@@ -7899,5 +8206,7 @@ CONFIG_FONT_8x16=y
# CONFIG_FONT_10x18 is not set
CONFIG_FONT_AUTOSELECT=y
# CONFIG_SG_SPLIT is not set
+CONFIG_SG_POOL=y
CONFIG_ARCH_HAS_SG_CHAIN=y
CONFIG_ARCH_HAS_MMIO_FLUSH=y
+CONFIG_SBITMAP=y
diff --git a/config.x86_64 b/config.x86_64
index 6c87310edcd..3d53dd70763 100644
--- a/config.x86_64
+++ b/config.x86_64
@@ -1,18 +1,20 @@
#
# Automatically generated file; DO NOT EDIT.
-# Linux/x86 4.4.6-1 Kernel Configuration
+# Linux/x86 4.9.13-1 Kernel Configuration
#
CONFIG_64BIT=y
CONFIG_X86_64=y
CONFIG_X86=y
CONFIG_INSTRUCTION_DECODER=y
-CONFIG_PERF_EVENTS_INTEL_UNCORE=y
CONFIG_OUTPUT_FORMAT="elf64-x86-64"
CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig"
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_MMU=y
+CONFIG_ARCH_MMAP_RND_BITS_MIN=28
+CONFIG_ARCH_MMAP_RND_BITS_MAX=32
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_GENERIC_ISA_DMA=y
@@ -37,13 +39,14 @@ CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_HAVE_INTEL_TXT=y
CONFIG_X86_64_SMP=y
-CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-rdi -fcall-saved-rsi -fcall-saved-rdx -fcall-saved-rcx -fcall-saved-r8 -fcall-saved-r9 -fcall-saved-r10 -fcall-saved-r11"
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_DEBUG_RODATA=y
CONFIG_PGTABLE_LEVELS=4
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_EXTABLE_SORT=y
+CONFIG_THREAD_INFO_IN_TASK=y
#
# General setup
@@ -143,6 +146,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=19
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
+CONFIG_NMI_LOG_BUF_SHIFT=13
CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y
@@ -150,27 +154,26 @@ CONFIG_ARCH_SUPPORTS_INT128=y
CONFIG_NUMA_BALANCING=y
CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y
CONFIG_CGROUPS=y
-# CONFIG_CGROUP_DEBUG is not set
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_PIDS=y
-CONFIG_CGROUP_DEVICE=y
-CONFIG_CPUSETS=y
-CONFIG_PROC_PID_CPUSET=y
-CONFIG_CGROUP_CPUACCT=y
CONFIG_PAGE_COUNTER=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_MEMCG_SWAP_ENABLED=y
-CONFIG_MEMCG_KMEM=y
-# CONFIG_CGROUP_HUGETLB is not set
-# CONFIG_CGROUP_PERF is not set
+CONFIG_BLK_CGROUP=y
+# CONFIG_DEBUG_BLK_CGROUP is not set
+CONFIG_CGROUP_WRITEBACK=y
CONFIG_CGROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_CFS_BANDWIDTH=y
# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_BLK_CGROUP=y
-# CONFIG_DEBUG_BLK_CGROUP is not set
-CONFIG_CGROUP_WRITEBACK=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_FREEZER=y
+# CONFIG_CGROUP_HUGETLB is not set
+CONFIG_CPUSETS=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+# CONFIG_CGROUP_PERF is not set
+# CONFIG_CGROUP_DEBUG is not set
# CONFIG_CHECKPOINT_RESTORE is not set
CONFIG_NAMESPACES=y
CONFIG_UTS_NS=y
@@ -189,6 +192,7 @@ CONFIG_RD_LZMA=y
CONFIG_RD_XZ=y
CONFIG_RD_LZO=y
CONFIG_RD_LZ4=y
+CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
@@ -204,7 +208,10 @@ CONFIG_SYSFS_SYSCALL=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
+CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y
+CONFIG_KALLSYMS_BASE_RELATIVE=y
CONFIG_PRINTK=y
+CONFIG_PRINTK_NMI=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_PCSPKR_PLATFORM=y
@@ -234,6 +241,7 @@ CONFIG_SLUB_DEBUG=y
# CONFIG_COMPAT_BRK is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
+# CONFIG_SLAB_FREELIST_RANDOM is not set
CONFIG_SLUB_CPU_PARTIAL=y
# CONFIG_SYSTEM_DATA_VERIFICATION is not set
CONFIG_PROFILING=y
@@ -259,8 +267,8 @@ CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_KPROBES_ON_FTRACE=y
+CONFIG_HAVE_NMI=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
-CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y
@@ -282,11 +290,14 @@ CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_SECCOMP_FILTER=y
+CONFIG_HAVE_GCC_PLUGINS=y
+# CONFIG_GCC_PLUGINS is not set
CONFIG_HAVE_CC_STACKPROTECTOR=y
CONFIG_CC_STACKPROTECTOR=y
# CONFIG_CC_STACKPROTECTOR_NONE is not set
# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
CONFIG_CC_STACKPROTECTOR_STRONG=y
+CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
@@ -296,9 +307,20 @@ CONFIG_HAVE_ARCH_SOFT_DIRTY=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
+CONFIG_HAVE_EXIT_THREAD=y
+CONFIG_ARCH_MMAP_RND_BITS=28
+CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS=8
CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_HAVE_STACK_VALIDATION=y
+# CONFIG_HAVE_ARCH_HASH is not set
+# CONFIG_ISA_BUS_API is not set
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_COMPAT_OLD_SIGACTION=y
+# CONFIG_CPU_NO_EFFICIENT_FFS is not set
+CONFIG_HAVE_ARCH_VMAP_STACK=y
+CONFIG_VMAP_STACK=y
#
# GCOV-based kernel profiling
@@ -352,6 +374,7 @@ CONFIG_EFI_PARTITION=y
# CONFIG_SYSV68_PARTITION is not set
# CONFIG_CMDLINE_PARTITION is not set
CONFIG_BLOCK_COMPAT=y
+CONFIG_BLK_MQ_PCI=y
#
# IO Schedulers
@@ -388,12 +411,14 @@ CONFIG_FREEZER=y
CONFIG_ZONE_DMA=y
CONFIG_SMP=y
CONFIG_X86_FEATURE_NAMES=y
+CONFIG_X86_FAST_FEATURE_TESTS=y
CONFIG_X86_X2APIC=y
CONFIG_X86_MPPARSE=y
+# CONFIG_GOLDFISH is not set
# CONFIG_X86_EXTENDED_PLATFORM is not set
CONFIG_X86_INTEL_LPSS=y
# CONFIG_X86_AMD_PLATFORM_DEVICE is not set
-CONFIG_IOSF_MBI=m
+CONFIG_IOSF_MBI=y
# CONFIG_IOSF_MBI_DEBUG is not set
CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
@@ -452,6 +477,14 @@ CONFIG_X86_MCE_AMD=y
CONFIG_X86_MCE_THRESHOLD=y
# CONFIG_X86_MCE_INJECT is not set
CONFIG_X86_THERMAL_VECTOR=y
+
+#
+# Performance monitoring
+#
+CONFIG_PERF_EVENTS_INTEL_UNCORE=y
+CONFIG_PERF_EVENTS_INTEL_RAPL=m
+CONFIG_PERF_EVENTS_INTEL_CSTATE=m
+CONFIG_PERF_EVENTS_AMD_POWER=m
# CONFIG_VM86 is not set
CONFIG_X86_16BIT=y
CONFIG_X86_ESPFIX64=y
@@ -495,6 +528,7 @@ CONFIG_MEMORY_ISOLATION=y
CONFIG_HAVE_BOOTMEM_INFO_NODE=y
CONFIG_MEMORY_HOTPLUG=y
CONFIG_MEMORY_HOTPLUG_SPARSE=y
+CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y
CONFIG_MEMORY_HOTREMOVE=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
@@ -504,7 +538,6 @@ CONFIG_COMPACTION=y
CONFIG_MIGRATION=y
CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y
CONFIG_PHYS_ADDR_T_64BIT=y
-CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
CONFIG_MMU_NOTIFIER=y
@@ -516,12 +549,14 @@ CONFIG_HWPOISON_INJECT=m
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
+CONFIG_TRANSPARENT_HUGE_PAGECACHE=y
CONFIG_CLEANCACHE=y
CONFIG_FRONTSWAP=y
# CONFIG_CMA is not set
CONFIG_ZSWAP=y
CONFIG_ZPOOL=y
CONFIG_ZBUD=y
+CONFIG_Z3FOLD=y
CONFIG_ZSMALLOC=y
# CONFIG_PGTABLE_MAPPING is not set
# CONFIG_ZSMALLOC_STAT is not set
@@ -529,7 +564,10 @@ CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT=y
# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
# CONFIG_IDLE_PAGE_TRACKING is not set
+CONFIG_ZONE_DEVICE=y
CONFIG_FRAME_VECTOR=y
+CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y
+CONFIG_ARCH_HAS_PKEYS=y
CONFIG_X86_PMEM_LEGACY_DEVICE=y
CONFIG_X86_PMEM_LEGACY=y
CONFIG_X86_CHECK_BIOS_CORRUPTION=y
@@ -543,7 +581,8 @@ CONFIG_X86_PAT=y
CONFIG_ARCH_USES_PG_UNCACHED=y
CONFIG_ARCH_RANDOM=y
CONFIG_X86_SMAP=y
-# CONFIG_X86_INTEL_MPX is not set
+CONFIG_X86_INTEL_MPX=y
+CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y
CONFIG_EFI=y
CONFIG_EFI_STUB=y
CONFIG_EFI_MIXED=y
@@ -595,11 +634,12 @@ CONFIG_PM_DEBUG=y
CONFIG_PM_ADVANCED_DEBUG=y
# CONFIG_PM_TEST_SUSPEND is not set
CONFIG_PM_SLEEP_DEBUG=y
-# CONFIG_DPM_WATCHDOG is not set
CONFIG_PM_TRACE=y
CONFIG_PM_TRACE_RTC=y
CONFIG_PM_CLK=y
-# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
+CONFIG_PM_GENERIC_DOMAINS=y
+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
+CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
CONFIG_ACPI=y
CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y
CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y
@@ -616,15 +656,17 @@ CONFIG_ACPI_VIDEO=m
CONFIG_ACPI_FAN=m
CONFIG_ACPI_DOCK=y
CONFIG_ACPI_CPU_FREQ_PSS=y
+CONFIG_ACPI_PROCESSOR_CSTATE=y
CONFIG_ACPI_PROCESSOR_IDLE=y
-CONFIG_ACPI_PROCESSOR=m
+CONFIG_ACPI_PROCESSOR=y
CONFIG_ACPI_IPMI=m
CONFIG_ACPI_HOTPLUG_CPU=y
CONFIG_ACPI_PROCESSOR_AGGREGATOR=m
CONFIG_ACPI_THERMAL=m
CONFIG_ACPI_NUMA=y
# CONFIG_ACPI_CUSTOM_DSDT is not set
-CONFIG_ACPI_INITRD_TABLE_OVERRIDE=y
+CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y
+CONFIG_ACPI_TABLE_UPGRADE=y
# CONFIG_ACPI_DEBUG is not set
CONFIG_ACPI_PCI_SLOT=y
CONFIG_X86_PM_TIMER=y
@@ -646,27 +688,35 @@ CONFIG_ACPI_APEI_PCIEAER=y
CONFIG_ACPI_APEI_MEMORY_FAILURE=y
CONFIG_ACPI_APEI_EINJ=m
CONFIG_ACPI_APEI_ERST_DEBUG=m
+CONFIG_DPTF_POWER=m
+CONFIG_ACPI_WATCHDOG=y
CONFIG_ACPI_EXTLOG=m
-# CONFIG_PMIC_OPREGION is not set
+CONFIG_PMIC_OPREGION=y
+CONFIG_CRC_PMIC_OPREGION=y
+CONFIG_BXT_WC_PMIC_OPREGION=y
+CONFIG_ACPI_CONFIGFS=m
CONFIG_SFI=y
#
# CPU Frequency scaling
#
CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
-CONFIG_CPU_FREQ_STAT=m
+CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=m
CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=m
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
#
# CPU frequency scaling drivers
@@ -719,6 +769,8 @@ CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_PERFORMANCE is not set
CONFIG_PCIE_PME=y
+CONFIG_PCIE_DPC=y
+CONFIG_PCIE_PTM=y
CONFIG_PCI_BUS_ADDR_T_64BIT=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
@@ -732,10 +784,20 @@ CONFIG_PCI_IOV=y
CONFIG_PCI_PRI=y
CONFIG_PCI_PASID=y
CONFIG_PCI_LABEL=y
+CONFIG_PCI_HYPERV=m
+CONFIG_HOTPLUG_PCI=y
+CONFIG_HOTPLUG_PCI_ACPI=y
+CONFIG_HOTPLUG_PCI_ACPI_IBM=m
+CONFIG_HOTPLUG_PCI_CPCI=y
+CONFIG_HOTPLUG_PCI_CPCI_ZT5550=m
+CONFIG_HOTPLUG_PCI_CPCI_GENERIC=m
+CONFIG_HOTPLUG_PCI_SHPC=m
#
# PCI host controller drivers
#
+# CONFIG_PCIE_DW_PLAT is not set
+CONFIG_VMD=m
CONFIG_ISA_DMA_API=y
CONFIG_AMD_NB=y
CONFIG_PCCARD=m
@@ -755,28 +817,7 @@ CONFIG_YENTA_TOSHIBA=y
CONFIG_PD6729=m
CONFIG_I82092=m
CONFIG_PCCARD_NONSTATIC=y
-CONFIG_HOTPLUG_PCI=y
-CONFIG_HOTPLUG_PCI_ACPI=y
-CONFIG_HOTPLUG_PCI_ACPI_IBM=m
-CONFIG_HOTPLUG_PCI_CPCI=y
-CONFIG_HOTPLUG_PCI_CPCI_ZT5550=m
-CONFIG_HOTPLUG_PCI_CPCI_GENERIC=m
-CONFIG_HOTPLUG_PCI_SHPC=m
-CONFIG_RAPIDIO=m
-CONFIG_RAPIDIO_TSI721=m
-CONFIG_RAPIDIO_DISC_TIMEOUT=30
-# CONFIG_RAPIDIO_ENABLE_RX_TX_PORTS is not set
-CONFIG_RAPIDIO_DMA_ENGINE=y
-CONFIG_RAPIDIO_DEBUG=y
-CONFIG_RAPIDIO_ENUM_BASIC=m
-
-#
-# RapidIO Switch drivers
-#
-CONFIG_RAPIDIO_TSI57X=m
-CONFIG_RAPIDIO_CPS_XX=m
-CONFIG_RAPIDIO_TSI568=m
-CONFIG_RAPIDIO_CPS_GEN2=m
+# CONFIG_RAPIDIO is not set
# CONFIG_X86_SYSFB is not set
#
@@ -784,6 +825,7 @@ CONFIG_RAPIDIO_CPS_GEN2=m
#
CONFIG_BINFMT_ELF=y
CONFIG_COMPAT_BINFMT_ELF=y
+CONFIG_ELFCORE=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_BINFMT_SCRIPT=y
# CONFIG_HAVE_AOUT is not set
@@ -801,6 +843,7 @@ CONFIG_PMC_ATOM=y
CONFIG_NET=y
CONFIG_COMPAT_NETLINK_MESSAGES=y
CONFIG_NET_INGRESS=y
+CONFIG_NET_EGRESS=y
#
# Networking options
@@ -849,10 +892,10 @@ CONFIG_INET_TUNNEL=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m
CONFIG_INET_XFRM_MODE_BEET=m
-CONFIG_INET_LRO=y
CONFIG_INET_DIAG=m
CONFIG_INET_TCP_DIAG=m
CONFIG_INET_UDP_DIAG=m
+CONFIG_INET_DIAG_DESTROY=y
CONFIG_TCP_CONG_ADVANCED=y
CONFIG_TCP_CONG_BIC=m
CONFIG_TCP_CONG_CUBIC=y
@@ -861,6 +904,7 @@ CONFIG_TCP_CONG_HTCP=m
CONFIG_TCP_CONG_HSTCP=m
CONFIG_TCP_CONG_HYBLA=m
CONFIG_TCP_CONG_VEGAS=m
+CONFIG_TCP_CONG_NV=m
CONFIG_TCP_CONG_SCALABLE=m
CONFIG_TCP_CONG_LP=m
CONFIG_TCP_CONG_VENO=m
@@ -868,6 +912,7 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_CONG_ILLINOIS=m
CONFIG_TCP_CONG_DCTCP=m
CONFIG_TCP_CONG_CDG=m
+CONFIG_TCP_CONG_BBR=m
CONFIG_DEFAULT_CUBIC=y
# CONFIG_DEFAULT_RENO is not set
CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -893,6 +938,8 @@ CONFIG_IPV6_SIT_6RD=y
CONFIG_IPV6_NDISC_NODETYPE=y
CONFIG_IPV6_TUNNEL=m
CONFIG_IPV6_GRE=m
+CONFIG_IPV6_FOU=m
+CONFIG_IPV6_FOU_TUNNEL=m
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
CONFIG_IPV6_MROUTE=y
@@ -961,9 +1008,10 @@ CONFIG_NF_TABLES_INET=m
CONFIG_NF_TABLES_NETDEV=m
CONFIG_NFT_EXTHDR=m
CONFIG_NFT_META=m
+CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m
-CONFIG_NFT_RBTREE=m
-CONFIG_NFT_HASH=m
+CONFIG_NFT_SET_RBTREE=m
+CONFIG_NFT_SET_HASH=m
CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m
@@ -971,9 +1019,14 @@ CONFIG_NFT_MASQ=m
CONFIG_NFT_REDIR=m
CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m
+CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
CONFIG_NFT_REJECT_INET=m
CONFIG_NFT_COMPAT=m
+CONFIG_NFT_HASH=m
+CONFIG_NF_DUP_NETDEV=m
+CONFIG_NFT_DUP_NETDEV=m
+CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XTABLES=m
#
@@ -1126,7 +1179,6 @@ CONFIG_IP_VS_PE_SIP=m
#
CONFIG_NF_DEFRAG_IPV4=m
CONFIG_NF_CONNTRACK_IPV4=m
-# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
CONFIG_NF_TABLES_IPV4=m
CONFIG_NFT_CHAIN_ROUTE_IPV4=m
CONFIG_NFT_REJECT_IPV4=m
@@ -1253,6 +1305,7 @@ CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1=y
# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set
CONFIG_SCTP_COOKIE_HMAC_MD5=y
CONFIG_SCTP_COOKIE_HMAC_SHA1=y
+CONFIG_INET_SCTP_DIAG=m
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
CONFIG_ATM=m
@@ -1279,6 +1332,7 @@ CONFIG_NET_DSA_TAG_BRCM=y
CONFIG_NET_DSA_TAG_DSA=y
CONFIG_NET_DSA_TAG_EDSA=y
CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_NET_DSA_TAG_QCA=y
CONFIG_VLAN_8021Q=m
# CONFIG_VLAN_8021Q_GVRP is not set
CONFIG_VLAN_8021Q_MVRP=y
@@ -1291,6 +1345,7 @@ CONFIG_LLC2=m
# CONFIG_LAPB is not set
CONFIG_PHONET=m
CONFIG_6LOWPAN=m
+# CONFIG_6LOWPAN_DEBUGFS is not set
CONFIG_6LOWPAN_NHC=m
CONFIG_6LOWPAN_NHC_DEST=m
CONFIG_6LOWPAN_NHC_FRAGMENT=m
@@ -1299,6 +1354,12 @@ CONFIG_6LOWPAN_NHC_IPV6=m
CONFIG_6LOWPAN_NHC_MOBILITY=m
CONFIG_6LOWPAN_NHC_ROUTING=m
CONFIG_6LOWPAN_NHC_UDP=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
+CONFIG_6LOWPAN_GHC_UDP=m
+CONFIG_6LOWPAN_GHC_ICMPV6=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_IEEE802154=m
CONFIG_IEEE802154_NL802154_EXPERIMENTAL=y
CONFIG_IEEE802154_SOCKET=m
@@ -1352,7 +1413,16 @@ CONFIG_NET_CLS_FLOW=m
CONFIG_NET_CLS_CGROUP=m
CONFIG_NET_CLS_BPF=m
CONFIG_NET_CLS_FLOWER=m
-# CONFIG_NET_EMATCH is not set
+CONFIG_NET_CLS_MATCHALL=m
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_STACK=32
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_EMATCH_META=m
+CONFIG_NET_EMATCH_TEXT=m
+CONFIG_NET_EMATCH_CANID=m
+CONFIG_NET_EMATCH_IPSET=m
CONFIG_NET_CLS_ACT=y
CONFIG_NET_ACT_POLICE=m
CONFIG_NET_ACT_GACT=m
@@ -1367,15 +1437,23 @@ CONFIG_NET_ACT_CSUM=m
CONFIG_NET_ACT_VLAN=m
CONFIG_NET_ACT_BPF=m
CONFIG_NET_ACT_CONNMARK=m
+CONFIG_NET_ACT_SKBMOD=m
+CONFIG_NET_ACT_IFE=m
+CONFIG_NET_ACT_TUNNEL_KEY=m
+CONFIG_NET_IFE_SKBMARK=m
+CONFIG_NET_IFE_SKBPRIO=m
+CONFIG_NET_IFE_SKBTCINDEX=m
CONFIG_NET_CLS_IND=y
CONFIG_NET_SCH_FIFO=y
# CONFIG_DCB is not set
CONFIG_DNS_RESOLVER=m
CONFIG_BATMAN_ADV=m
+CONFIG_BATMAN_ADV_BATMAN_V=y
CONFIG_BATMAN_ADV_BLA=y
CONFIG_BATMAN_ADV_DAT=y
CONFIG_BATMAN_ADV_NC=y
CONFIG_BATMAN_ADV_MCAST=y
+CONFIG_BATMAN_ADV_DEBUGFS=y
# CONFIG_BATMAN_ADV_DEBUG is not set
CONFIG_OPENVSWITCH=m
CONFIG_OPENVSWITCH_GRE=m
@@ -1383,7 +1461,8 @@ CONFIG_OPENVSWITCH_VXLAN=m
CONFIG_OPENVSWITCH_GENEVE=m
CONFIG_VSOCKETS=m
CONFIG_VMWARE_VMCI_VSOCKETS=m
-CONFIG_NETLINK_MMAP=y
+CONFIG_VIRTIO_VSOCKETS=m
+CONFIG_VIRTIO_VSOCKETS_COMMON=m
CONFIG_NETLINK_DIAG=m
CONFIG_MPLS=y
CONFIG_NET_MPLS_GSO=m
@@ -1392,9 +1471,11 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_HSR=m
CONFIG_NET_SWITCHDEV=y
CONFIG_NET_L3_MASTER_DEV=y
+CONFIG_NET_NCSI=y
CONFIG_RPS=y
CONFIG_RFS_ACCEL=y
CONFIG_XPS=y
+CONFIG_SOCK_CGROUP_DATA=y
# CONFIG_CGROUP_NET_PRIO is not set
CONFIG_CGROUP_NET_CLASSID=y
CONFIG_NET_RX_BUSY_POLL=y
@@ -1441,6 +1522,14 @@ CONFIG_CAN_SLCAN=m
CONFIG_CAN_DEV=m
CONFIG_CAN_CALC_BITTIMING=y
CONFIG_CAN_LEDS=y
+CONFIG_CAN_C_CAN=m
+CONFIG_CAN_C_CAN_PLATFORM=m
+CONFIG_CAN_C_CAN_PCI=m
+CONFIG_CAN_CC770=m
+# CONFIG_CAN_CC770_ISA is not set
+CONFIG_CAN_CC770_PLATFORM=m
+CONFIG_CAN_IFI_CANFD=m
+CONFIG_CAN_M_CAN=m
CONFIG_CAN_SJA1000=m
# CONFIG_CAN_SJA1000_ISA is not set
CONFIG_CAN_SJA1000_PLATFORM=m
@@ -1451,13 +1540,8 @@ CONFIG_CAN_PEAK_PCI=m
CONFIG_CAN_PEAK_PCIEC=y
CONFIG_CAN_KVASER_PCI=m
CONFIG_CAN_PLX_PCI=m
-CONFIG_CAN_C_CAN=m
-CONFIG_CAN_C_CAN_PLATFORM=m
-CONFIG_CAN_C_CAN_PCI=m
-CONFIG_CAN_M_CAN=m
-CONFIG_CAN_CC770=m
-# CONFIG_CAN_CC770_ISA is not set
-CONFIG_CAN_CC770_PLATFORM=m
+CONFIG_CAN_SOFTING=m
+# CONFIG_CAN_SOFTING_CS is not set
#
# CAN SPI interfaces
@@ -1473,8 +1557,6 @@ CONFIG_CAN_GS_USB=m
CONFIG_CAN_KVASER_USB=m
CONFIG_CAN_PEAK_USB=m
CONFIG_CAN_8DEV_USB=m
-CONFIG_CAN_SOFTING=m
-# CONFIG_CAN_SOFTING_CS is not set
# CONFIG_CAN_DEBUG_DEVICES is not set
CONFIG_IRDA=m
@@ -1544,6 +1626,7 @@ CONFIG_BT_HIDP=m
CONFIG_BT_HS=y
CONFIG_BT_LE=y
CONFIG_BT_6LOWPAN=m
+CONFIG_BT_LEDS=y
# CONFIG_BT_SELFTEST is not set
CONFIG_BT_DEBUGFS=y
@@ -1567,6 +1650,8 @@ CONFIG_BT_HCIUART_3WIRE=y
CONFIG_BT_HCIUART_INTEL=y
CONFIG_BT_HCIUART_BCM=y
CONFIG_BT_HCIUART_QCA=y
+CONFIG_BT_HCIUART_AG6XX=y
+CONFIG_BT_HCIUART_MRVL=y
CONFIG_BT_HCIBCM203X=m
CONFIG_BT_HCIBPA10X=m
CONFIG_BT_HCIBFUSB=m
@@ -1580,8 +1665,12 @@ CONFIG_BT_MRVL_SDIO=m
CONFIG_BT_ATH3K=m
CONFIG_BT_WILINK=m
CONFIG_AF_RXRPC=m
+CONFIG_AF_RXRPC_IPV6=y
+# CONFIG_AF_RXRPC_INJECT_LOSS is not set
# CONFIG_AF_RXRPC_DEBUG is not set
-CONFIG_RXKAD=m
+CONFIG_RXKAD=y
+CONFIG_AF_KCM=m
+CONFIG_STREAM_PARSER=m
CONFIG_FIB_RULES=y
CONFIG_WIRELESS=y
CONFIG_WIRELESS_EXT=y
@@ -1592,7 +1681,6 @@ CONFIG_WEXT_PRIV=y
CONFIG_CFG80211=m
# CONFIG_NL80211_TESTMODE is not set
# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
-# CONFIG_CFG80211_REG_DEBUG is not set
CONFIG_CFG80211_DEFAULT_PS=y
# CONFIG_CFG80211_DEBUGFS is not set
# CONFIG_CFG80211_INTERNAL_REGDB is not set
@@ -1645,7 +1733,6 @@ CONFIG_NFC_HCI=m
#
# Near Field Communication (NFC) devices
#
-CONFIG_NFC_PN533=m
CONFIG_NFC_WILINK=m
CONFIG_NFC_TRF7970A=m
CONFIG_NFC_MEI_PHY=m
@@ -1655,19 +1742,25 @@ CONFIG_NFC_FDP=m
CONFIG_NFC_FDP_I2C=m
CONFIG_NFC_PN544=m
CONFIG_NFC_PN544_MEI=m
+CONFIG_NFC_PN533=m
+CONFIG_NFC_PN533_USB=m
+CONFIG_NFC_PN533_I2C=m
CONFIG_NFC_MICROREAD=m
CONFIG_NFC_MICROREAD_MEI=m
CONFIG_NFC_MRVL=m
CONFIG_NFC_MRVL_USB=m
CONFIG_NFC_MRVL_I2C=m
-CONFIG_NFC_ST21NFCA=m
CONFIG_NFC_ST_NCI=m
CONFIG_NFC_ST_NCI_I2C=m
# CONFIG_NFC_ST_NCI_SPI is not set
# CONFIG_NFC_NXP_NCI is not set
# CONFIG_NFC_S3FWRN5_I2C is not set
+# CONFIG_NFC_ST95HF is not set
CONFIG_LWTUNNEL=y
-CONFIG_HAVE_BPF_JIT=y
+CONFIG_DST_CACHE=y
+CONFIG_NET_DEVLINK=m
+CONFIG_MAY_USE_DEVLINK=m
+CONFIG_HAVE_EBPF_JIT=y
#
# Device Drivers
@@ -1691,12 +1784,13 @@ CONFIG_ALLOW_DEV_COREDUMP=y
CONFIG_DEV_COREDUMP=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
CONFIG_SYS_HYPERVISOR=y
# CONFIG_GENERIC_CPU_DEVICES is not set
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
-CONFIG_REGMAP_SPI=m
+CONFIG_REGMAP_SPI=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_IRQ=y
CONFIG_DMA_SHARED_BUFFER=y
@@ -1797,31 +1891,8 @@ CONFIG_MTD_BLOCK2MTD=m
#
# Disk-On-Chip Device Drivers
#
-CONFIG_MTD_DOCG3=m
-CONFIG_BCH_CONST_M=14
-CONFIG_BCH_CONST_T=4
-CONFIG_MTD_NAND_ECC=m
-CONFIG_MTD_NAND_ECC_SMC=y
-CONFIG_MTD_NAND=m
-# CONFIG_MTD_NAND_ECC_BCH is not set
-CONFIG_MTD_SM_COMMON=m
-CONFIG_MTD_NAND_DENALI=m
-CONFIG_MTD_NAND_DENALI_PCI=m
-CONFIG_MTD_NAND_DENALI_DT=m
-CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xFF108018
-CONFIG_MTD_NAND_GPIO=m
-# CONFIG_MTD_NAND_OMAP_BCH_BUILD is not set
-CONFIG_MTD_NAND_IDS=m
-CONFIG_MTD_NAND_RICOH=m
-CONFIG_MTD_NAND_DISKONCHIP=m
-# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
-CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
-# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
-CONFIG_MTD_NAND_DOCG4=m
-CONFIG_MTD_NAND_CAFE=m
-CONFIG_MTD_NAND_NANDSIM=m
-# CONFIG_MTD_NAND_PLATFORM is not set
-# CONFIG_MTD_NAND_HISI504 is not set
+# CONFIG_MTD_DOCG3 is not set
+# CONFIG_MTD_NAND is not set
# CONFIG_MTD_ONENAND is not set
#
@@ -1861,7 +1932,6 @@ CONFIG_BLK_DEV_FD=m
# CONFIG_PARIDE is not set
CONFIG_BLK_DEV_PCIESSD_MTIP32XX=m
CONFIG_ZRAM=m
-CONFIG_ZRAM_LZ4_COMPRESS=y
CONFIG_BLK_CPQ_CISS_DA=m
# CONFIG_CISS_SCSI_TAPE is not set
CONFIG_BLK_DEV_DAC960=m
@@ -1889,7 +1959,14 @@ CONFIG_VIRTIO_BLK=m
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_RBD=m
CONFIG_BLK_DEV_RSXX=m
-CONFIG_BLK_DEV_NVME=y
+CONFIG_NVME_CORE=m
+CONFIG_BLK_DEV_NVME=m
+# CONFIG_BLK_DEV_NVME_SCSI is not set
+CONFIG_NVME_FABRICS=m
+CONFIG_NVME_RDMA=m
+CONFIG_NVME_TARGET=m
+CONFIG_NVME_TARGET_LOOP=m
+CONFIG_NVME_TARGET_RDMA=m
#
# Misc devices
@@ -1911,19 +1988,16 @@ CONFIG_APDS9802ALS=m
CONFIG_ISL29003=m
CONFIG_ISL29020=m
CONFIG_SENSORS_TSL2550=m
-CONFIG_SENSORS_BH1780=m
CONFIG_SENSORS_BH1770=m
CONFIG_SENSORS_APDS990X=m
CONFIG_HMC6352=m
CONFIG_DS1682=m
# CONFIG_TI_DAC7512 is not set
CONFIG_VMWARE_BALLOON=m
-CONFIG_BMP085=y
-CONFIG_BMP085_I2C=m
-# CONFIG_BMP085_SPI is not set
CONFIG_USB_SWITCH_FSA9480=m
# CONFIG_LATTICE_ECP3_CONFIG is not set
# CONFIG_SRAM is not set
+# CONFIG_PANEL is not set
CONFIG_C2PORT=m
CONFIG_C2PORT_DURAMAR_2150=m
@@ -1953,6 +2027,7 @@ CONFIG_ALTERA_STAPL=m
CONFIG_INTEL_MEI=m
CONFIG_INTEL_MEI_ME=m
CONFIG_INTEL_MEI_TXE=m
+CONFIG_INTEL_IPTS=m
CONFIG_VMWARE_VMCI=m
#
@@ -1966,6 +2041,11 @@ CONFIG_INTEL_MIC_BUS=m
CONFIG_SCIF_BUS=m
#
+# VOP Bus Driver
+#
+CONFIG_VOP_BUS=m
+
+#
# Intel MIC Host Driver
#
CONFIG_INTEL_MIC_HOST=m
@@ -1984,12 +2064,17 @@ CONFIG_SCIF=m
# Intel MIC Coprocessor State Management (COSM) Drivers
#
CONFIG_MIC_COSM=m
+
+#
+# VOP Driver
+#
+CONFIG_VOP=m
+CONFIG_VHOST_RING=m
CONFIG_GENWQE=m
CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY=0
CONFIG_ECHO=m
# CONFIG_CXL_BASE is not set
-# CONFIG_CXL_KERNEL_API is not set
-# CONFIG_CXL_EEH is not set
+# CONFIG_CXL_AFU_DRIVER_OPS is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
@@ -2075,9 +2160,12 @@ CONFIG_SCSI_MPT3SAS=m
CONFIG_SCSI_MPT2SAS_MAX_SGE=128
CONFIG_SCSI_MPT3SAS_MAX_SGE=128
CONFIG_SCSI_MPT2SAS=m
+CONFIG_SCSI_SMARTPQI=m
CONFIG_SCSI_UFSHCD=m
CONFIG_SCSI_UFSHCD_PCI=m
+# CONFIG_SCSI_UFS_DWC_TC_PCI is not set
CONFIG_SCSI_UFSHCD_PLATFORM=m
+# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set
CONFIG_SCSI_HPTIOP=m
CONFIG_SCSI_BUSLOGIC=m
CONFIG_SCSI_FLASHPOINT=y
@@ -2117,6 +2205,7 @@ CONFIG_SCSI_IPR=m
CONFIG_SCSI_QLOGIC_1280=m
CONFIG_SCSI_QLA_FC=m
CONFIG_TCM_QLA2XXX=m
+# CONFIG_TCM_QLA2XXX_DEBUG is not set
CONFIG_SCSI_QLA_ISCSI=m
CONFIG_SCSI_LPFC=m
# CONFIG_SCSI_LPFC_DEBUG_FS is not set
@@ -2172,6 +2261,9 @@ CONFIG_ATA_BMDMA=y
# SATA SFF controllers with BMDMA
#
CONFIG_ATA_PIIX=m
+CONFIG_SATA_DWC=m
+# CONFIG_SATA_DWC_OLD_DMA is not set
+# CONFIG_SATA_DWC_DEBUG is not set
CONFIG_SATA_MV=m
CONFIG_SATA_NV=m
CONFIG_SATA_PROMISE=m
@@ -2254,14 +2346,13 @@ CONFIG_BLK_DEV_DM=m
# CONFIG_DM_MQ_DEFAULT is not set
# CONFIG_DM_DEBUG is not set
CONFIG_DM_BUFIO=m
+# CONFIG_DM_DEBUG_BLOCK_STACK_TRACING is not set
CONFIG_DM_BIO_PRISON=m
CONFIG_DM_PERSISTENT_DATA=m
-# CONFIG_DM_DEBUG_BLOCK_STACK_TRACING is not set
CONFIG_DM_CRYPT=m
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_THIN_PROVISIONING=m
CONFIG_DM_CACHE=m
-CONFIG_DM_CACHE_MQ=m
CONFIG_DM_CACHE_SMQ=m
CONFIG_DM_CACHE_CLEANER=m
CONFIG_DM_ERA=m
@@ -2276,6 +2367,7 @@ CONFIG_DM_DELAY=m
CONFIG_DM_UEVENT=y
CONFIG_DM_FLAKEY=m
CONFIG_DM_VERITY=m
+CONFIG_DM_VERITY_FEC=y
CONFIG_DM_SWITCH=m
CONFIG_DM_LOG_WRITES=m
CONFIG_TARGET_CORE=m
@@ -2286,6 +2378,7 @@ CONFIG_TCM_USER2=m
CONFIG_LOOPBACK_TARGET=m
CONFIG_TCM_FC=m
CONFIG_ISCSI_TARGET=m
+CONFIG_ISCSI_TARGET_CXGB4=m
CONFIG_SBP_TARGET=m
CONFIG_FUSION=y
CONFIG_FUSION_SPI=m
@@ -2324,13 +2417,12 @@ CONFIG_MACVTAP=m
CONFIG_IPVLAN=m
CONFIG_VXLAN=m
CONFIG_GENEVE=m
+CONFIG_GTP=m
+CONFIG_MACSEC=m
CONFIG_NETCONSOLE=m
CONFIG_NETCONSOLE_DYNAMIC=y
CONFIG_NETPOLL=y
CONFIG_NET_POLL_CONTROLLER=y
-CONFIG_RIONET=m
-CONFIG_RIONET_TX_SIZE=128
-CONFIG_RIONET_RX_SIZE=128
CONFIG_TUN=m
# CONFIG_TUN_VNET_CROSS_LE is not set
CONFIG_VETH=m
@@ -2378,23 +2470,20 @@ CONFIG_CAIF_SPI_SLAVE=m
CONFIG_CAIF_SPI_SYNC=y
CONFIG_CAIF_HSI=m
CONFIG_CAIF_VIRTIO=m
-CONFIG_VHOST_NET=m
-CONFIG_VHOST_SCSI=m
-CONFIG_VHOST_RING=m
-CONFIG_VHOST=m
-# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set
#
# Distributed Switch Architecture drivers
#
-CONFIG_NET_DSA_MV88E6XXX=m
CONFIG_NET_DSA_MV88E6060=m
-CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y
-CONFIG_NET_DSA_MV88E6131=m
-CONFIG_NET_DSA_MV88E6123_61_65=m
-CONFIG_NET_DSA_MV88E6171=m
-CONFIG_NET_DSA_MV88E6352=m
CONFIG_NET_DSA_BCM_SF2=m
+CONFIG_B53=m
+CONFIG_B53_SPI_DRIVER=m
+CONFIG_B53_MDIO_DRIVER=m
+CONFIG_B53_MMAP_DRIVER=m
+CONFIG_B53_SRAB_DRIVER=m
+CONFIG_NET_DSA_MV88E6XXX=m
+CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y
+CONFIG_NET_DSA_QCA8K=m
CONFIG_ETHERNET=y
CONFIG_MDIO=m
CONFIG_NET_VENDOR_3COM=y
@@ -2410,6 +2499,8 @@ CONFIG_NET_VENDOR_ALTEON=y
CONFIG_ACENIC=m
# CONFIG_ACENIC_OMIT_TIGON_I is not set
CONFIG_ALTERA_TSE=m
+CONFIG_NET_VENDOR_AMAZON=y
+CONFIG_ENA_ETHERNET=m
CONFIG_NET_VENDOR_AMD=y
CONFIG_AMD8111_ETH=m
CONFIG_PCNET32=m
@@ -2436,7 +2527,6 @@ CONFIG_CNIC=m
CONFIG_TIGON3=m
CONFIG_BNX2X=m
CONFIG_BNX2X_SRIOV=y
-CONFIG_BNX2X_VXLAN=y
CONFIG_BNXT=m
CONFIG_BNXT_SRIOV=y
CONFIG_NET_VENDOR_BROCADE=y
@@ -2448,6 +2538,7 @@ CONFIG_CHELSIO_T1_1G=y
CONFIG_CHELSIO_T3=m
CONFIG_CHELSIO_T4=m
CONFIG_CHELSIO_T4VF=m
+CONFIG_CHELSIO_LIB=m
CONFIG_NET_VENDOR_CISCO=y
CONFIG_ENIC=m
CONFIG_CX_ECAT=m
@@ -2472,7 +2563,6 @@ CONFIG_SUNDANCE=m
CONFIG_NET_VENDOR_EMULEX=y
CONFIG_BE2NET=m
CONFIG_BE2NET_HWMON=y
-CONFIG_BE2NET_VXLAN=y
# CONFIG_NET_VENDOR_EZCHIP is not set
CONFIG_NET_VENDOR_EXAR=y
CONFIG_S2IO=m
@@ -2486,25 +2576,24 @@ CONFIG_NET_VENDOR_INTEL=y
CONFIG_E100=m
CONFIG_E1000=m
CONFIG_E1000E=m
+CONFIG_E1000E_HWTS=y
CONFIG_IGB=m
CONFIG_IGB_HWMON=y
CONFIG_IGB_DCA=y
CONFIG_IGBVF=m
CONFIG_IXGB=m
CONFIG_IXGBE=m
-CONFIG_IXGBE_VXLAN=y
CONFIG_IXGBE_HWMON=y
CONFIG_IXGBE_DCA=y
CONFIG_IXGBEVF=m
CONFIG_I40E=m
-CONFIG_I40E_VXLAN=y
CONFIG_I40EVF=m
CONFIG_FM10K=m
-# CONFIG_FM10K_VXLAN is not set
CONFIG_NET_VENDOR_I825XX=y
CONFIG_JME=m
CONFIG_NET_VENDOR_MARVELL=y
CONFIG_MVMDIO=m
+# CONFIG_MVNETA_BM is not set
CONFIG_SKGE=m
# CONFIG_SKGE_DEBUG is not set
CONFIG_SKGE_GENESIS=y
@@ -2512,12 +2601,12 @@ CONFIG_SKY2=m
# CONFIG_SKY2_DEBUG is not set
CONFIG_NET_VENDOR_MELLANOX=y
CONFIG_MLX4_EN=m
-CONFIG_MLX4_EN_VXLAN=y
CONFIG_MLX4_CORE=m
CONFIG_MLX4_DEBUG=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_CORE_EN=y
CONFIG_MLXSW_CORE=m
+CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_PCI=m
CONFIG_MLXSW_SWITCHX2=m
CONFIG_MLXSW_SPECTRUM=m
@@ -2537,6 +2626,9 @@ CONFIG_FEALNX=m
CONFIG_NET_VENDOR_NATSEMI=y
CONFIG_NATSEMI=m
CONFIG_NS83820=m
+CONFIG_NET_VENDOR_NETRONOME=y
+CONFIG_NFP_NETVF=m
+# CONFIG_NFP_NET_DEBUG is not set
CONFIG_NET_VENDOR_8390=y
CONFIG_PCMCIA_AXNET=m
CONFIG_NE2K_PCI=m
@@ -2552,13 +2644,14 @@ CONFIG_NET_VENDOR_QLOGIC=y
CONFIG_QLA3XXX=m
CONFIG_QLCNIC=m
CONFIG_QLCNIC_SRIOV=y
-CONFIG_QLCNIC_VXLAN=y
CONFIG_QLCNIC_HWMON=y
CONFIG_QLGE=m
CONFIG_NETXEN_NIC=m
CONFIG_QED=m
+CONFIG_QED_SRIOV=y
CONFIG_QEDE=m
CONFIG_NET_VENDOR_QUALCOMM=y
+CONFIG_QCOM_EMAC=m
CONFIG_NET_VENDOR_REALTEK=y
CONFIG_ATP=m
CONFIG_8139CP=m
@@ -2617,45 +2710,56 @@ CONFIG_WIZNET_W5300=m
# CONFIG_WIZNET_BUS_DIRECT is not set
# CONFIG_WIZNET_BUS_INDIRECT is not set
CONFIG_WIZNET_BUS_ANY=y
+CONFIG_WIZNET_W5100_SPI=m
CONFIG_NET_VENDOR_XIRCOM=y
CONFIG_PCMCIA_XIRC2PS=m
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
CONFIG_NET_SB1000=m
CONFIG_PHYLIB=m
+CONFIG_SWPHY=y
+
+#
+# MDIO bus device drivers
+#
+CONFIG_MDIO_BCM_UNIMAC=m
+CONFIG_MDIO_BITBANG=m
+CONFIG_MDIO_CAVIUM=m
+# CONFIG_MDIO_GPIO is not set
+CONFIG_MDIO_OCTEON=m
+# CONFIG_MDIO_THUNDER is not set
#
# MII PHY device drivers
#
+CONFIG_AMD_PHY=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AT803X_PHY=m
-CONFIG_AMD_PHY=m
-CONFIG_MARVELL_PHY=m
-CONFIG_DAVICOM_PHY=m
-CONFIG_QSEMI_PHY=m
-CONFIG_LXT_PHY=m
-CONFIG_CICADA_PHY=m
-CONFIG_VITESSE_PHY=m
-CONFIG_TERANETICS_PHY=m
-CONFIG_SMSC_PHY=m
-CONFIG_BCM_NET_PHYLIB=m
-CONFIG_BROADCOM_PHY=m
CONFIG_BCM7XXX_PHY=m
CONFIG_BCM87XX_PHY=m
+CONFIG_BCM_NET_PHYLIB=m
+CONFIG_BROADCOM_PHY=m
+CONFIG_CICADA_PHY=m
+CONFIG_DAVICOM_PHY=m
+CONFIG_DP83848_PHY=m
+CONFIG_DP83867_PHY=m
+CONFIG_FIXED_PHY=m
CONFIG_ICPLUS_PHY=m
-CONFIG_REALTEK_PHY=m
-CONFIG_NATIONAL_PHY=m
-CONFIG_STE10XP=m
+CONFIG_INTEL_XWAY_PHY=m
CONFIG_LSI_ET1011C_PHY=m
+CONFIG_LXT_PHY=m
+CONFIG_MARVELL_PHY=m
CONFIG_MICREL_PHY=m
-CONFIG_DP83848_PHY=m
-CONFIG_DP83867_PHY=m
CONFIG_MICROCHIP_PHY=m
-CONFIG_FIXED_PHY=m
-CONFIG_MDIO_BITBANG=m
-# CONFIG_MDIO_GPIO is not set
-CONFIG_MDIO_OCTEON=m
-CONFIG_MDIO_BCM_UNIMAC=m
+CONFIG_MICROSEMI_PHY=m
+CONFIG_NATIONAL_PHY=m
+CONFIG_QSEMI_PHY=m
+CONFIG_REALTEK_PHY=m
+CONFIG_SMSC_PHY=m
+CONFIG_STE10XP=m
+CONFIG_TERANETICS_PHY=m
+CONFIG_VITESSE_PHY=m
+CONFIG_XILINX_GMII2RGMII=m
# CONFIG_MICREL_KS8995MA is not set
CONFIG_PLIP=m
CONFIG_PPP=m
@@ -2704,6 +2808,7 @@ CONFIG_USB_NET_NET1080=m
CONFIG_USB_NET_PLUSB=m
CONFIG_USB_NET_MCS7830=m
CONFIG_USB_NET_RNDIS_HOST=m
+CONFIG_USB_NET_CDC_SUBSET_ENABLE=m
CONFIG_USB_NET_CDC_SUBSET=m
CONFIG_USB_ALI_M5632=y
CONFIG_USB_AN2720=y
@@ -2723,28 +2828,10 @@ CONFIG_USB_SIERRA_NET=m
CONFIG_USB_VL600=m
CONFIG_USB_NET_CH9200=m
CONFIG_WLAN=y
-CONFIG_PCMCIA_RAYCS=m
-CONFIG_LIBERTAS_THINFIRM=m
-# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set
-CONFIG_LIBERTAS_THINFIRM_USB=m
-CONFIG_AIRO=m
-CONFIG_ATMEL=m
-CONFIG_PCI_ATMEL=m
-CONFIG_PCMCIA_ATMEL=m
-CONFIG_AT76C50X_USB=m
-CONFIG_AIRO_CS=m
-CONFIG_PCMCIA_WL3501=m
-CONFIG_PRISM54=m
-CONFIG_USB_ZD1201=m
-CONFIG_USB_NET_RNDIS_WLAN=m
+CONFIG_WLAN_VENDOR_ADMTEK=y
CONFIG_ADM8211=m
-CONFIG_RTL8180=m
-CONFIG_RTL8187=m
-CONFIG_RTL8187_LEDS=y
-# CONFIG_MAC80211_HWSIM is not set
-CONFIG_MWL8K=m
CONFIG_ATH_COMMON=m
-CONFIG_ATH_CARDS=m
+CONFIG_WLAN_VENDOR_ATH=y
# CONFIG_ATH_DEBUG is not set
CONFIG_ATH5K=m
# CONFIG_ATH5K_DEBUG is not set
@@ -2765,6 +2852,7 @@ CONFIG_ATH9K_RFKILL=y
CONFIG_ATH9K_PCOEM=y
CONFIG_ATH9K_HTC=m
# CONFIG_ATH9K_HTC_DEBUGFS is not set
+# CONFIG_ATH9K_HWRNG is not set
CONFIG_CARL9170=m
CONFIG_CARL9170_LEDS=y
# CONFIG_CARL9170_DEBUGFS is not set
@@ -2786,6 +2874,12 @@ CONFIG_ATH10K_DEBUGFS=y
# CONFIG_ATH10K_TRACING is not set
CONFIG_WCN36XX=m
# CONFIG_WCN36XX_DEBUGFS is not set
+CONFIG_WLAN_VENDOR_ATMEL=y
+CONFIG_ATMEL=m
+CONFIG_PCI_ATMEL=m
+CONFIG_PCMCIA_ATMEL=m
+CONFIG_AT76C50X_USB=m
+CONFIG_WLAN_VENDOR_BROADCOM=y
CONFIG_B43=m
CONFIG_B43_BCMA=y
CONFIG_B43_SSB=y
@@ -2825,12 +2919,10 @@ CONFIG_BRCMFMAC_USB=y
CONFIG_BRCMFMAC_PCIE=y
# CONFIG_BRCM_TRACING is not set
# CONFIG_BRCMDBG is not set
-CONFIG_HOSTAP=m
-CONFIG_HOSTAP_FIRMWARE=y
-# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set
-CONFIG_HOSTAP_PLX=m
-CONFIG_HOSTAP_PCI=m
-CONFIG_HOSTAP_CS=m
+CONFIG_WLAN_VENDOR_CISCO=y
+CONFIG_AIRO=m
+CONFIG_AIRO_CS=m
+CONFIG_WLAN_VENDOR_INTEL=y
CONFIG_IPW2100=m
CONFIG_IPW2100_MONITOR=y
# CONFIG_IPW2100_DEBUG is not set
@@ -2842,13 +2934,22 @@ CONFIG_IPW2200_QOS=y
# CONFIG_IPW2200_DEBUG is not set
CONFIG_LIBIPW=m
# CONFIG_LIBIPW_DEBUG is not set
+CONFIG_IWLEGACY=m
+CONFIG_IWL4965=m
+CONFIG_IWL3945=m
+
+#
+# iwl3945 / iwl4965 Debugging Options
+#
+# CONFIG_IWLEGACY_DEBUG is not set
+# CONFIG_IWLEGACY_DEBUGFS is not set
CONFIG_IWLWIFI=m
CONFIG_IWLWIFI_LEDS=y
CONFIG_IWLDVM=m
CONFIG_IWLMVM=m
CONFIG_IWLWIFI_OPMODE_MODULAR=y
# CONFIG_IWLWIFI_BCAST_FILTERING is not set
-# CONFIG_IWLWIFI_UAPSD is not set
+# CONFIG_IWLWIFI_PCIE_RTPM is not set
#
# Debugging Options
@@ -2856,22 +2957,13 @@ CONFIG_IWLWIFI_OPMODE_MODULAR=y
# CONFIG_IWLWIFI_DEBUG is not set
# CONFIG_IWLWIFI_DEBUGFS is not set
CONFIG_IWLWIFI_DEVICE_TRACING=y
-CONFIG_IWLEGACY=m
-CONFIG_IWL4965=m
-CONFIG_IWL3945=m
-
-#
-# iwl3945 / iwl4965 Debugging Options
-#
-# CONFIG_IWLEGACY_DEBUG is not set
-# CONFIG_IWLEGACY_DEBUGFS is not set
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_USB=m
-CONFIG_LIBERTAS_CS=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_LIBERTAS_SPI=m
-# CONFIG_LIBERTAS_DEBUG is not set
-CONFIG_LIBERTAS_MESH=y
+CONFIG_WLAN_VENDOR_INTERSIL=y
+CONFIG_HOSTAP=m
+CONFIG_HOSTAP_FIRMWARE=y
+# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set
+CONFIG_HOSTAP_PLX=m
+CONFIG_HOSTAP_PCI=m
+CONFIG_HOSTAP_CS=m
CONFIG_HERMES=m
CONFIG_HERMES_PRISM=y
CONFIG_HERMES_CACHE_FW_ON_INIT=y
@@ -2888,6 +2980,26 @@ CONFIG_P54_PCI=m
CONFIG_P54_SPI=m
# CONFIG_P54_SPI_DEFAULT_EEPROM is not set
CONFIG_P54_LEDS=y
+CONFIG_PRISM54=m
+CONFIG_WLAN_VENDOR_MARVELL=y
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_CS=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_SPI=m
+# CONFIG_LIBERTAS_DEBUG is not set
+CONFIG_LIBERTAS_MESH=y
+CONFIG_LIBERTAS_THINFIRM=m
+# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set
+CONFIG_LIBERTAS_THINFIRM_USB=m
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_MWIFIEX_PCIE=m
+CONFIG_MWIFIEX_USB=m
+CONFIG_MWL8K=m
+CONFIG_WLAN_VENDOR_MEDIATEK=y
+CONFIG_MT7601U=m
+CONFIG_WLAN_VENDOR_RALINK=y
CONFIG_RT2X00=m
CONFIG_RT2400PCI=m
CONFIG_RT2500PCI=m
@@ -2917,8 +3029,10 @@ CONFIG_RT2X00_LIB_CRYPTO=y
CONFIG_RT2X00_LIB_LEDS=y
# CONFIG_RT2X00_LIB_DEBUGFS is not set
# CONFIG_RT2X00_DEBUG is not set
-CONFIG_WL_MEDIATEK=y
-CONFIG_MT7601U=m
+CONFIG_WLAN_VENDOR_REALTEK=y
+CONFIG_RTL8180=m
+CONFIG_RTL8187=m
+CONFIG_RTL8187_LEDS=y
CONFIG_RTL_CARDS=m
CONFIG_RTL8192CE=m
CONFIG_RTL8192SE=m
@@ -2938,29 +3052,32 @@ CONFIG_RTL8723_COMMON=m
CONFIG_RTLBTCOEXIST=m
CONFIG_RTL8XXXU=m
CONFIG_RTL8XXXU_UNTESTED=y
-CONFIG_WL_TI=y
+CONFIG_WLAN_VENDOR_RSI=y
+CONFIG_RSI_91X=m
+# CONFIG_RSI_DEBUGFS is not set
+CONFIG_RSI_SDIO=m
+CONFIG_RSI_USB=m
+CONFIG_WLAN_VENDOR_ST=y
+CONFIG_CW1200=m
+CONFIG_CW1200_WLAN_SDIO=m
+CONFIG_CW1200_WLAN_SPI=m
+CONFIG_WLAN_VENDOR_TI=y
CONFIG_WL1251=m
# CONFIG_WL1251_SPI is not set
CONFIG_WL1251_SDIO=m
CONFIG_WL12XX=m
CONFIG_WL18XX=m
CONFIG_WLCORE=m
-# CONFIG_WLCORE_SPI is not set
CONFIG_WLCORE_SDIO=m
CONFIG_WILINK_PLATFORM_DATA=y
+CONFIG_WLAN_VENDOR_ZYDAS=y
+CONFIG_USB_ZD1201=m
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
-CONFIG_MWIFIEX=m
-CONFIG_MWIFIEX_SDIO=m
-CONFIG_MWIFIEX_PCIE=m
-CONFIG_MWIFIEX_USB=m
-CONFIG_CW1200=m
-CONFIG_CW1200_WLAN_SDIO=m
-CONFIG_CW1200_WLAN_SPI=m
-CONFIG_RSI_91X=m
-# CONFIG_RSI_DEBUGFS is not set
-CONFIG_RSI_SDIO=m
-CONFIG_RSI_USB=m
+CONFIG_PCMCIA_RAYCS=m
+CONFIG_PCMCIA_WL3501=m
+# CONFIG_MAC80211_HWSIM is not set
+CONFIG_USB_NET_RNDIS_WLAN=m
#
# WiMAX Wireless Broadband devices
@@ -2976,6 +3093,7 @@ CONFIG_IEEE802154_AT86RF230=m
# CONFIG_IEEE802154_MRF24J40 is not set
# CONFIG_IEEE802154_CC2520 is not set
CONFIG_IEEE802154_ATUSB=m
+# CONFIG_IEEE802154_ADF7242 is not set
CONFIG_XEN_NETDEV_FRONTEND=m
CONFIG_XEN_NETDEV_BACKEND=m
CONFIG_VMXNET3=m
@@ -3055,10 +3173,6 @@ CONFIG_HISAX_ST5481=m
CONFIG_HISAX_HFCUSB=m
CONFIG_HISAX_HFC4S8S=m
CONFIG_HISAX_FRITZ_PCIPNP=m
-
-#
-# Active cards
-#
CONFIG_ISDN_CAPI=m
CONFIG_CAPI_TRACE=y
CONFIG_ISDN_CAPI_CAPI20=m
@@ -3138,13 +3252,14 @@ CONFIG_INPUT_EVDEV=m
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADC is not set
CONFIG_KEYBOARD_ADP5588=m
CONFIG_KEYBOARD_ADP5589=m
CONFIG_KEYBOARD_ATKBD=m
CONFIG_KEYBOARD_QT1070=m
CONFIG_KEYBOARD_QT2160=m
# CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_GPIO is not set
+CONFIG_KEYBOARD_GPIO=m
# CONFIG_KEYBOARD_GPIO_POLLED is not set
CONFIG_KEYBOARD_TCA6416=m
CONFIG_KEYBOARD_TCA8418=m
@@ -3164,6 +3279,7 @@ CONFIG_KEYBOARD_MPR121=m
CONFIG_INPUT_MOUSE=y
CONFIG_MOUSE_PS2=m
CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_BYD=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
CONFIG_MOUSE_PS2_CYPRESS=y
@@ -3222,6 +3338,7 @@ CONFIG_TABLET_USB_AIPTEK=m
CONFIG_TABLET_USB_GTCO=m
CONFIG_TABLET_USB_HANWANG=m
CONFIG_TABLET_USB_KBTAB=m
+CONFIG_TABLET_USB_PEGASUS=m
CONFIG_TABLET_SERIAL_WACOM4=m
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_PROPERTIES=y
@@ -3231,6 +3348,7 @@ CONFIG_TOUCHSCREEN_AD7879=m
CONFIG_TOUCHSCREEN_AD7879_I2C=m
# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
CONFIG_TOUCHSCREEN_ATMEL_MXT=m
+CONFIG_TOUCHSCREEN_ATMEL_MXT_T37=y
CONFIG_TOUCHSCREEN_AUO_PIXCIR=m
CONFIG_TOUCHSCREEN_BU21013=m
CONFIG_TOUCHSCREEN_CY8CTMG110=m
@@ -3243,11 +3361,12 @@ CONFIG_TOUCHSCREEN_CYTTSP4_SPI=m
CONFIG_TOUCHSCREEN_DYNAPRO=m
CONFIG_TOUCHSCREEN_HAMPSHIRE=m
CONFIG_TOUCHSCREEN_EETI=m
-CONFIG_TOUCHSCREEN_FT6236=m
+CONFIG_TOUCHSCREEN_EGALAX_SERIAL=m
CONFIG_TOUCHSCREEN_FUJITSU=m
CONFIG_TOUCHSCREEN_GOODIX=m
CONFIG_TOUCHSCREEN_ILI210X=m
CONFIG_TOUCHSCREEN_GUNZE=m
+CONFIG_TOUCHSCREEN_EKTF2127=m
CONFIG_TOUCHSCREEN_ELAN=m
CONFIG_TOUCHSCREEN_ELO=m
CONFIG_TOUCHSCREEN_WACOM_W8001=m
@@ -3255,6 +3374,7 @@ CONFIG_TOUCHSCREEN_WACOM_I2C=m
CONFIG_TOUCHSCREEN_MAX11801=m
CONFIG_TOUCHSCREEN_MCS5000=m
CONFIG_TOUCHSCREEN_MMS114=m
+CONFIG_TOUCHSCREEN_MELFAS_MIP4=m
CONFIG_TOUCHSCREEN_MTOUCH=m
CONFIG_TOUCHSCREEN_INEXIO=m
CONFIG_TOUCHSCREEN_MK712=m
@@ -3296,8 +3416,12 @@ CONFIG_TOUCHSCREEN_TSC200X_CORE=m
CONFIG_TOUCHSCREEN_TSC2004=m
# CONFIG_TOUCHSCREEN_TSC2005 is not set
CONFIG_TOUCHSCREEN_TSC2007=m
+CONFIG_TOUCHSCREEN_RM_TS=m
+CONFIG_TOUCHSCREEN_SILEAD=m
+CONFIG_TOUCHSCREEN_SIS_I2C=m
CONFIG_TOUCHSCREEN_ST1232=m
CONFIG_TOUCHSCREEN_SUR40=m
+CONFIG_TOUCHSCREEN_SURFACE3_SPI=m
# CONFIG_TOUCHSCREEN_SX8654 is not set
CONFIG_TOUCHSCREEN_TPS6507X=m
CONFIG_TOUCHSCREEN_ZFORCE=m
@@ -3317,6 +3441,7 @@ CONFIG_INPUT_APANEL=m
CONFIG_INPUT_GP2A=m
# CONFIG_INPUT_GPIO_BEEPER is not set
# CONFIG_INPUT_GPIO_TILT_POLLED is not set
+# CONFIG_INPUT_GPIO_DECODER is not set
CONFIG_INPUT_ATLAS_BTNS=m
CONFIG_INPUT_ATI_REMOTE2=m
CONFIG_INPUT_KEYSPAN_REMOTE=m
@@ -3339,9 +3464,18 @@ CONFIG_INPUT_CMA3000=m
CONFIG_INPUT_CMA3000_I2C=m
CONFIG_INPUT_XEN_KBDDEV_FRONTEND=m
CONFIG_INPUT_IDEAPAD_SLIDEBAR=m
+CONFIG_INPUT_SOC_BUTTON_ARRAY=m
# CONFIG_INPUT_DRV260X_HAPTICS is not set
# CONFIG_INPUT_DRV2665_HAPTICS is not set
# CONFIG_INPUT_DRV2667_HAPTICS is not set
+CONFIG_RMI4_CORE=m
+CONFIG_RMI4_I2C=m
+CONFIG_RMI4_SPI=m
+CONFIG_RMI4_2D_SENSOR=y
+CONFIG_RMI4_F11=y
+CONFIG_RMI4_F12=y
+CONFIG_RMI4_F30=y
+CONFIG_RMI4_F54=y
#
# Hardware I/O ports
@@ -3377,7 +3511,6 @@ CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_UNIX98_PTYS=y
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_NONSTANDARD=y
CONFIG_ROCKETPORT=m
@@ -3404,18 +3537,24 @@ CONFIG_SERIAL_EARLYCON=y
CONFIG_SERIAL_8250=y
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
CONFIG_SERIAL_8250_PNP=y
+# CONFIG_SERIAL_8250_FINTEK is not set
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_DMA=y
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_CS=m
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+CONFIG_SERIAL_8250_RSA=y
# CONFIG_SERIAL_8250_FSL is not set
CONFIG_SERIAL_8250_DW=m
CONFIG_SERIAL_8250_RT288X=y
-# CONFIG_SERIAL_8250_FINTEK is not set
+CONFIG_SERIAL_8250_LPSS=y
CONFIG_SERIAL_8250_MID=y
+CONFIG_SERIAL_8250_MOXA=m
#
# Non-8250 serial port support
@@ -3453,7 +3592,6 @@ CONFIG_IPMI_HANDLER=m
# CONFIG_IPMI_PANIC_EVENT is not set
CONFIG_IPMI_DEVICE_INTERFACE=m
CONFIG_IPMI_SI=m
-# CONFIG_IPMI_SI_PROBE_DEFAULTS is not set
CONFIG_IPMI_SSIF=m
CONFIG_IPMI_WATCHDOG=m
CONFIG_IPMI_POWEROFF=m
@@ -3483,7 +3621,9 @@ CONFIG_HPET_MMAP=y
CONFIG_HPET_MMAP_DEFAULT=y
CONFIG_HANGCHECK_TIMER=m
CONFIG_TCG_TPM=m
+CONFIG_TCG_TIS_CORE=m
CONFIG_TCG_TIS=m
+# CONFIG_TCG_TIS_SPI is not set
CONFIG_TCG_TIS_I2C_ATMEL=m
CONFIG_TCG_TIS_I2C_INFINEON=m
CONFIG_TCG_TIS_I2C_NUVOTON=m
@@ -3492,7 +3632,9 @@ CONFIG_TCG_ATMEL=m
CONFIG_TCG_INFINEON=m
CONFIG_TCG_XEN=m
CONFIG_TCG_CRB=m
-# CONFIG_TCG_TIS_ST33ZP24 is not set
+# CONFIG_TCG_VTPM_PROXY is not set
+# CONFIG_TCG_TIS_ST33ZP24_I2C is not set
+# CONFIG_TCG_TIS_ST33ZP24_SPI is not set
CONFIG_TELCLOCK=m
CONFIG_DEVPORT=y
# CONFIG_XILLYBUS is not set
@@ -3557,6 +3699,7 @@ CONFIG_I2C_SCMI=m
CONFIG_I2C_DESIGNWARE_CORE=m
CONFIG_I2C_DESIGNWARE_PLATFORM=m
CONFIG_I2C_DESIGNWARE_PCI=m
+CONFIG_I2C_DESIGNWARE_BAYTRAIL=y
# CONFIG_I2C_EMEV2 is not set
# CONFIG_I2C_GPIO is not set
CONFIG_I2C_OCORES=m
@@ -3594,28 +3737,30 @@ CONFIG_SPI_MASTER=y
# SPI Master Controller Drivers
#
CONFIG_SPI_ALTERA=m
+# CONFIG_SPI_AXI_SPI_ENGINE is not set
CONFIG_SPI_BITBANG=m
CONFIG_SPI_BUTTERFLY=m
# CONFIG_SPI_CADENCE is not set
+CONFIG_SPI_DESIGNWARE=m
+CONFIG_SPI_DW_PCI=m
+# CONFIG_SPI_DW_MID_DMA is not set
+CONFIG_SPI_DW_MMIO=m
CONFIG_SPI_GPIO=m
CONFIG_SPI_LM70_LLP=m
CONFIG_SPI_OC_TINY=m
-CONFIG_SPI_PXA2XX_DMA=y
CONFIG_SPI_PXA2XX=m
CONFIG_SPI_PXA2XX_PCI=m
+CONFIG_SPI_ROCKCHIP=m
CONFIG_SPI_SC18IS602=m
CONFIG_SPI_XCOMM=m
CONFIG_SPI_XILINX=m
CONFIG_SPI_ZYNQMP_GQSPI=m
-CONFIG_SPI_DESIGNWARE=m
-CONFIG_SPI_DW_PCI=m
-# CONFIG_SPI_DW_MID_DMA is not set
-CONFIG_SPI_DW_MMIO=m
#
# SPI Protocol Masters
#
CONFIG_SPI_SPIDEV=m
+# CONFIG_SPI_LOOPBACK_TEST is not set
CONFIG_SPI_TLE62X0=m
CONFIG_SPMI=m
# CONFIG_HSI is not set
@@ -3654,13 +3799,11 @@ CONFIG_GENERIC_PINCONF=y
# CONFIG_DEBUG_PINCTRL is not set
# CONFIG_PINCTRL_AMD is not set
CONFIG_PINCTRL_BAYTRAIL=y
-CONFIG_PINCTRL_CHERRYVIEW=m
-CONFIG_PINCTRL_INTEL=m
-CONFIG_PINCTRL_BROXTON=m
-CONFIG_PINCTRL_SUNRISEPOINT=m
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_PINCTRL_CHERRYVIEW=y
+CONFIG_PINCTRL_INTEL=y
+CONFIG_PINCTRL_BROXTON=y
+CONFIG_PINCTRL_SUNRISEPOINT=y
CONFIG_GPIOLIB=y
-CONFIG_GPIO_DEVRES=y
CONFIG_GPIO_ACPI=y
CONFIG_GPIOLIB_IRQCHIP=y
# CONFIG_DEBUG_GPIO is not set
@@ -3673,14 +3816,14 @@ CONFIG_GPIO_SYSFS=y
# CONFIG_GPIO_DWAPB is not set
# CONFIG_GPIO_GENERIC_PLATFORM is not set
CONFIG_GPIO_ICH=m
-CONFIG_GPIO_LYNXPOINT=m
+CONFIG_GPIO_LYNXPOINT=y
+# CONFIG_GPIO_MOCKUP is not set
# CONFIG_GPIO_VX855 is not set
# CONFIG_GPIO_ZX is not set
#
# Port-mapped I/O GPIO drivers
#
-# CONFIG_GPIO_104_IDIO_16 is not set
# CONFIG_GPIO_F7188X is not set
# CONFIG_GPIO_IT87 is not set
CONFIG_GPIO_SCH=m
@@ -3695,6 +3838,8 @@ CONFIG_GPIO_SCH311X=m
# CONFIG_GPIO_PCA953X is not set
# CONFIG_GPIO_PCF857X is not set
# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_TPIC2810 is not set
+# CONFIG_GPIO_TS4900 is not set
#
# MFD GPIO expanders
@@ -3702,13 +3847,14 @@ CONFIG_GPIO_SCH311X=m
# CONFIG_GPIO_ARIZONA is not set
CONFIG_GPIO_CRYSTAL_COVE=y
# CONFIG_GPIO_LP3943 is not set
+# CONFIG_GPIO_TPS65218 is not set
# CONFIG_GPIO_UCB1400 is not set
+CONFIG_GPIO_WHISKEY_COVE=y
#
# PCI GPIO expanders
#
CONFIG_GPIO_AMD8111=m
-# CONFIG_GPIO_INTEL_MID is not set
# CONFIG_GPIO_ML_IOH is not set
# CONFIG_GPIO_RDC321X is not set
@@ -3717,17 +3863,20 @@ CONFIG_GPIO_AMD8111=m
#
# CONFIG_GPIO_MAX7301 is not set
# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_PISOSR is not set
#
# SPI or I2C GPIO expanders
#
-# CONFIG_GPIO_MCP23S08 is not set
#
# USB GPIO expanders
#
CONFIG_GPIO_VIPERBOARD=m
# CONFIG_W1 is not set
+CONFIG_POWER_AVS=y
+CONFIG_POWER_RESET=y
+# CONFIG_POWER_RESET_RESTART is not set
CONFIG_POWER_SUPPLY=y
# CONFIG_POWER_SUPPLY_DEBUG is not set
CONFIG_PDA_POWER=m
@@ -3755,9 +3904,6 @@ CONFIG_CHARGER_BQ24735=m
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
# CONFIG_BATTERY_RT5033 is not set
# CONFIG_CHARGER_RT9455 is not set
-CONFIG_POWER_RESET=y
-# CONFIG_POWER_RESET_RESTART is not set
-CONFIG_POWER_AVS=y
CONFIG_HWMON=y
CONFIG_HWMON_VID=m
# CONFIG_HWMON_DEBUG_CHIP is not set
@@ -3799,6 +3945,7 @@ CONFIG_SENSORS_F71882FG=m
CONFIG_SENSORS_F75375S=m
CONFIG_SENSORS_MC13783_ADC=m
CONFIG_SENSORS_FSCHMD=m
+CONFIG_SENSORS_FTSTEUTATES=m
CONFIG_SENSORS_GL518SM=m
CONFIG_SENSORS_GL520SM=m
CONFIG_SENSORS_G760A=m
@@ -3815,6 +3962,7 @@ CONFIG_SENSORS_JC42=m
CONFIG_SENSORS_POWR1220=m
CONFIG_SENSORS_LINEAGE=m
CONFIG_SENSORS_LTC2945=m
+CONFIG_SENSORS_LTC2990=m
CONFIG_SENSORS_LTC4151=m
CONFIG_SENSORS_LTC4215=m
CONFIG_SENSORS_LTC4222=m
@@ -3826,12 +3974,12 @@ CONFIG_SENSORS_MAX16065=m
CONFIG_SENSORS_MAX1619=m
CONFIG_SENSORS_MAX1668=m
CONFIG_SENSORS_MAX197=m
+CONFIG_SENSORS_MAX31722=m
CONFIG_SENSORS_MAX6639=m
CONFIG_SENSORS_MAX6642=m
CONFIG_SENSORS_MAX6650=m
CONFIG_SENSORS_MAX6697=m
CONFIG_SENSORS_MAX31790=m
-CONFIG_SENSORS_HTU21=m
CONFIG_SENSORS_MCP3021=m
CONFIG_SENSORS_ADCXX=m
CONFIG_SENSORS_LM63=m
@@ -3863,6 +4011,7 @@ CONFIG_SENSORS_PMBUS=m
CONFIG_SENSORS_ADM1275=m
CONFIG_SENSORS_LM25066=m
CONFIG_SENSORS_LTC2978=m
+CONFIG_SENSORS_LTC3815=m
CONFIG_SENSORS_MAX16064=m
CONFIG_SENSORS_MAX20751=m
CONFIG_SENSORS_MAX34440=m
@@ -3873,6 +4022,7 @@ CONFIG_SENSORS_UCD9200=m
CONFIG_SENSORS_ZL6100=m
CONFIG_SENSORS_SHT15=m
CONFIG_SENSORS_SHT21=m
+CONFIG_SENSORS_SHT3x=m
CONFIG_SENSORS_SHTC1=m
CONFIG_SENSORS_SIS5595=m
CONFIG_SENSORS_DME1737=m
@@ -3893,6 +4043,7 @@ CONFIG_SENSORS_ADS7871=m
CONFIG_SENSORS_AMC6821=m
CONFIG_SENSORS_INA209=m
CONFIG_SENSORS_INA2XX=m
+CONFIG_SENSORS_INA3221=m
CONFIG_SENSORS_TC74=m
CONFIG_SENSORS_THMC50=m
CONFIG_SENSORS_TMP102=m
@@ -3936,21 +4087,30 @@ CONFIG_INTEL_POWERCLAMP=m
CONFIG_X86_PKG_TEMP_THERMAL=m
CONFIG_INTEL_SOC_DTS_IOSF_CORE=m
CONFIG_INTEL_SOC_DTS_THERMAL=m
+
+#
+# ACPI INT340X thermal drivers
+#
CONFIG_INT340X_THERMAL=m
CONFIG_ACPI_THERMAL_REL=m
+CONFIG_INT3406_THERMAL=m
+CONFIG_INTEL_BXT_PMIC_THERMAL=m
CONFIG_INTEL_PCH_THERMAL=m
+CONFIG_GENERIC_ADC_THERMAL=m
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
+CONFIG_WATCHDOG_SYSFS=y
#
# Watchdog Device Drivers
#
CONFIG_SOFT_WATCHDOG=m
+CONFIG_WDAT_WDT=m
CONFIG_XILINX_WATCHDOG=m
+CONFIG_ZIIRAVE_WATCHDOG=m
# CONFIG_CADENCE_WATCHDOG is not set
CONFIG_DW_WATCHDOG=m
-# CONFIG_RN5T618_WATCHDOG is not set
# CONFIG_MAX63XX_WATCHDOG is not set
CONFIG_RETU_WATCHDOG=m
CONFIG_ACQUIRE_WDT=m
@@ -3985,7 +4145,8 @@ CONFIG_W83877F_WDT=m
CONFIG_W83977F_WDT=m
CONFIG_MACHZ_WDT=m
CONFIG_SBC_EPX_C3_WATCHDOG=m
-CONFIG_BCM7038_WDT=m
+CONFIG_INTEL_MEI_WDT=m
+CONFIG_NI903X_WDT=m
CONFIG_MEN_A21_WDT=m
CONFIG_XEN_WDT=m
@@ -3999,6 +4160,15 @@ CONFIG_WDTPCI=m
# USB-based Watchdog Cards
#
CONFIG_USBPCWATCHDOG=m
+
+#
+# Watchdog Pretimeout Governors
+#
+CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
+# CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP is not set
+CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
+CONFIG_WATCHDOG_PRETIMEOUT_GOV_NOOP=m
+CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
CONFIG_SSB_POSSIBLE=y
#
@@ -4014,7 +4184,6 @@ CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
CONFIG_SSB_PCMCIAHOST=y
CONFIG_SSB_SDIOHOST_POSSIBLE=y
CONFIG_SSB_SDIOHOST=y
-CONFIG_SSB_HOST_SOC=y
# CONFIG_SSB_DEBUG is not set
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_DRIVER_PCICORE=y
@@ -4042,7 +4211,7 @@ CONFIG_MFD_CORE=y
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_AAT2870_CORE is not set
CONFIG_MFD_BCM590XX=m
-# CONFIG_MFD_AXP20X is not set
+# CONFIG_MFD_AXP20X_I2C is not set
CONFIG_MFD_CROS_EC=m
CONFIG_MFD_CROS_EC_I2C=m
# CONFIG_MFD_CROS_EC_SPI is not set
@@ -4054,6 +4223,7 @@ CONFIG_MFD_CROS_EC_I2C=m
# CONFIG_MFD_DA9063 is not set
# CONFIG_MFD_DA9150 is not set
# CONFIG_MFD_DLN2 is not set
+# CONFIG_MFD_EXYNOS_LPASS is not set
CONFIG_MFD_MC13XXX=m
# CONFIG_MFD_MC13XXX_SPI is not set
CONFIG_MFD_MC13XXX_I2C=m
@@ -4092,7 +4262,6 @@ CONFIG_MFD_RTSX_PCI=m
CONFIG_MFD_RT5033=m
CONFIG_MFD_RTSX_USB=m
# CONFIG_MFD_RC5T583 is not set
-CONFIG_MFD_RN5T618=m
# CONFIG_MFD_SEC_CORE is not set
CONFIG_MFD_SI476X_CORE=m
CONFIG_MFD_SM501=m
@@ -4109,12 +4278,13 @@ CONFIG_MFD_LP3943=m
# CONFIG_TPS6105X is not set
CONFIG_TPS65010=m
CONFIG_TPS6507X=m
+# CONFIG_MFD_TPS65086 is not set
# CONFIG_MFD_TPS65090 is not set
CONFIG_MFD_TPS65217=m
+# CONFIG_MFD_TI_LP873X is not set
CONFIG_MFD_TPS65218=m
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65910 is not set
-# CONFIG_MFD_TPS65912 is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS65912_SPI is not set
# CONFIG_MFD_TPS80031 is not set
@@ -4127,6 +4297,7 @@ CONFIG_MFD_VX855=m
CONFIG_MFD_ARIZONA=y
CONFIG_MFD_ARIZONA_I2C=m
# CONFIG_MFD_ARIZONA_SPI is not set
+# CONFIG_MFD_CS47L24 is not set
CONFIG_MFD_WM5102=y
CONFIG_MFD_WM5110=y
# CONFIG_MFD_WM8997 is not set
@@ -4148,12 +4319,15 @@ CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
CONFIG_MEDIA_RADIO_SUPPORT=y
CONFIG_MEDIA_SDR_SUPPORT=y
CONFIG_MEDIA_RC_SUPPORT=y
+CONFIG_MEDIA_CEC_EDID=y
CONFIG_MEDIA_CONTROLLER=y
+# CONFIG_MEDIA_CONTROLLER_DVB is not set
CONFIG_VIDEO_DEV=m
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_VIDEO_V4L2=m
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_PCI_SKELETON is not set
CONFIG_VIDEO_TUNER=m
CONFIG_V4L2_MEM2MEM_DEV=m
# CONFIG_V4L2_FLASH_LED_CLASS is not set
@@ -4309,6 +4483,7 @@ CONFIG_VIDEO_TM6000_DVB=m
#
CONFIG_DVB_USB=m
# CONFIG_DVB_USB_DEBUG is not set
+CONFIG_DVB_USB_DIB3000MC=m
CONFIG_DVB_USB_A800=m
CONFIG_DVB_USB_DIBUSB_MB=m
CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y
@@ -4376,7 +4551,9 @@ CONFIG_MEDIA_PCI_SUPPORT=y
#
CONFIG_VIDEO_MEYE=m
CONFIG_VIDEO_SOLO6X10=m
+CONFIG_VIDEO_TW5864=m
CONFIG_VIDEO_TW68=m
+CONFIG_VIDEO_TW686X=m
CONFIG_VIDEO_ZORAN=m
CONFIG_VIDEO_ZORAN_DC30=m
CONFIG_VIDEO_ZORAN_ZR36060=m
@@ -4509,7 +4686,7 @@ CONFIG_SMS_SIANO_RC=y
# CONFIG_SMS_SIANO_DEBUGFS is not set
#
-# Media ancillary drivers (tuners, sensors, i2c, frontends)
+# Media ancillary drivers (tuners, sensors, i2c, spi, frontends)
#
CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
CONFIG_MEDIA_ATTACH=y
@@ -4524,6 +4701,7 @@ CONFIG_VIDEO_TDA9840=m
CONFIG_VIDEO_TEA6415C=m
CONFIG_VIDEO_TEA6420=m
CONFIG_VIDEO_MSP3400=m
+CONFIG_VIDEO_CS3308=m
CONFIG_VIDEO_CS5345=m
CONFIG_VIDEO_CS53L32A=m
CONFIG_VIDEO_UDA1342=m
@@ -4650,6 +4828,8 @@ CONFIG_DVB_M88DS3103=m
CONFIG_DVB_DRXK=m
CONFIG_DVB_TDA18271C2DD=m
CONFIG_DVB_SI2165=m
+CONFIG_DVB_MN88472=m
+CONFIG_DVB_MN88473=m
#
# DVB-S (satellite) frontends
@@ -4710,6 +4890,7 @@ CONFIG_DVB_RTL2832=m
CONFIG_DVB_RTL2832_SDR=m
CONFIG_DVB_SI2168=m
CONFIG_DVB_AS102_FE=m
+CONFIG_DVB_GP8PSK_FE=m
#
# DVB-C (cable) frontends
@@ -4775,6 +4956,7 @@ CONFIG_DVB_M88RS2000=m
CONFIG_DVB_AF9033=m
CONFIG_DVB_HORUS3A=m
CONFIG_DVB_ASCOT2E=m
+CONFIG_DVB_HELENE=m
#
# Tools to develop new frontends
@@ -4795,6 +4977,7 @@ CONFIG_VGA_ARB_MAX_GPUS=16
CONFIG_VGA_SWITCHEROO=y
CONFIG_DRM=m
CONFIG_DRM_MIPI_DSI=y
+CONFIG_DRM_DP_AUX_CHARDEV=y
CONFIG_DRM_KMS_HELPER=m
CONFIG_DRM_KMS_FB_HELPER=y
CONFIG_DRM_FBDEV_EMULATION=y
@@ -4804,29 +4987,29 @@ CONFIG_DRM_TTM=m
#
# I2C encoder or helper chips
#
-CONFIG_DRM_I2C_ADV7511=m
CONFIG_DRM_I2C_CH7006=m
CONFIG_DRM_I2C_SIL164=m
CONFIG_DRM_I2C_NXP_TDA998X=m
-CONFIG_DRM_TDFX=m
-CONFIG_DRM_R128=m
CONFIG_DRM_RADEON=m
-# CONFIG_DRM_RADEON_USERPTR is not set
-# CONFIG_DRM_RADEON_UMS is not set
+CONFIG_DRM_RADEON_USERPTR=y
CONFIG_DRM_AMDGPU=m
-# CONFIG_DRM_AMDGPU_CIK is not set
+CONFIG_DRM_AMDGPU_SI=y
+CONFIG_DRM_AMDGPU_CIK=y
CONFIG_DRM_AMDGPU_USERPTR=y
+# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set
+
+#
+# ACP (Audio CoProcessor) Configuration
+#
+CONFIG_DRM_AMD_ACP=y
CONFIG_DRM_NOUVEAU=m
CONFIG_NOUVEAU_DEBUG=5
CONFIG_NOUVEAU_DEBUG_DEFAULT=3
CONFIG_DRM_NOUVEAU_BACKLIGHT=y
-# CONFIG_DRM_I810 is not set
CONFIG_DRM_I915=m
# CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT is not set
-CONFIG_DRM_MGA=m
-CONFIG_DRM_SIS=m
-CONFIG_DRM_VIA=m
-CONFIG_DRM_SAVAGE=m
+CONFIG_DRM_I915_USERPTR=y
+CONFIG_DRM_I915_GVT=y
CONFIG_DRM_VGEM=m
CONFIG_DRM_VMWGFX=m
CONFIG_DRM_VMWGFX_FBCON=y
@@ -4850,7 +5033,9 @@ CONFIG_DRM_BRIDGE=y
#
# Display Interface Bridges
#
+CONFIG_DRM_ANALOGIX_ANX78XX=m
CONFIG_HSA_AMD=m
+# CONFIG_DRM_LEGACY is not set
#
# Frame buffer Devices
@@ -4858,6 +5043,7 @@ CONFIG_HSA_AMD=m
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
CONFIG_FB_CMDLINE=y
+CONFIG_FB_NOTIFY=y
# CONFIG_FB_DDC is not set
CONFIG_FB_BOOT_VESA_SUPPORT=y
CONFIG_FB_CFB_FILLRECT=y
@@ -4980,11 +5166,14 @@ CONFIG_SOUND_OSS_CORE=y
CONFIG_SND=m
CONFIG_SND_TIMER=m
CONFIG_SND_PCM=m
+CONFIG_SND_PCM_ELD=y
+CONFIG_SND_PCM_IEC958=y
CONFIG_SND_DMAENGINE_PCM=m
CONFIG_SND_HWDEP=m
CONFIG_SND_RAWMIDI=m
CONFIG_SND_COMPRESS_OFFLOAD=m
CONFIG_SND_JACK=y
+CONFIG_SND_JACK_INPUT_DEV=y
CONFIG_SND_SEQUENCER=m
CONFIG_SND_SEQ_DUMMY=m
CONFIG_SND_OSSEMUL=y
@@ -5149,7 +5338,6 @@ CONFIG_SND_FIREWIRE_LIB=m
CONFIG_SND_DICE=m
CONFIG_SND_OXFW=m
CONFIG_SND_ISIGHT=m
-CONFIG_SND_SCS1X=m
CONFIG_SND_FIREWORKS=m
CONFIG_SND_BEBOB=m
CONFIG_SND_FIREWIRE_DIGI00X=m
@@ -5162,8 +5350,10 @@ CONFIG_SND_SOC_AC97_BUS=y
CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
CONFIG_SND_SOC_COMPRESS=y
CONFIG_SND_SOC_TOPOLOGY=y
+CONFIG_SND_SOC_AMD_ACP=m
# CONFIG_SND_ATMEL_SOC is not set
CONFIG_SND_DESIGNWARE_I2S=m
+CONFIG_SND_DESIGNWARE_PCM=m
#
# SoC Audio for Freescale CPUs
@@ -5178,28 +5368,29 @@ CONFIG_SND_DESIGNWARE_I2S=m
# CONFIG_SND_SOC_FSL_SPDIF is not set
# CONFIG_SND_SOC_FSL_ESAI is not set
# CONFIG_SND_SOC_IMX_AUDMUX is not set
+# CONFIG_SND_SOC_IMG is not set
CONFIG_SND_SST_MFLD_PLATFORM=m
CONFIG_SND_SST_IPC=m
CONFIG_SND_SST_IPC_ACPI=m
CONFIG_SND_SOC_INTEL_SST=m
+CONFIG_SND_SOC_INTEL_SST_FIRMWARE=m
CONFIG_SND_SOC_INTEL_SST_ACPI=m
+CONFIG_SND_SOC_INTEL_SST_MATCH=m
CONFIG_SND_SOC_INTEL_HASWELL=m
-CONFIG_SND_SOC_INTEL_BAYTRAIL=m
CONFIG_SND_SOC_INTEL_HASWELL_MACH=m
-CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH=m
-CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH=m
+CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH=m
+CONFIG_SND_SOC_INTEL_BXT_RT298_MACH=m
+CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH=m
CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m
CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m
+CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m
CONFIG_SND_SOC_INTEL_SKYLAKE=m
CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m
-
-#
-# Allwinner SoC Audio support
-#
-# CONFIG_SND_SUN4I_CODEC is not set
+CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m
+CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m
# CONFIG_SND_SOC_XTFPGA_I2S is not set
CONFIG_SND_SOC_I2C_AND_SPI=m
@@ -5208,13 +5399,16 @@ CONFIG_SND_SOC_I2C_AND_SPI=m
#
CONFIG_SND_SOC_AC97_CODEC=m
# CONFIG_SND_SOC_ADAU1701 is not set
+# CONFIG_SND_SOC_ADAU7002 is not set
# CONFIG_SND_SOC_AK4104 is not set
# CONFIG_SND_SOC_AK4554 is not set
# CONFIG_SND_SOC_AK4613 is not set
# CONFIG_SND_SOC_AK4642 is not set
# CONFIG_SND_SOC_AK5386 is not set
# CONFIG_SND_SOC_ALC5623 is not set
+# CONFIG_SND_SOC_BT_SCO is not set
# CONFIG_SND_SOC_CS35L32 is not set
+# CONFIG_SND_SOC_CS35L33 is not set
# CONFIG_SND_SOC_CS42L51_I2C is not set
# CONFIG_SND_SOC_CS42L52 is not set
# CONFIG_SND_SOC_CS42L56 is not set
@@ -5225,35 +5419,52 @@ CONFIG_SND_SOC_AC97_CODEC=m
# CONFIG_SND_SOC_CS4271_SPI is not set
# CONFIG_SND_SOC_CS42XX8_I2C is not set
# CONFIG_SND_SOC_CS4349 is not set
+# CONFIG_SND_SOC_CS53L30 is not set
+CONFIG_SND_SOC_DA7219=m
CONFIG_SND_SOC_DMIC=m
+CONFIG_SND_SOC_HDMI_CODEC=m
# CONFIG_SND_SOC_ES8328 is not set
# CONFIG_SND_SOC_GTM601 is not set
+CONFIG_SND_SOC_HDAC_HDMI=m
+# CONFIG_SND_SOC_INNO_RK3036 is not set
CONFIG_SND_SOC_MAX98090=m
+CONFIG_SND_SOC_MAX98357A=m
+# CONFIG_SND_SOC_MAX98504 is not set
+# CONFIG_SND_SOC_MAX9860 is not set
# CONFIG_SND_SOC_PCM1681 is not set
-# CONFIG_SND_SOC_PCM1792A is not set
+# CONFIG_SND_SOC_PCM179X_I2C is not set
+# CONFIG_SND_SOC_PCM179X_SPI is not set
+# CONFIG_SND_SOC_PCM3168A_I2C is not set
+# CONFIG_SND_SOC_PCM3168A_SPI is not set
# CONFIG_SND_SOC_PCM512x_I2C is not set
# CONFIG_SND_SOC_PCM512x_SPI is not set
CONFIG_SND_SOC_RL6231=m
CONFIG_SND_SOC_RL6347A=m
CONFIG_SND_SOC_RT286=m
+CONFIG_SND_SOC_RT298=m
+# CONFIG_SND_SOC_RT5616 is not set
# CONFIG_SND_SOC_RT5631 is not set
CONFIG_SND_SOC_RT5640=m
CONFIG_SND_SOC_RT5645=m
+CONFIG_SND_SOC_RT5651=m
+CONFIG_SND_SOC_RT5663=m
CONFIG_SND_SOC_RT5670=m
-# CONFIG_SND_SOC_RT5677_SPI is not set
+CONFIG_SND_SOC_RT5677=m
+CONFIG_SND_SOC_RT5677_SPI=m
# CONFIG_SND_SOC_SGTL5000 is not set
CONFIG_SND_SOC_SI476X=m
# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
CONFIG_SND_SOC_SPDIF=m
# CONFIG_SND_SOC_SSM2602_SPI is not set
# CONFIG_SND_SOC_SSM2602_I2C is not set
-# CONFIG_SND_SOC_SSM4567 is not set
+CONFIG_SND_SOC_SSM4567=m
# CONFIG_SND_SOC_STA32X is not set
# CONFIG_SND_SOC_STA350 is not set
# CONFIG_SND_SOC_STI_SAS is not set
# CONFIG_SND_SOC_TAS2552 is not set
# CONFIG_SND_SOC_TAS5086 is not set
# CONFIG_SND_SOC_TAS571X is not set
+# CONFIG_SND_SOC_TAS5720 is not set
# CONFIG_SND_SOC_TFA9879 is not set
# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
@@ -5275,9 +5486,15 @@ CONFIG_SND_SOC_TS3A227E=m
# CONFIG_SND_SOC_WM8804_I2C is not set
# CONFIG_SND_SOC_WM8804_SPI is not set
# CONFIG_SND_SOC_WM8903 is not set
+# CONFIG_SND_SOC_WM8960 is not set
# CONFIG_SND_SOC_WM8962 is not set
+# CONFIG_SND_SOC_WM8974 is not set
# CONFIG_SND_SOC_WM8978 is not set
+# CONFIG_SND_SOC_WM8985 is not set
+# CONFIG_SND_SOC_NAU8810 is not set
+CONFIG_SND_SOC_NAU8825=m
# CONFIG_SND_SOC_TPA6130A2 is not set
+CONFIG_SND_SIMPLE_CARD_UTILS=m
CONFIG_SND_SIMPLE_CARD=m
# CONFIG_SOUND_PRIME is not set
CONFIG_AC97_BUS=m
@@ -5299,6 +5516,7 @@ CONFIG_HID_ACRUX=m
CONFIG_HID_ACRUX_FF=y
CONFIG_HID_APPLE=m
CONFIG_HID_APPLEIR=m
+CONFIG_HID_ASUS=m
CONFIG_HID_AUREAL=m
CONFIG_HID_BELKIN=m
CONFIG_HID_BETOP_FF=m
@@ -5306,6 +5524,7 @@ CONFIG_HID_CHERRY=m
CONFIG_HID_CHICONY=m
CONFIG_HID_CORSAIR=m
CONFIG_HID_PRODIKEYS=m
+CONFIG_HID_CMEDIA=m
CONFIG_HID_CP2112=m
CONFIG_HID_CYPRESS=m
CONFIG_HID_DRAGONRISE=m
@@ -5328,6 +5547,7 @@ CONFIG_HID_ICADE=m
CONFIG_HID_TWINHAN=m
CONFIG_HID_KENSINGTON=m
CONFIG_HID_LCPOWER=m
+CONFIG_HID_LED=m
CONFIG_HID_LENOVO=m
CONFIG_HID_LOGITECH=m
CONFIG_HID_LOGITECH_DJ=m
@@ -5381,6 +5601,7 @@ CONFIG_ZEROPLUS_FF=y
CONFIG_HID_ZYDACRON=m
CONFIG_HID_SENSOR_HUB=m
# CONFIG_HID_SENSOR_CUSTOM_SENSOR is not set
+CONFIG_HID_ALPS=m
#
# USB HID support
@@ -5393,6 +5614,11 @@ CONFIG_USB_HIDDEV=y
# I2C HID support
#
CONFIG_I2C_HID=m
+
+#
+# Intel ISH HID support
+#
+CONFIG_INTEL_ISH_HID=m
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_COMMON=m
@@ -5407,7 +5633,7 @@ CONFIG_USB_DEFAULT_PERSIST=y
CONFIG_USB_DYNAMIC_MINORS=y
# CONFIG_USB_OTG is not set
# CONFIG_USB_OTG_WHITELIST is not set
-# CONFIG_USB_ULPI_BUS is not set
+CONFIG_USB_LEDS_TRIGGER_USBPORT=m
CONFIG_USB_MON=m
CONFIG_USB_WUSB=m
CONFIG_USB_WUSB_CBAF=m
@@ -5486,12 +5712,12 @@ CONFIG_USB_MDC800=m
CONFIG_USB_MICROTEK=m
CONFIG_USBIP_CORE=m
CONFIG_USBIP_VHCI_HCD=m
+CONFIG_USBIP_VHCI_HC_PORTS=8
+CONFIG_USBIP_VHCI_NR_HCS=1
CONFIG_USBIP_HOST=m
# CONFIG_USBIP_DEBUG is not set
CONFIG_USB_MUSB_HDRC=m
-# CONFIG_USB_MUSB_HOST is not set
-# CONFIG_USB_MUSB_GADGET is not set
-CONFIG_USB_MUSB_DUAL_ROLE=y
+CONFIG_USB_MUSB_HOST=y
#
# Platform Glue Layer
@@ -5575,7 +5801,6 @@ CONFIG_USB_SEVSEG=m
CONFIG_USB_RIO500=m
CONFIG_USB_LEGOTOWER=m
CONFIG_USB_LCD=m
-CONFIG_USB_LED=m
CONFIG_USB_CYPRESS_CY7C63=m
CONFIG_USB_CYTHERM=m
CONFIG_USB_IDMOUSE=m
@@ -5592,8 +5817,10 @@ CONFIG_USB_ISIGHTFW=m
CONFIG_USB_YUREX=m
CONFIG_USB_EZUSB_FX2=m
CONFIG_USB_HSIC_USB3503=m
+CONFIG_USB_HSIC_USB4604=m
CONFIG_USB_LINK_LAYER_TEST=m
CONFIG_USB_CHAOSKEY=m
+CONFIG_UCSI=m
CONFIG_USB_ATM=m
CONFIG_USB_SPEEDTOUCH=m
CONFIG_USB_CXACRU=m
@@ -5609,81 +5836,9 @@ CONFIG_NOP_USB_XCEIV=m
CONFIG_TAHVO_USB=m
# CONFIG_TAHVO_USB_HOST_BY_DEFAULT is not set
CONFIG_USB_ISP1301=m
-CONFIG_USB_GADGET=m
-# CONFIG_USB_GADGET_DEBUG is not set
-# CONFIG_USB_GADGET_DEBUG_FILES is not set
-# CONFIG_USB_GADGET_DEBUG_FS is not set
-CONFIG_USB_GADGET_VBUS_DRAW=2
-CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
-
-#
-# USB Peripheral Controller
-#
-# CONFIG_USB_FOTG210_UDC is not set
-CONFIG_USB_GR_UDC=m
-CONFIG_USB_R8A66597=m
-CONFIG_USB_PXA27X=m
-CONFIG_USB_MV_UDC=m
-CONFIG_USB_MV_U3D=m
-CONFIG_USB_M66592=m
-CONFIG_USB_BDC_UDC=m
-
-#
-# Platform Support
-#
-CONFIG_USB_BDC_PCI=m
-CONFIG_USB_AMD5536UDC=m
-CONFIG_USB_NET2272=m
-CONFIG_USB_NET2272_DMA=y
-CONFIG_USB_NET2280=m
-CONFIG_USB_GOKU=m
-CONFIG_USB_EG20T=m
-CONFIG_USB_DUMMY_HCD=m
-CONFIG_USB_LIBCOMPOSITE=m
-CONFIG_USB_F_ACM=m
-CONFIG_USB_U_SERIAL=m
-CONFIG_USB_U_ETHER=m
-CONFIG_USB_F_SERIAL=m
-CONFIG_USB_F_OBEX=m
-CONFIG_USB_F_NCM=m
-CONFIG_USB_F_ECM=m
-CONFIG_USB_F_SUBSET=m
-CONFIG_USB_F_RNDIS=m
-CONFIG_USB_F_MASS_STORAGE=m
-CONFIG_USB_F_FS=m
-CONFIG_USB_F_UAC2=m
-CONFIG_USB_F_UVC=m
-CONFIG_USB_F_MIDI=m
-CONFIG_USB_F_HID=m
-CONFIG_USB_F_PRINTER=m
-# CONFIG_USB_CONFIGFS is not set
-# CONFIG_USB_ZERO is not set
-CONFIG_USB_AUDIO=m
-# CONFIG_GADGET_UAC1 is not set
-CONFIG_USB_ETH=m
-CONFIG_USB_ETH_RNDIS=y
-# CONFIG_USB_ETH_EEM is not set
-CONFIG_USB_G_NCM=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_FUNCTIONFS=m
-CONFIG_USB_FUNCTIONFS_ETH=y
-CONFIG_USB_FUNCTIONFS_RNDIS=y
-CONFIG_USB_FUNCTIONFS_GENERIC=y
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_GADGET_TARGET=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_MIDI_GADGET=m
-CONFIG_USB_G_PRINTER=m
-# CONFIG_USB_CDC_COMPOSITE is not set
-# CONFIG_USB_G_NOKIA is not set
-# CONFIG_USB_G_ACM_MS is not set
-# CONFIG_USB_G_MULTI is not set
-CONFIG_USB_G_HID=m
-CONFIG_USB_G_DBGP=m
-# CONFIG_USB_G_DBGP_PRINTK is not set
-CONFIG_USB_G_DBGP_SERIAL=y
-CONFIG_USB_G_WEBCAM=m
+# CONFIG_USB_GADGET is not set
CONFIG_USB_LED_TRIG=y
+# CONFIG_USB_ULPI_BUS is not set
CONFIG_UWB=m
CONFIG_UWB_HWA=m
CONFIG_UWB_WHCI=m
@@ -5753,6 +5908,7 @@ CONFIG_LEDS_PCA9532=m
# CONFIG_LEDS_PCA9532_GPIO is not set
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_LP3944=m
+CONFIG_LEDS_LP3952=m
# CONFIG_LEDS_LP5521 is not set
# CONFIG_LEDS_LP5523 is not set
# CONFIG_LEDS_LP5562 is not set
@@ -5775,6 +5931,7 @@ CONFIG_LEDS_LM355x=m
# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)
#
CONFIG_LEDS_BLINKM=m
+CONFIG_LEDS_MLXCPLD=m
#
# LED Triggers
@@ -5782,6 +5939,8 @@ CONFIG_LEDS_BLINKM=m
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=m
CONFIG_LEDS_TRIGGER_ONESHOT=m
+CONFIG_LEDS_TRIGGER_DISK=y
+CONFIG_LEDS_TRIGGER_MTD=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
CONFIG_LEDS_TRIGGER_BACKLIGHT=m
CONFIG_LEDS_TRIGGER_CPU=y
@@ -5793,6 +5952,7 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
#
CONFIG_LEDS_TRIGGER_TRANSIENT=m
CONFIG_LEDS_TRIGGER_CAMERA=m
+CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_ACCESSIBILITY=y
CONFIG_A11Y_BRAILLE_CONSOLE=y
CONFIG_INFINIBAND=m
@@ -5801,6 +5961,7 @@ CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MEM=y
CONFIG_INFINIBAND_ON_DEMAND_PAGING=y
CONFIG_INFINIBAND_ADDR_TRANS=y
+CONFIG_INFINIBAND_ADDR_TRANS_CONFIGFS=y
CONFIG_INFINIBAND_MTHCA=m
CONFIG_INFINIBAND_MTHCA_DEBUG=y
CONFIG_INFINIBAND_QIB=m
@@ -5808,6 +5969,7 @@ CONFIG_INFINIBAND_QIB=m
CONFIG_INFINIBAND_CXGB3=m
# CONFIG_INFINIBAND_CXGB3_DEBUG is not set
CONFIG_INFINIBAND_CXGB4=m
+CONFIG_INFINIBAND_I40IW=m
CONFIG_MLX4_INFINIBAND=m
CONFIG_MLX5_INFINIBAND=m
CONFIG_INFINIBAND_NES=m
@@ -5822,6 +5984,13 @@ CONFIG_INFINIBAND_SRP=m
CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_ISER=m
CONFIG_INFINIBAND_ISERT=m
+CONFIG_INFINIBAND_RDMAVT=m
+CONFIG_RDMA_RXE=m
+CONFIG_INFINIBAND_HFI1=m
+# CONFIG_HFI1_DEBUG_SDMA_ORDER is not set
+CONFIG_HFI1_VERBS_31BIT_PSN=y
+# CONFIG_SDMA_VERBOSITY is not set
+# CONFIG_INFINIBAND_QEDR is not set
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EDAC=y
@@ -5843,7 +6012,9 @@ CONFIG_EDAC_I5000=m
CONFIG_EDAC_I5100=m
CONFIG_EDAC_I7300=m
CONFIG_EDAC_SBRIDGE=m
+CONFIG_EDAC_SKX=m
CONFIG_RTC_LIB=y
+CONFIG_RTC_MC146818_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
@@ -5866,30 +6037,29 @@ CONFIG_RTC_DRV_TEST=m
# CONFIG_RTC_DRV_ABB5ZES3 is not set
CONFIG_RTC_DRV_ABX80X=m
CONFIG_RTC_DRV_DS1307=m
+CONFIG_RTC_DRV_DS1307_HWMON=y
+# CONFIG_RTC_DRV_DS1307_CENTURY is not set
CONFIG_RTC_DRV_DS1374=m
CONFIG_RTC_DRV_DS1374_WDT=y
CONFIG_RTC_DRV_DS1672=m
-CONFIG_RTC_DRV_DS3232=m
CONFIG_RTC_DRV_MAX6900=m
CONFIG_RTC_DRV_RS5C372=m
CONFIG_RTC_DRV_ISL1208=m
CONFIG_RTC_DRV_ISL12022=m
-CONFIG_RTC_DRV_ISL12057=m
CONFIG_RTC_DRV_X1205=m
-CONFIG_RTC_DRV_PCF2127=m
CONFIG_RTC_DRV_PCF8523=m
-CONFIG_RTC_DRV_PCF8563=m
CONFIG_RTC_DRV_PCF85063=m
+CONFIG_RTC_DRV_PCF8563=m
CONFIG_RTC_DRV_PCF8583=m
CONFIG_RTC_DRV_M41T80=m
CONFIG_RTC_DRV_M41T80_WDT=y
CONFIG_RTC_DRV_BQ32K=m
CONFIG_RTC_DRV_S35390A=m
CONFIG_RTC_DRV_FM3130=m
+CONFIG_RTC_DRV_RX8010=m
CONFIG_RTC_DRV_RX8581=m
CONFIG_RTC_DRV_RX8025=m
CONFIG_RTC_DRV_EM3027=m
-CONFIG_RTC_DRV_RV3029C2=m
# CONFIG_RTC_DRV_RV8803 is not set
#
@@ -5897,17 +6067,28 @@ CONFIG_RTC_DRV_RV3029C2=m
#
# CONFIG_RTC_DRV_M41T93 is not set
# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1302 is not set
# CONFIG_RTC_DRV_DS1305 is not set
# CONFIG_RTC_DRV_DS1343 is not set
# CONFIG_RTC_DRV_DS1347 is not set
# CONFIG_RTC_DRV_DS1390 is not set
-# CONFIG_RTC_DRV_MAX6902 is not set
+CONFIG_RTC_DRV_MAX6916=m
# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RX4581 is not set
+# CONFIG_RTC_DRV_RX6110 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
-# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_PCF2123 is not set
-# CONFIG_RTC_DRV_RX4581 is not set
# CONFIG_RTC_DRV_MCP795 is not set
+CONFIG_RTC_I2C_AND_SPI=y
+
+#
+# SPI and I2C RTC drivers
+#
+CONFIG_RTC_DRV_DS3232=m
+CONFIG_RTC_DRV_PCF2127=m
+CONFIG_RTC_DRV_RV3029C2=m
+CONFIG_RTC_DRV_RV3029_HWMON=y
#
# Platform RTC drivers
@@ -5957,9 +6138,11 @@ CONFIG_DMA_ACPI=y
CONFIG_INTEL_IDMA64=m
CONFIG_INTEL_IOATDMA=m
CONFIG_INTEL_MIC_X100_DMA=m
-CONFIG_DW_DMAC_CORE=m
-CONFIG_DW_DMAC=m
-CONFIG_DW_DMAC_PCI=m
+# CONFIG_QCOM_HIDMA_MGMT is not set
+# CONFIG_QCOM_HIDMA is not set
+CONFIG_DW_DMAC_CORE=y
+CONFIG_DW_DMAC=y
+CONFIG_DW_DMAC_PCI=y
CONFIG_HSU_DMA=y
#
@@ -5968,6 +6151,12 @@ CONFIG_HSU_DMA=y
CONFIG_ASYNC_TX_DMA=y
# CONFIG_DMATEST is not set
CONFIG_DMA_ENGINE_RAID=y
+
+#
+# DMABUF options
+#
+CONFIG_SYNC_FILE=y
+# CONFIG_SW_SYNC is not set
CONFIG_DCA=m
CONFIG_AUXDISPLAY=y
CONFIG_KS0108=m
@@ -5975,6 +6164,7 @@ CONFIG_KS0108_PORT=0x378
CONFIG_KS0108_DELAY=2
CONFIG_CFAG12864B=m
CONFIG_CFAG12864B_RATE=20
+# CONFIG_IMG_ASCII_LCD is not set
CONFIG_UIO=m
CONFIG_UIO_CIF=m
CONFIG_UIO_PDRV_GENIRQ=m
@@ -5988,10 +6178,12 @@ CONFIG_UIO_PRUSS=m
CONFIG_VFIO_IOMMU_TYPE1=m
CONFIG_VFIO_VIRQFD=m
CONFIG_VFIO=m
+# CONFIG_VFIO_NOIOMMU is not set
CONFIG_VFIO_PCI=m
CONFIG_VFIO_PCI_VGA=y
CONFIG_VFIO_PCI_MMAP=y
CONFIG_VFIO_PCI_INTX=y
+CONFIG_VFIO_PCI_IGD=y
CONFIG_IRQ_BYPASS_MANAGER=m
CONFIG_VIRT_DRIVERS=y
CONFIG_VIRTIO=m
@@ -6074,8 +6266,10 @@ CONFIG_COMEDI_ADL_PCI8164=m
CONFIG_COMEDI_ADL_PCI9111=m
CONFIG_COMEDI_ADL_PCI9118=m
CONFIG_COMEDI_ADV_PCI1710=m
+CONFIG_COMEDI_ADV_PCI1720=m
CONFIG_COMEDI_ADV_PCI1723=m
CONFIG_COMEDI_ADV_PCI1724=m
+CONFIG_COMEDI_ADV_PCI1760=m
CONFIG_COMEDI_ADV_PCI_DIO=m
CONFIG_COMEDI_AMPLC_DIO200_PCI=m
CONFIG_COMEDI_AMPLC_PC236_PCI=m
@@ -6134,7 +6328,6 @@ CONFIG_COMEDI_AMPLC_PC236=m
CONFIG_COMEDI_DAS08=m
CONFIG_COMEDI_NI_LABPC=m
CONFIG_COMEDI_NI_TIO=m
-# CONFIG_PANEL is not set
CONFIG_RTL8192U=m
CONFIG_RTLLIB=m
CONFIG_RTLLIB_CRYPTO_CCMP=m
@@ -6144,9 +6337,6 @@ CONFIG_RTL8192E=m
CONFIG_R8712U=m
CONFIG_R8188EU=m
CONFIG_88EU_AP_MODE=y
-CONFIG_R8723AU=m
-CONFIG_8723AU_AP_MODE=y
-CONFIG_8723AU_BT_COEXIST=y
CONFIG_RTS5208=m
CONFIG_VT6655=m
CONFIG_VT6656=m
@@ -6160,11 +6350,8 @@ CONFIG_VT6656=m
#
# CONFIG_ADIS16201 is not set
# CONFIG_ADIS16203 is not set
-# CONFIG_ADIS16204 is not set
# CONFIG_ADIS16209 is not set
-# CONFIG_ADIS16220 is not set
# CONFIG_ADIS16240 is not set
-# CONFIG_LIS3L02DQ is not set
# CONFIG_SCA3000 is not set
#
@@ -6213,13 +6400,6 @@ CONFIG_VT6656=m
# CONFIG_TSL2x7x is not set
#
-# Magnetometer sensors
-#
-CONFIG_SENSORS_HMC5843=m
-CONFIG_SENSORS_HMC5843_I2C=m
-CONFIG_SENSORS_HMC5843_SPI=m
-
-#
# Active energy metering IC
#
# CONFIG_ADE7753 is not set
@@ -6238,8 +6418,6 @@ CONFIG_SENSORS_HMC5843_SPI=m
#
# Triggers - standalone
#
-# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set
-# CONFIG_IIO_SIMPLE_DUMMY is not set
# CONFIG_FB_SM750 is not set
CONFIG_FB_XGI=m
@@ -6258,12 +6436,10 @@ CONFIG_SPEAKUP_SYNTH_SOFT=m
CONFIG_SPEAKUP_SYNTH_SPKOUT=m
CONFIG_SPEAKUP_SYNTH_TXPRT=m
CONFIG_SPEAKUP_SYNTH_DUMMY=m
-CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m
CONFIG_STAGING_MEDIA=y
CONFIG_I2C_BCM2048=m
+# CONFIG_MEDIA_CEC is not set
CONFIG_DVB_CXD2099=m
-CONFIG_DVB_MN88472=m
-CONFIG_DVB_MN88473=m
CONFIG_LIRC_STAGING=y
CONFIG_LIRC_BT829=m
CONFIG_LIRC_IMON=m
@@ -6273,44 +6449,40 @@ CONFIG_LIRC_SERIAL=m
CONFIG_LIRC_SERIAL_TRANSMITTER=y
CONFIG_LIRC_SIR=m
CONFIG_LIRC_ZILOG=m
-# CONFIG_STAGING_RDMA is not set
#
# Android
#
-CONFIG_WIMAX_GDM72XX=m
-CONFIG_WIMAX_GDM72XX_QOS=y
-CONFIG_WIMAX_GDM72XX_K_MODE=y
-CONFIG_WIMAX_GDM72XX_WIMAX2=y
-CONFIG_WIMAX_GDM72XX_USB=y
-# CONFIG_WIMAX_GDM72XX_SDIO is not set
-CONFIG_WIMAX_GDM72XX_USB_PM=y
CONFIG_LTE_GDM724X=m
CONFIG_FIREWIRE_SERIAL=m
CONFIG_FWTTY_MAX_TOTAL_PORTS=64
CONFIG_FWTTY_MAX_CARD_PORTS=32
-# CONFIG_MTD_SPINAND_MT29F is not set
-CONFIG_LUSTRE_FS=m
-CONFIG_LUSTRE_OBD_MAX_IOCTL_BUFFER=8192
-# CONFIG_LUSTRE_DEBUG_EXPENSIVE_CHECK is not set
-CONFIG_LUSTRE_LLITE_LLOOP=m
CONFIG_LNET=m
CONFIG_LNET_MAX_PAYLOAD=1048576
CONFIG_LNET_SELFTEST=m
-CONFIG_LNET_XPRT_IB=m
+CONFIG_LUSTRE_FS=m
+CONFIG_LUSTRE_OBD_MAX_IOCTL_BUFFER=8192
+# CONFIG_LUSTRE_DEBUG_EXPENSIVE_CHECK is not set
CONFIG_DGNC=m
-CONFIG_DGAP=m
CONFIG_GS_FPGABOOT=m
-CONFIG_CRYPTO_SKEIN=y
+# CONFIG_CRYPTO_SKEIN is not set
# CONFIG_UNISYSSPAR is not set
# CONFIG_FB_TFT is not set
-# CONFIG_WILC1000_DRIVER is not set
+# CONFIG_WILC1000_SDIO is not set
+# CONFIG_WILC1000_SPI is not set
# CONFIG_MOST is not set
+
+#
+# Old ISDN4Linux (deprecated)
+#
+# CONFIG_KS7010 is not set
+# CONFIG_GREYBUS is not set
CONFIG_X86_PLATFORM_DEVICES=y
CONFIG_ACER_WMI=m
CONFIG_ACERHDF=m
CONFIG_ALIENWARE_WMI=m
CONFIG_ASUS_LAPTOP=m
+CONFIG_DELL_SMBIOS=m
CONFIG_DELL_LAPTOP=m
CONFIG_DELL_WMI=m
CONFIG_DELL_WMI_AIO=m
@@ -6342,6 +6514,7 @@ CONFIG_EEEPC_LAPTOP=m
CONFIG_ASUS_WMI=m
CONFIG_ASUS_NB_WMI=m
CONFIG_EEEPC_WMI=m
+CONFIG_ASUS_WIRELESS=m
CONFIG_ACPI_WMI=m
CONFIG_MSI_WMI=m
CONFIG_TOPSTAR_LAPTOP=m
@@ -6350,7 +6523,10 @@ CONFIG_TOSHIBA_BT_RFKILL=m
CONFIG_TOSHIBA_HAPS=m
CONFIG_TOSHIBA_WMI=m
CONFIG_ACPI_CMPC=m
+CONFIG_INTEL_HID_EVENT=m
+CONFIG_INTEL_VBTN=m
CONFIG_INTEL_IPS=m
+CONFIG_INTEL_PMC_CORE=y
CONFIG_IBM_RTL=m
CONFIG_SAMSUNG_LAPTOP=m
CONFIG_MXM_WMI=m
@@ -6358,16 +6534,19 @@ CONFIG_INTEL_OAKTRAIL=m
CONFIG_SAMSUNG_Q10=m
CONFIG_APPLE_GMUX=m
CONFIG_INTEL_RST=m
-CONFIG_INTEL_SMARTCONNECT=y
+CONFIG_INTEL_SMARTCONNECT=m
CONFIG_PVPANIC=m
CONFIG_INTEL_PMC_IPC=m
CONFIG_SURFACE_PRO3_BUTTON=m
+CONFIG_INTEL_PUNIT_IPC=m
+CONFIG_INTEL_TELEMETRY=m
CONFIG_CHROME_PLATFORMS=y
CONFIG_CHROMEOS_LAPTOP=m
CONFIG_CHROMEOS_PSTORE=m
CONFIG_CROS_EC_CHARDEV=m
CONFIG_CROS_EC_LPC=m
CONFIG_CROS_EC_PROTO=y
+CONFIG_CROS_KBD_LED_BACKLIGHT=m
CONFIG_CLKDEV_LOOKUP=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_COMMON_CLK=y
@@ -6376,8 +6555,11 @@ CONFIG_COMMON_CLK=y
# Common Clock Framework
#
# CONFIG_COMMON_CLK_SI5351 is not set
-# CONFIG_COMMON_CLK_PXA is not set
# CONFIG_COMMON_CLK_CDCE706 is not set
+# CONFIG_COMMON_CLK_CS2000_CP is not set
+# CONFIG_COMMON_CLK_NXP is not set
+# CONFIG_COMMON_CLK_PXA is not set
+# CONFIG_COMMON_CLK_PIC32 is not set
#
# Hardware Spinlock drivers
@@ -6403,7 +6585,6 @@ CONFIG_IOMMU_SUPPORT=y
#
CONFIG_IOMMU_IOVA=y
CONFIG_AMD_IOMMU=y
-# CONFIG_AMD_IOMMU_STATS is not set
CONFIG_AMD_IOMMU_V2=m
CONFIG_DMAR_TABLE=y
CONFIG_INTEL_IOMMU=y
@@ -6425,6 +6606,10 @@ CONFIG_STE_MODEM_RPROC=m
#
# SOC (System On Chip) specific Drivers
#
+
+#
+# Broadcom SoC drivers
+#
# CONFIG_SUNXI_SRAM is not set
# CONFIG_SOC_TI is not set
CONFIG_PM_DEVFREQ=y
@@ -6436,6 +6621,7 @@ CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m
CONFIG_DEVFREQ_GOV_PERFORMANCE=m
CONFIG_DEVFREQ_GOV_POWERSAVE=m
CONFIG_DEVFREQ_GOV_USERSPACE=m
+CONFIG_DEVFREQ_GOV_PASSIVE=m
#
# DEVFREQ Drivers
@@ -6449,6 +6635,8 @@ CONFIG_EXTCON=m
# CONFIG_EXTCON_ADC_JACK is not set
# CONFIG_EXTCON_ARIZONA is not set
CONFIG_EXTCON_GPIO=m
+# CONFIG_EXTCON_MAX3355 is not set
+# CONFIG_EXTCON_QCOM_SPMI_MISC is not set
# CONFIG_EXTCON_RT8973A is not set
CONFIG_EXTCON_SM5502=m
# CONFIG_EXTCON_USB_GPIO is not set
@@ -6458,24 +6646,34 @@ CONFIG_IIO_BUFFER=y
CONFIG_IIO_BUFFER_CB=m
CONFIG_IIO_KFIFO_BUF=m
CONFIG_IIO_TRIGGERED_BUFFER=m
+CONFIG_IIO_CONFIGFS=m
CONFIG_IIO_TRIGGER=y
CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
+CONFIG_IIO_SW_DEVICE=m
+CONFIG_IIO_SW_TRIGGER=m
#
# Accelerometers
#
# CONFIG_BMA180 is not set
+# CONFIG_BMA220 is not set
# CONFIG_BMC150_ACCEL is not set
+# CONFIG_DMARD09 is not set
CONFIG_HID_SENSOR_ACCEL_3D=m
CONFIG_IIO_ST_ACCEL_3AXIS=m
CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m
CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m
# CONFIG_KXSD9 is not set
CONFIG_KXCJK1013=m
+# CONFIG_MC3230 is not set
+# CONFIG_MMA7455_I2C is not set
+# CONFIG_MMA7455_SPI is not set
+CONFIG_MMA7660=m
# CONFIG_MMA8452 is not set
# CONFIG_MMA9551 is not set
# CONFIG_MMA9553 is not set
# CONFIG_MXC4005 is not set
+# CONFIG_MXC6255 is not set
# CONFIG_STK8312 is not set
# CONFIG_STK8BA50 is not set
@@ -6492,6 +6690,8 @@ CONFIG_KXCJK1013=m
# CONFIG_AD7923 is not set
# CONFIG_AD799X is not set
# CONFIG_HI8435 is not set
+# CONFIG_INA2XX_ADC is not set
+# CONFIG_LTC2485 is not set
# CONFIG_MAX1027 is not set
# CONFIG_MAX1363 is not set
# CONFIG_MCP320X is not set
@@ -6500,7 +6700,11 @@ CONFIG_KXCJK1013=m
# CONFIG_QCOM_SPMI_IADC is not set
# CONFIG_QCOM_SPMI_VADC is not set
# CONFIG_TI_ADC081C is not set
+# CONFIG_TI_ADC0832 is not set
+# CONFIG_TI_ADC12138 is not set
# CONFIG_TI_ADC128S052 is not set
+# CONFIG_TI_ADC161S626 is not set
+# CONFIG_TI_ADS1015 is not set
# CONFIG_TI_AM335X_ADC is not set
# CONFIG_VIPERBOARD_ADC is not set
@@ -6512,6 +6716,8 @@ CONFIG_KXCJK1013=m
#
# Chemical Sensors
#
+# CONFIG_ATLAS_PH_SENSOR is not set
+# CONFIG_IAQCORE is not set
# CONFIG_VZ89X is not set
#
@@ -6537,19 +6743,28 @@ CONFIG_IIO_ST_SENSORS_CORE=m
# CONFIG_AD5421 is not set
# CONFIG_AD5446 is not set
# CONFIG_AD5449 is not set
+# CONFIG_AD5592R is not set
+# CONFIG_AD5593R is not set
# CONFIG_AD5504 is not set
# CONFIG_AD5624R_SPI is not set
# CONFIG_AD5686 is not set
# CONFIG_AD5755 is not set
+# CONFIG_AD5761 is not set
# CONFIG_AD5764 is not set
# CONFIG_AD5791 is not set
# CONFIG_AD7303 is not set
+# CONFIG_AD8801 is not set
# CONFIG_M62332 is not set
# CONFIG_MAX517 is not set
# CONFIG_MCP4725 is not set
# CONFIG_MCP4922 is not set
#
+# IIO dummy driver
+#
+# CONFIG_IIO_SIMPLE_DUMMY is not set
+
+#
# Frequency Synthesizers DDS/PLL
#
@@ -6579,8 +6794,20 @@ CONFIG_IIO_ST_GYRO_SPI_3AXIS=m
# CONFIG_ITG3200 is not set
#
+# Health Sensors
+#
+
+#
+# Heart Rate Monitors
+#
+# CONFIG_AFE4403 is not set
+# CONFIG_AFE4404 is not set
+CONFIG_MAX30100=m
+
+#
# Humidity sensors
#
+# CONFIG_AM2315 is not set
# CONFIG_DHT11 is not set
# CONFIG_HDC100X is not set
# CONFIG_HTU21 is not set
@@ -6592,8 +6819,11 @@ CONFIG_IIO_ST_GYRO_SPI_3AXIS=m
#
# CONFIG_ADIS16400 is not set
# CONFIG_ADIS16480 is not set
+# CONFIG_BMI160_I2C is not set
+# CONFIG_BMI160_SPI is not set
# CONFIG_KMX61 is not set
-# CONFIG_INV_MPU6050_IIO is not set
+# CONFIG_INV_MPU6050_I2C is not set
+# CONFIG_INV_MPU6050_SPI is not set
#
# Light sensors
@@ -6604,6 +6834,7 @@ CONFIG_ACPI_ALS=m
# CONFIG_APDS9300 is not set
# CONFIG_APDS9960 is not set
CONFIG_BH1750=m
+CONFIG_BH1780=m
# CONFIG_CM32181 is not set
# CONFIG_CM3232 is not set
# CONFIG_CM3323 is not set
@@ -6616,8 +6847,10 @@ CONFIG_HID_SENSOR_ALS=m
CONFIG_RPR0521=m
# CONFIG_SENSORS_LM3533 is not set
# CONFIG_LTR501 is not set
+# CONFIG_MAX44000 is not set
CONFIG_OPT3001=m
CONFIG_PA12203001=m
+# CONFIG_SI1145 is not set
CONFIG_STK3310=m
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
@@ -6625,19 +6858,24 @@ CONFIG_STK3310=m
# CONFIG_TSL4531 is not set
# CONFIG_US5182D is not set
# CONFIG_VCNL4000 is not set
+# CONFIG_VEML6070 is not set
#
# Magnetometer sensors
#
# CONFIG_AK8975 is not set
# CONFIG_AK09911 is not set
-# CONFIG_BMC150_MAGN is not set
+# CONFIG_BMC150_MAGN_I2C is not set
+# CONFIG_BMC150_MAGN_SPI is not set
# CONFIG_MAG3110 is not set
CONFIG_HID_SENSOR_MAGNETOMETER_3D=m
# CONFIG_MMC35240 is not set
CONFIG_IIO_ST_MAGN_3AXIS=m
CONFIG_IIO_ST_MAGN_I2C_3AXIS=m
CONFIG_IIO_ST_MAGN_SPI_3AXIS=m
+CONFIG_SENSORS_HMC5843=m
+CONFIG_SENSORS_HMC5843_I2C=m
+CONFIG_SENSORS_HMC5843_SPI=m
#
# Inclinometer sensors
@@ -6648,25 +6886,35 @@ CONFIG_HID_SENSOR_DEVICE_ROTATION=m
#
# Triggers - standalone
#
+# CONFIG_IIO_HRTIMER_TRIGGER is not set
CONFIG_IIO_INTERRUPT_TRIGGER=m
+CONFIG_IIO_TIGHTLOOP_TRIGGER=m
# CONFIG_IIO_SYSFS_TRIGGER is not set
#
# Digital potentiometers
#
+# CONFIG_DS1803 is not set
+# CONFIG_MAX5487 is not set
+# CONFIG_MCP4131 is not set
# CONFIG_MCP4531 is not set
+# CONFIG_TPL0102 is not set
#
# Pressure sensors
#
# CONFIG_BMP280 is not set
# CONFIG_HID_SENSOR_PRESS is not set
-# CONFIG_MPL115 is not set
+# CONFIG_HP03 is not set
+# CONFIG_MPL115_I2C is not set
+# CONFIG_MPL115_SPI is not set
# CONFIG_MPL3115 is not set
# CONFIG_MS5611 is not set
# CONFIG_MS5637 is not set
# CONFIG_IIO_ST_PRESS is not set
# CONFIG_T5403 is not set
+# CONFIG_HP206C is not set
+# CONFIG_ZPA2326 is not set
#
# Lightning sensors
@@ -6682,6 +6930,7 @@ CONFIG_IIO_INTERRUPT_TRIGGER=m
#
# Temperature sensors
#
+# CONFIG_MAXIM_THERMOCOUPLE is not set
# CONFIG_MLX90614 is not set
# CONFIG_TMP006 is not set
# CONFIG_TSYS01 is not set
@@ -6689,10 +6938,21 @@ CONFIG_IIO_INTERRUPT_TRIGGER=m
# CONFIG_NTB is not set
# CONFIG_VME_BUS is not set
# CONFIG_PWM is not set
+CONFIG_ARM_GIC_MAX_NR=1
CONFIG_IPACK_BUS=m
CONFIG_BOARD_TPCI200=m
CONFIG_SERIAL_IPOCTAL=m
CONFIG_RESET_CONTROLLER=y
+# CONFIG_RESET_ATH79 is not set
+# CONFIG_RESET_BERLIN is not set
+# CONFIG_RESET_LPC18XX is not set
+# CONFIG_RESET_MESON is not set
+# CONFIG_RESET_PISTACHIO is not set
+# CONFIG_RESET_SOCFPGA is not set
+# CONFIG_RESET_STM32 is not set
+# CONFIG_RESET_SUNXI is not set
+# CONFIG_TI_SYSCON_RESET is not set
+# CONFIG_RESET_ZYNQ is not set
CONFIG_FMC=m
CONFIG_FMC_FAKEDEV=m
CONFIG_FMC_TRIVIAL=m
@@ -6714,7 +6974,7 @@ CONFIG_INTEL_RAPL=m
# Performance monitor support
#
CONFIG_RAS=y
-CONFIG_AMD_MCE_INJ=m
+# CONFIG_MCE_AMD_INJ is not set
CONFIG_THUNDERBOLT=m
#
@@ -6727,11 +6987,24 @@ CONFIG_ND_BLK=m
CONFIG_ND_CLAIM=y
CONFIG_ND_BTT=m
CONFIG_BTT=y
-# CONFIG_NVMEM is not set
-# CONFIG_STM is not set
+CONFIG_ND_PFN=m
+CONFIG_NVDIMM_PFN=y
+CONFIG_NVDIMM_DAX=y
+CONFIG_DEV_DAX=m
+CONFIG_DEV_DAX_PMEM=m
+CONFIG_NR_DEV_DAX=32768
+CONFIG_NVMEM=m
+CONFIG_STM=m
# CONFIG_STM_DUMMY is not set
-# CONFIG_STM_SOURCE_CONSOLE is not set
-# CONFIG_INTEL_TH is not set
+CONFIG_STM_SOURCE_CONSOLE=m
+CONFIG_STM_SOURCE_HEARTBEAT=m
+CONFIG_INTEL_TH=m
+CONFIG_INTEL_TH_PCI=m
+CONFIG_INTEL_TH_GTH=m
+CONFIG_INTEL_TH_STH=m
+CONFIG_INTEL_TH_MSU=m
+CONFIG_INTEL_TH_PTI=m
+# CONFIG_INTEL_TH_DEBUG is not set
#
# FPGA Configuration Support
@@ -6751,6 +7024,8 @@ CONFIG_DMI_SYSFS=m
CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y
CONFIG_ISCSI_IBFT_FIND=y
CONFIG_ISCSI_IBFT=m
+CONFIG_FW_CFG_SYSFS=m
+# CONFIG_FW_CFG_SYSFS_CMDLINE is not set
# CONFIG_GOOGLE_FIRMWARE is not set
#
@@ -6761,19 +7036,23 @@ CONFIG_EFI_ESRT=y
CONFIG_EFI_RUNTIME_MAP=y
# CONFIG_EFI_FAKE_MEMMAP is not set
CONFIG_EFI_RUNTIME_WRAPPERS=y
+CONFIG_EFI_CAPSULE_LOADER=m
+# CONFIG_EFI_TEST is not set
CONFIG_UEFI_CPER=y
#
# File systems
#
CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_FS_IOMAP=y
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
CONFIG_EXT4_FS=m
CONFIG_EXT4_USE_FOR_EXT2=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
-# CONFIG_EXT4_ENCRYPTION is not set
+CONFIG_EXT4_ENCRYPTION=y
+CONFIG_EXT4_FS_ENCRYPTION=y
# CONFIG_EXT4_DEBUG is not set
CONFIG_JBD2=m
# CONFIG_JBD2_DEBUG is not set
@@ -6818,10 +7097,14 @@ CONFIG_F2FS_FS_SECURITY=y
CONFIG_F2FS_CHECK_FS=y
CONFIG_F2FS_FS_ENCRYPTION=y
# CONFIG_F2FS_IO_TRACE is not set
+# CONFIG_F2FS_FAULT_INJECTION is not set
# CONFIG_FS_DAX is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y
+CONFIG_EXPORTFS_BLOCK_OPS=y
CONFIG_FILE_LOCKING=y
+# CONFIG_MANDATORY_FILE_LOCKING is not set
+CONFIG_FS_ENCRYPTION=m
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
@@ -6870,6 +7153,7 @@ CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_FAT_DEFAULT_UTF8 is not set
CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set
CONFIG_NTFS_RW=y
@@ -6890,9 +7174,11 @@ CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TMPFS_XATTR=y
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
+CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
CONFIG_CONFIGFS_FS=y
CONFIG_EFIVAR_FS=y
CONFIG_MISC_FILESYSTEMS=y
+CONFIG_ORANGEFS_FS=m
# CONFIG_ADFS_FS is not set
CONFIG_AFFS_FS=m
CONFIG_ECRYPT_FS=m
@@ -6948,10 +7234,13 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
# CONFIG_ROMFS_BACKED_BY_BOTH is not set
CONFIG_ROMFS_ON_BLOCK=y
CONFIG_PSTORE=y
+CONFIG_PSTORE_ZLIB_COMPRESS=y
+# CONFIG_PSTORE_LZO_COMPRESS is not set
+# CONFIG_PSTORE_LZ4_COMPRESS is not set
# CONFIG_PSTORE_CONSOLE is not set
# CONFIG_PSTORE_PMSG is not set
# CONFIG_PSTORE_FTRACE is not set
-CONFIG_PSTORE_RAM=m
+CONFIG_PSTORE_RAM=y
# CONFIG_SYSV_FS is not set
CONFIG_UFS_FS=m
# CONFIG_UFS_FS_WRITE is not set
@@ -6985,6 +7274,9 @@ CONFIG_NFSD_V3=y
CONFIG_NFSD_V3_ACL=y
CONFIG_NFSD_V4=y
CONFIG_NFSD_PNFS=y
+CONFIG_NFSD_BLOCKLAYOUT=y
+CONFIG_NFSD_SCSILAYOUT=y
+# CONFIG_NFSD_FLEXFILELAYOUT is not set
CONFIG_NFSD_V4_SECURITY_LABEL=y
# CONFIG_NFSD_FAULT_INJECTION is not set
CONFIG_GRACE_PERIOD=m
@@ -7005,7 +7297,7 @@ CONFIG_CEPH_FS_POSIX_ACL=y
CONFIG_CIFS=m
CONFIG_CIFS_STATS=y
# CONFIG_CIFS_STATS2 is not set
-CONFIG_CIFS_WEAK_PW_HASH=y
+# CONFIG_CIFS_WEAK_PW_HASH is not set
CONFIG_CIFS_UPCALL=y
CONFIG_CIFS_XATTR=y
CONFIG_CIFS_POSIX=y
@@ -7015,15 +7307,7 @@ CONFIG_CIFS_DFS_UPCALL=y
CONFIG_CIFS_SMB2=y
CONFIG_CIFS_SMB311=y
CONFIG_CIFS_FSCACHE=y
-CONFIG_NCP_FS=m
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-CONFIG_NCPFS_NFS_NS=y
-CONFIG_NCPFS_OS2_NS=y
-CONFIG_NCPFS_SMALLDOS=y
-CONFIG_NCPFS_NLS=y
-# CONFIG_NCPFS_EXTRAS is not set
+# CONFIG_NCP_FS is not set
CONFIG_CODA_FS=m
CONFIG_AFS_FS=m
# CONFIG_AFS_DEBUG is not set
@@ -7103,7 +7387,7 @@ CONFIG_DYNAMIC_DEBUG=y
# Compile-time checks and compiler options
#
# CONFIG_DEBUG_INFO is not set
-CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_FRAME_WARN=2048
CONFIG_STRIP_ASM_SYMS=y
@@ -7116,6 +7400,7 @@ CONFIG_DEBUG_FS=y
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
CONFIG_ARCH_WANT_FRAME_POINTERS=y
CONFIG_FRAME_POINTER=y
+CONFIG_STACK_VALIDATION=y
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x0
@@ -7126,6 +7411,8 @@ CONFIG_DEBUG_KERNEL=y
#
# CONFIG_PAGE_EXTENSION is not set
# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_PAGE_POISONING is not set
+# CONFIG_DEBUG_PAGE_REF is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
@@ -7141,6 +7428,8 @@ CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_HAVE_ARCH_KMEMCHECK=y
CONFIG_HAVE_ARCH_KASAN=y
# CONFIG_KASAN is not set
+CONFIG_ARCH_HAS_KCOV=y
+# CONFIG_KCOV is not set
# CONFIG_DEBUG_SHIRQ is not set
#
@@ -7156,6 +7445,7 @@ CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_WQ_WATCHDOG is not set
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
@@ -7194,21 +7484,21 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_PROVE_RCU is not set
# CONFIG_SPARSE_RCU_POINTER is not set
# CONFIG_TORTURE_TEST is not set
+# CONFIG_RCU_PERF_TEST is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=60
# CONFIG_RCU_TRACE is not set
# CONFIG_RCU_EQS_DEBUG is not set
+# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
-CONFIG_ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS=y
-# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
CONFIG_USER_STACKTRACE_SUPPORT=y
CONFIG_NOP_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
@@ -7229,6 +7519,7 @@ CONFIG_FUNCTION_TRACER=y
CONFIG_FUNCTION_GRAPH_TRACER=y
# CONFIG_IRQSOFF_TRACER is not set
CONFIG_SCHED_TRACER=y
+CONFIG_HWLAT_TRACER=y
CONFIG_FTRACE_SYSCALLS=y
CONFIG_TRACER_SNAPSHOT=y
# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set
@@ -7247,6 +7538,7 @@ CONFIG_FUNCTION_PROFILER=y
CONFIG_FTRACE_MCOUNT_RECORD=y
# CONFIG_FTRACE_STARTUP_TEST is not set
CONFIG_MMIOTRACE=y
+# CONFIG_HIST_TRIGGERS is not set
# CONFIG_MMIOTRACE_TEST is not set
# CONFIG_TRACEPOINT_BENCHMARK is not set
CONFIG_RING_BUFFER_BENCHMARK=m
@@ -7270,7 +7562,10 @@ CONFIG_ASYNC_RAID6_TEST=m
# CONFIG_TEST_STRING_HELPERS is not set
CONFIG_TEST_KSTRTOX=m
# CONFIG_TEST_PRINTF is not set
+# CONFIG_TEST_BITMAP is not set
+# CONFIG_TEST_UUID is not set
# CONFIG_TEST_RHASHTABLE is not set
+# CONFIG_TEST_HASH is not set
# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set
# CONFIG_DMA_API_DEBUG is not set
# CONFIG_TEST_LKM is not set
@@ -7283,7 +7578,12 @@ CONFIG_TEST_KSTRTOX=m
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
+CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y
+# CONFIG_ARCH_WANTS_UBSAN_NO_NULL is not set
+# CONFIG_UBSAN is not set
+CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
CONFIG_STRICT_DEVMEM=y
+CONFIG_IO_STRICT_DEVMEM=y
# CONFIG_X86_VERBOSE_BOOTUP is not set
CONFIG_EARLY_PRINTK=y
# CONFIG_EARLY_PRINTK_DBGP is not set
@@ -7291,7 +7591,6 @@ CONFIG_EARLY_PRINTK_EFI=y
# CONFIG_X86_PTDUMP_CORE is not set
# CONFIG_X86_PTDUMP is not set
# CONFIG_EFI_PGT_DUMP is not set
-CONFIG_DEBUG_RODATA=y
# CONFIG_DEBUG_RODATA_TEST is not set
# CONFIG_DEBUG_WX is not set
CONFIG_DEBUG_SET_MODULE_RONX=y
@@ -7316,7 +7615,6 @@ CONFIG_DEFAULT_IO_DELAY_TYPE=0
# CONFIG_OPTIMIZE_INLINING is not set
# CONFIG_DEBUG_ENTRY is not set
# CONFIG_DEBUG_NMI_SELFTEST is not set
-# CONFIG_X86_DEBUG_STATIC_CPU_HAS is not set
# CONFIG_X86_DEBUG_FPU is not set
# CONFIG_PUNIT_ATOM_DEBUG is not set
@@ -7325,18 +7623,22 @@ CONFIG_DEFAULT_IO_DELAY_TYPE=0
#
CONFIG_KEYS=y
CONFIG_PERSISTENT_KEYRINGS=y
-CONFIG_BIG_KEYS=y
CONFIG_TRUSTED_KEYS=m
CONFIG_ENCRYPTED_KEYS=m
+CONFIG_KEY_DH_OPERATIONS=y
# CONFIG_SECURITY_DMESG_RESTRICT is not set
CONFIG_SECURITY=y
CONFIG_SECURITYFS=y
# CONFIG_SECURITY_NETWORK is not set
CONFIG_SECURITY_PATH=y
# CONFIG_INTEL_TXT is not set
+CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
+CONFIG_HAVE_ARCH_HARDENED_USERCOPY=y
+CONFIG_HARDENED_USERCOPY=y
# CONFIG_SECURITY_SMACK is not set
# CONFIG_SECURITY_TOMOYO is not set
# CONFIG_SECURITY_APPARMOR is not set
+# CONFIG_SECURITY_LOADPIN is not set
CONFIG_SECURITY_YAMA=y
CONFIG_INTEGRITY=y
# CONFIG_INTEGRITY_SIGNATURE is not set
@@ -7359,19 +7661,21 @@ CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=m
CONFIG_CRYPTO_AEAD2=y
-CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG=m
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=m
-CONFIG_CRYPTO_PCOMP=m
-CONFIG_CRYPTO_PCOMP2=y
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_AKCIPHER=m
+CONFIG_CRYPTO_KPP2=y
+CONFIG_CRYPTO_KPP=m
CONFIG_CRYPTO_RSA=m
-CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_DH=m
+CONFIG_CRYPTO_ECDH=m
+CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_USER=m
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
@@ -7402,7 +7706,7 @@ CONFIG_CRYPTO_ECHAINIV=m
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_CTR=m
CONFIG_CRYPTO_CTS=m
-CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_XTS=m
@@ -7440,8 +7744,11 @@ CONFIG_CRYPTO_SHA1_SSSE3=m
CONFIG_CRYPTO_SHA256_SSSE3=m
CONFIG_CRYPTO_SHA512_SSSE3=m
CONFIG_CRYPTO_SHA1_MB=m
+CONFIG_CRYPTO_SHA256_MB=m
+CONFIG_CRYPTO_SHA512_MB=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m
@@ -7490,7 +7797,6 @@ CONFIG_CRYPTO_TWOFISH_AVX_X86_64=m
# Compression
#
CONFIG_CRYPTO_DEFLATE=m
-CONFIG_CRYPTO_ZLIB=m
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_842=m
CONFIG_CRYPTO_LZ4=m
@@ -7521,25 +7827,29 @@ CONFIG_CRYPTO_DEV_CCP_DD=m
CONFIG_CRYPTO_DEV_CCP_CRYPTO=m
CONFIG_CRYPTO_DEV_QAT=m
CONFIG_CRYPTO_DEV_QAT_DH895xCC=m
+CONFIG_CRYPTO_DEV_QAT_C3XXX=m
+CONFIG_CRYPTO_DEV_QAT_C62X=m
CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m
-CONFIG_ASYMMETRIC_KEY_TYPE=m
+CONFIG_CRYPTO_DEV_QAT_C3XXXVF=m
+CONFIG_CRYPTO_DEV_QAT_C62XVF=m
+CONFIG_CRYPTO_DEV_CHELSIO=m
+CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m
-CONFIG_PUBLIC_KEY_ALGO_RSA=m
CONFIG_X509_CERTIFICATE_PARSER=m
CONFIG_PKCS7_MESSAGE_PARSER=m
-CONFIG_PKCS7_TEST_KEY=m
#
# Certificates for signature checking
#
CONFIG_SYSTEM_TRUSTED_KEYRING=y
CONFIG_SYSTEM_TRUSTED_KEYS=""
+# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set
+CONFIG_SECONDARY_TRUSTED_KEYRING=y
CONFIG_HAVE_KVM=y
CONFIG_HAVE_KVM_IRQCHIP=y
CONFIG_HAVE_KVM_IRQFD=y
CONFIG_HAVE_KVM_IRQ_ROUTING=y
CONFIG_HAVE_KVM_EVENTFD=y
-CONFIG_KVM_APIC_ARCHITECTURE=y
CONFIG_KVM_MMIO=y
CONFIG_KVM_ASYNC_PF=y
CONFIG_HAVE_KVM_MSI=y
@@ -7554,6 +7864,11 @@ CONFIG_KVM_INTEL=m
CONFIG_KVM_AMD=m
CONFIG_KVM_MMU_AUDIT=y
CONFIG_KVM_DEVICE_ASSIGNMENT=y
+CONFIG_VHOST_NET=m
+CONFIG_VHOST_SCSI=m
+CONFIG_VHOST_VSOCK=m
+CONFIG_VHOST=m
+# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set
CONFIG_BINARY_PRINTF=y
#
@@ -7572,7 +7887,7 @@ CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IO=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
-CONFIG_CRC_CCITT=m
+CONFIG_CRC_CCITT=y
CONFIG_CRC16=m
CONFIG_CRC_T10DIF=y
CONFIG_CRC_ITU_T=m
@@ -7612,18 +7927,16 @@ CONFIG_DECOMPRESS_XZ=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_REED_SOLOMON=m
+CONFIG_REED_SOLOMON=y
CONFIG_REED_SOLOMON_ENC8=y
CONFIG_REED_SOLOMON_DEC8=y
-CONFIG_REED_SOLOMON_DEC16=y
-CONFIG_BCH=m
-CONFIG_BCH_CONST_PARAMS=y
CONFIG_TEXTSEARCH=y
CONFIG_TEXTSEARCH_KMP=m
CONFIG_TEXTSEARCH_BM=m
CONFIG_TEXTSEARCH_FSM=m
CONFIG_BTREE=y
CONFIG_INTERVAL_TREE=y
+CONFIG_RADIX_TREE_MULTIORDER=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
@@ -7634,12 +7947,12 @@ CONFIG_DQL=y
CONFIG_GLOB=y
# CONFIG_GLOB_SELFTEST is not set
CONFIG_NLATTR=y
-CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_LRU_CACHE=m
CONFIG_CLZ_TAB=y
CONFIG_CORDIC=m
CONFIG_DDR=y
-CONFIG_MPILIB=m
+CONFIG_IRQ_POLL=y
+CONFIG_MPILIB=y
CONFIG_OID_REGISTRY=m
CONFIG_UCS2_STRING=y
CONFIG_FONT_SUPPORT=y
@@ -7657,6 +7970,8 @@ CONFIG_FONT_8x16=y
# CONFIG_FONT_10x18 is not set
CONFIG_FONT_AUTOSELECT=y
# CONFIG_SG_SPLIT is not set
+CONFIG_SG_POOL=y
CONFIG_ARCH_HAS_SG_CHAIN=y
CONFIG_ARCH_HAS_PMEM_API=y
CONFIG_ARCH_HAS_MMIO_FLUSH=y
+CONFIG_SBITMAP=y
diff --git a/linux-lts.install b/linux-lts.install
index dbc0cc4832e..0893e296029 100644
--- a/linux-lts.install
+++ b/linux-lts.install
@@ -8,8 +8,6 @@ post_install () {
# updating module dependencies
echo ">>> Updating module dependencies. Please wait ..."
depmod ${KERNEL_VERSION}
- echo ">>> Generating initial ramdisk, using mkinitcpio. Please wait..."
- mkinitcpio -p linux${KERNEL_NAME}
}
post_upgrade() {
@@ -20,8 +18,6 @@ post_upgrade() {
# updating module dependencies
echo ">>> Updating module dependencies. Please wait ..."
depmod ${KERNEL_VERSION}
- echo ">>> Generating initial ramdisk, using mkinitcpio. Please wait..."
- mkinitcpio -p linux${KERNEL_NAME}
if [ $(vercmp $2 3.13) -lt 0 ]; then
echo ">>> WARNING: AT keyboard support is no longer built into the kernel."
diff --git a/linux-lts.preset b/linux-lts.preset
index d26d36baef9..7300e9c80f9 100644
--- a/linux-lts.preset
+++ b/linux-lts.preset
@@ -10,5 +10,5 @@ default_image="/boot/initramfs-linux-lts.img"
#default_options=""
#fallback_config="/etc/mkinitcpio.conf"
-fallback_image="/boot/initramfs-linux-lts-fallback.img"
+fallback_image="/boot/initramfs-linux-lts-fallback.img"
fallback_options="-S autodetect"