Update to 5.11.17rc1-1

8 files changed, 484 insertions, 25 deletions

diff --git a/.SRCINFO b/.SRCINFO
index a7416ef8587e..2b1f1f4afac2 100644
--- a/.SRCINFO
+++ b/.SRCINFO
@@ -1,6 +1,6 @@
 pkgbase = linux-rc
-	pkgver = 5.11.14rc1
-	pkgrel = 2
+	pkgver = 5.11.17rc1
+	pkgrel = 1
 	url = https://www.kernel.org/
 	arch = x86_64
 	license = GPL2
@@ -12,20 +12,28 @@ pkgbase = linux-rc
 	makedepends = tar
 	makedepends = xz
 	options = !strip
-	source = https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.11.14-rc1.xz
-	source = https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.11.14-rc1.sign
-	source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.13.tar.xz
-	source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.13.tar.sign
+	source = https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.11.17-rc1.xz
+	source = https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.11.17-rc1.sign
+	source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.16.tar.xz
+	source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.16.tar.sign
 	source = config
 	source = 0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
+	source = 0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch
+	source = 0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch
+	source = 0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch
+	source = 0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-t.patch
 	validpgpkeys = ABAF11C65A2970B130ABE3C479BE3E4300411886
 	validpgpkeys = 647F28654894E3BD457199BE38DBBDC86092693E
-	b2sums = 1146f808dee9bf29b02e135caea52ee49ea8cbc6d4718ecddd9a296239484baa9d06f5968495949973fe22bddd2bd49dc85508cd12c7959d2291b3dc0e5f0d3b
+	b2sums = f4974eb6000b349713c86ee75bff06d64061509908ec96ea11459999bda9c1e289a48e9b08925aaf9b8eff428488ceaed44c4561cffb6c4c67302905a033e942
 	b2sums = SKIP
-	b2sums = fd9537a0eb265660ed25d12ff4098ca208035576c580f81cb6a1355eedde2748bdb65521641f68e626a1aee49e7494c79627015a376b7ee4a6373622605ac760
+	b2sums = fe7a296697d21ac4572b6714da898bc9303cf04f988297329e10d660a957ea6142a182fe583e7a98bf2f767f61989288454ecf640844346af079d90b4fdd21b1
 	b2sums = SKIP
-	b2sums = 837aeac7d38490f5457f53d2fcb1e114624b0e0b4931b50f016c6b3c7f67d5638df946b960d50b1a14c945229827c936e3f112fddffb80103cd60873fcd15e7d
-	b2sums = 2c197117aa915971edb97ec98233d4c394f6790829486403bc51732a18fe12338d82e680ccafd138153affe9830d815ee1b52c7d1f3ed7937bc7a0c1fac3a5ef
+	b2sums = bd8c382158f579c173ac68a7f27d3abfe52b1bd60413dea593534fa6c126d6a804e6dd98c2d9b1f402cd22c9bbd8f39bacaba7d96b13320bd529badba0ec3e0c
+	b2sums = 7f6962283f1439ed219c99328acbabea2b5493ee6a8ce476b51ee7f7a38fc741d0a2b546c79a4611acedb6808ac8ab3b3c8f3386837cfef64a343a26f9c84180
+	b2sums = a1f420194ee0c398ec4dd4fb94fd03eea2c156ac1daf89b1238adeb6085871a871099b291249255ebd8cf863c5ed9e8963a35828d9a1061f10554927574f1eac
+	b2sums = 10882461985bc99a22e9cceae7a80ba2fd2892a84abb528977ed154725419622c10a515d66a827c1cca567386483445ab3d3e6640439afe114a5c89feb2a69e7
+	b2sums = aa1f093e359ff743e8fe9d7dbbecc780fd7d3e46952c32c051bf1fa8572f2a8c456babedfb5076337274fc0c2f8e026b285eb7343ee8d0d617c446936a65604c
+	b2sums = 70d64a1af2c815f40f17abca038b2bc364d609dc857f8c5c08dd5b3293037b8da08e7e3ca9143d17c8c0d482f65b9a3c1d1e6d1b1244e4816e117b948f52570a
 
 pkgname = linux-rc
 	pkgdesc = The release candidate kernel and modules
diff --git a/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch b/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
index 0a774034cf71..6d4a5a6d9697 100644
--- a/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
+++ b/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
@@ -1,4 +1,4 @@
-From f904ba21627dd22bd38c9696bd542fecc7abe429 Mon Sep 17 00:00:00 2001
+From e8731a36ed9d0652a25b4a018b0cb92dec65edb7 Mon Sep 17 00:00:00 2001
 From: "Jan Alexander Steffens (heftig)" <jan.steffens@gmail.com>
 Date: Mon, 16 Sep 2019 04:53:20 +0200
 Subject: [PATCH 1/6] ZEN: Add sysctl and CONFIG to disallow unprivileged
@@ -36,10 +36,10 @@ index 64cf8ebdc4ec..bd29529ac188 100644
  {
  	return &init_user_ns;
 diff --git a/init/Kconfig b/init/Kconfig
-index b7d3c6a12196..9e8a5351063e 100644
+index a3d27421de8f..7e27f080d186 100644
 --- a/init/Kconfig
 +++ b/init/Kconfig
-@@ -1172,6 +1172,22 @@ config USER_NS
+@@ -1171,6 +1171,22 @@ config USER_NS
  
  	  If unsure, say N.
  
diff --git a/0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch b/0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch
new file mode 100644
index 000000000000..a32b80674664
--- /dev/null
+++ b/0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch
@@ -0,0 +1,107 @@
+From 51281a71543d75213ee3c718019b569f863f4a37 Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@intel.com>
+Date: Wed, 17 Mar 2021 20:48:59 +0200
+Subject: [PATCH 2/6] drm/i915/ilk-glk: Fix link training on links with LTTPRs
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Cherry-picked from intel-drm-next 984982f3ef7b240cd24c2feb2762d81d9d8da3c2
+
+The spec requires to use at least 3.2ms for the AUX timeout period if
+there are LT-tunable PHY Repeaters on the link (2.11.2). An upcoming
+spec update makes this more specific, by requiring a 3.2ms minimum
+timeout period for the LTTPR detection reading the 0xF0000-0xF0007
+range (3.6.5.1).
+
+Accordingly disable LTTPR detection until GLK, where the maximum timeout
+we can set is only 1.6ms.
+
+Link training in the non-transparent mode is known to fail at least on
+some SKL systems with a WD19 dock on the link, which exposes an LTTPR
+(see the References below). While this could have different reasons
+besides the too short AUX timeout used, not detecting LTTPRs (and so not
+using the non-transparent LT mode) fixes link training on these systems.
+
+While at it add a code comment about the platform specific maximum
+timeout values.
+
+v2: Add a comment about the g4x maximum timeout as well. (Ville)
+
+Reported-by: Takashi Iwai <tiwai@suse.de>
+Reported-and-tested-by: Santiago Zarate <santiago.zarate@suse.com>
+Reported-and-tested-by: Bodo Graumann <mail@bodograumann.de>
+References: https://gitlab.freedesktop.org/drm/intel/-/issues/3166
+Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode link training")
+Cc: <stable@vger.kernel.org> # v5.11
+Cc: Takashi Iwai <tiwai@suse.de>
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210317184901.4029798-2-imre.deak@intel.com
+---
+ drivers/gpu/drm/i915/display/intel_dp.c           |  7 +++++++
+ .../gpu/drm/i915/display/intel_dp_link_training.c | 15 ++++++++++++---
+ 2 files changed, 19 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
+index 8a26307c4896..1930df9a8bcc 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp.c
++++ b/drivers/gpu/drm/i915/display/intel_dp.c
+@@ -1400,6 +1400,7 @@ static u32 g4x_get_aux_send_ctl(struct intel_dp *intel_dp,
+ 	else
+ 		precharge = 5;
+ 
++	/* Max timeout value on G4x-BDW: 1.6ms */
+ 	if (IS_BROADWELL(dev_priv))
+ 		timeout = DP_AUX_CH_CTL_TIME_OUT_600us;
+ 	else
+@@ -1426,6 +1427,12 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
+ 	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
+ 	u32 ret;
+ 
++	/*
++	 * Max timeout values:
++	 * SKL-GLK: 1.6ms
++	 * CNL: 3.2ms
++	 * ICL+: 4ms
++	 */
+ 	ret = DP_AUX_CH_CTL_SEND_BUSY |
+ 	      DP_AUX_CH_CTL_DONE |
+ 	      DP_AUX_CH_CTL_INTERRUPT |
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+index d8c6d7054d11..f916b9f04b6b 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+@@ -93,6 +93,18 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp,
+ 
+ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp)
+ {
++	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
++
++	if (intel_dp_is_edp(intel_dp))
++		return false;
++
++	/*
++	 * Detecting LTTPRs must be avoided on platforms with an AUX timeout
++	 * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).
++	 */
++	if (INTEL_GEN(i915) < 10)
++		return false;
++
+ 	if (drm_dp_read_lttpr_common_caps(&intel_dp->aux,
+ 					  intel_dp->lttpr_common_caps) < 0) {
+ 		memset(intel_dp->lttpr_common_caps, 0,
+@@ -138,9 +150,6 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+ 	bool ret;
+ 	int i;
+ 
+-	if (intel_dp_is_edp(intel_dp))
+-		return 0;
+-
+ 	ret = intel_dp_read_lttpr_common_caps(intel_dp);
+ 
+ 	/*
+-- 
+2.31.1
+
diff --git a/0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch b/0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch
new file mode 100644
index 000000000000..620672b37699
--- /dev/null
+++ b/0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch
@@ -0,0 +1,115 @@
+From 6cbe4ead29eb88f3a5d4257adbb77a944ed4c9de Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@intel.com>
+Date: Mon, 18 Jan 2021 20:31:43 +0200
+Subject: [PATCH 3/6] drm/i915/dp: Prevent setting the LTTPR LT mode if no
+ LTTPRs are detected
+
+Cherry-picked from 3b7bbb3619d2cc92f04ba10ad27d3b616aabf175
+
+Atm, the driver programs explicitly the default transparent link
+training mode (0x55) to DP_PHY_REPEATER_MODE even if no LTTPRs are
+detected.
+
+This conforms to the spec (3.6.6.1):
+"DP upstream devices that do not enable the Non-transparent mode of
+ LTTPRs shall program the PHY_REPEATER_MODE register (DPCD Address
+ F0003h) to 55h (default) prior to link training"
+
+however writing the default value to this DPCD register seems to cause
+occasional link training errors at least for a DELL WD19TB TBT dock, when
+no LTTPRs are detected.
+
+Writing to DP_PHY_REPEATER_MODE will also cause an unnecessary timeout
+on systems without any LTTPR.
+
+To fix the above two issues let's assume that setting the default mode
+is redundant when no LTTPRs are detected. Keep the existing behavior and
+program the default mode if more than 8 LTTPRs are detected or in case
+the read from DP_PHY_REPEATER_CNT returns an invalid value.
+
+References: https://gitlab.freedesktop.org/drm/intel/-/issues/2801
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+Reviewed-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210118183143.1145707-1-imre.deak@intel.com
+---
+ .../drm/i915/display/intel_dp_link_training.c | 36 ++++++++-----------
+ 1 file changed, 15 insertions(+), 21 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+index f916b9f04b6b..0359d5936901 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+@@ -34,18 +34,6 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])
+ 		      link_status[3], link_status[4], link_status[5]);
+ }
+ 
+-static int intel_dp_lttpr_count(struct intel_dp *intel_dp)
+-{
+-	int count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
+-
+-	/*
+-	 * Pretend no LTTPRs in case of LTTPR detection error, or
+-	 * if too many (>8) LTTPRs are detected. This translates to link
+-	 * training in transparent mode.
+-	 */
+-	return count <= 0 ? 0 : count;
+-}
+-
+ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
+ {
+ 	intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT -
+@@ -151,6 +139,17 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+ 	int i;
+ 
+ 	ret = intel_dp_read_lttpr_common_caps(intel_dp);
++	if (!ret)
++		return 0;
++
++	lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
++	/*
++	 * Prevent setting LTTPR transparent mode explicitly if no LTTPRs are
++	 * detected as this breaks link training at least on the Dell WD19TB
++	 * dock.
++	 */
++	if (lttpr_count == 0)
++		return 0;
+ 
+ 	/*
+ 	 * See DP Standard v2.0 3.6.6.1. about the explicit disabling of
+@@ -159,17 +158,12 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+ 	 */
+ 	intel_dp_set_lttpr_transparent_mode(intel_dp, true);
+ 
+-	if (!ret)
+-		return 0;
+-
+-	lttpr_count = intel_dp_lttpr_count(intel_dp);
+-
+ 	/*
+ 	 * In case of unsupported number of LTTPRs or failing to switch to
+ 	 * non-transparent mode fall-back to transparent link training mode,
+ 	 * still taking into account any LTTPR common lane- rate/count limits.
+ 	 */
+-	if (lttpr_count == 0)
++	if (lttpr_count < 0)
+ 		return 0;
+ 
+ 	if (!intel_dp_set_lttpr_transparent_mode(intel_dp, false)) {
+@@ -231,11 +225,11 @@ intel_dp_phy_is_downstream_of_source(struct intel_dp *intel_dp,
+ 				     enum drm_dp_phy dp_phy)
+ {
+ 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+-	int lttpr_count = intel_dp_lttpr_count(intel_dp);
++	int lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
+ 
+-	drm_WARN_ON_ONCE(&i915->drm, lttpr_count == 0 && dp_phy != DP_PHY_DPRX);
++	drm_WARN_ON_ONCE(&i915->drm, lttpr_count <= 0 && dp_phy != DP_PHY_DPRX);
+ 
+-	return lttpr_count == 0 || dp_phy == DP_PHY_LTTPR(lttpr_count - 1);
++	return lttpr_count <= 0 || dp_phy == DP_PHY_LTTPR(lttpr_count - 1);
+ }
+ 
+ static u8 intel_dp_phy_voltage_max(struct intel_dp *intel_dp,
+-- 
+2.31.1
+
diff --git a/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch b/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch
new file mode 100644
index 000000000000..07a5e1f4fc81
--- /dev/null
+++ b/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch
@@ -0,0 +1,167 @@
+From 713058d68c0bef0b8add47ff67875a077b834552 Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@intel.com>
+Date: Wed, 17 Mar 2021 21:01:49 +0200
+Subject: [PATCH 4/6] drm/i915: Disable LTTPR support when the DPCD rev < 1.4
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Cherry picked from intel-drm-next 264613b406eb0d74cd9ca582c717c5e2c5a975ea
+
+By the specification the 0xF0000-0xF02FF range is only valid when the
+DPCD revision is 1.4 or higher. Disable LTTPR support if this isn't so.
+
+Trying to detect LTTPRs returned corrupted values for the above DPCD
+range at least on a Skylake host with an LG 43UD79-B monitor with a DPCD
+revision 1.2 connected.
+
+v2: Add the actual version check.
+v3: Fix s/DRPX/DPRX/ typo.
+
+Fixes: 7b2a4ab8b0ef ("drm/i915: Switch to LTTPR transparent mode link training")
+Cc: <stable@vger.kernel.org> # v5.11
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210317190149.4032966-1-imre.deak@intel.com
+---
+ drivers/gpu/drm/i915/display/intel_dp.c       |  4 +-
+ .../drm/i915/display/intel_dp_link_training.c | 48 ++++++++++++++-----
+ .../drm/i915/display/intel_dp_link_training.h |  2 +-
+ 3 files changed, 39 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
+index 1930df9a8bcc..bc2aae63fe40 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp.c
++++ b/drivers/gpu/drm/i915/display/intel_dp.c
+@@ -4878,9 +4878,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
+ {
+ 	int ret;
+ 
+-	intel_dp_lttpr_init(intel_dp);
+-
+-	if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd))
++	if (intel_dp_init_lttpr_and_dprx_caps(intel_dp) < 0)
+ 		return false;
+ 
+ 	/*
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+index 0359d5936901..e6532ea5757b 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+@@ -34,6 +34,11 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])
+ 		      link_status[3], link_status[4], link_status[5]);
+ }
+ 
++static void intel_dp_reset_lttpr_common_caps(struct intel_dp *intel_dp)
++{
++	memset(&intel_dp->lttpr_common_caps, 0, sizeof(intel_dp->lttpr_common_caps));
++}
++
+ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
+ {
+ 	intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT -
+@@ -95,8 +100,7 @@ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp)
+ 
+ 	if (drm_dp_read_lttpr_common_caps(&intel_dp->aux,
+ 					  intel_dp->lttpr_common_caps) < 0) {
+-		memset(intel_dp->lttpr_common_caps, 0,
+-		       sizeof(intel_dp->lttpr_common_caps));
++		intel_dp_reset_lttpr_common_caps(intel_dp);
+ 		return false;
+ 	}
+ 
+@@ -118,30 +122,49 @@ intel_dp_set_lttpr_transparent_mode(struct intel_dp *intel_dp, bool enable)
+ }
+ 
+ /**
+- * intel_dp_lttpr_init - detect LTTPRs and init the LTTPR link training mode
++ * intel_dp_init_lttpr_and_dprx_caps - detect LTTPR and DPRX caps, init the LTTPR link training mode
+  * @intel_dp: Intel DP struct
+  *
+- * Read the LTTPR common capabilities, switch to non-transparent link training
+- * mode if any is detected and read the PHY capabilities for all detected
+- * LTTPRs. In case of an LTTPR detection error or if the number of
++ * Read the LTTPR common and DPRX capabilities and switch to non-transparent
++ * link training mode if any is detected and read the PHY capabilities for all
++ * detected LTTPRs. In case of an LTTPR detection error or if the number of
+  * LTTPRs is more than is supported (8), fall back to the no-LTTPR,
+  * transparent mode link training mode.
+  *
+  * Returns:
+- *   >0  if LTTPRs were detected and the non-transparent LT mode was set
++ *   >0  if LTTPRs were detected and the non-transparent LT mode was set. The
++ *       DPRX capabilities are read out.
+  *    0  if no LTTPRs or more than 8 LTTPRs were detected or in case of a
+- *       detection failure and the transparent LT mode was set
++ *       detection failure and the transparent LT mode was set. The DPRX
++ *       capabilities are read out.
++ *   <0  Reading out the DPRX capabilities failed.
+  */
+-int intel_dp_lttpr_init(struct intel_dp *intel_dp)
++int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp)
+ {
+ 	int lttpr_count;
+ 	bool ret;
+ 	int i;
+ 
+ 	ret = intel_dp_read_lttpr_common_caps(intel_dp);
++
++	/* The DPTX shall read the DPRX caps after LTTPR detection. */
++	if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd)) {
++		intel_dp_reset_lttpr_common_caps(intel_dp);
++		return -EIO;
++	}
++
+ 	if (!ret)
+ 		return 0;
+ 
++	/*
++	 * The 0xF0000-0xF02FF range is only valid if the DPCD revision is
++	 * at least 1.4.
++	 */
++	if (intel_dp->dpcd[DP_DPCD_REV] < 0x14) {
++		intel_dp_reset_lttpr_common_caps(intel_dp);
++		return 0;
++	}
++
+ 	lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
+ 	/*
+ 	 * Prevent setting LTTPR transparent mode explicitly if no LTTPRs are
+@@ -181,7 +204,7 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+ 
+ 	return lttpr_count;
+ }
+-EXPORT_SYMBOL(intel_dp_lttpr_init);
++EXPORT_SYMBOL(intel_dp_init_lttpr_and_dprx_caps);
+ 
+ static u8 dp_voltage_max(u8 preemph)
+ {
+@@ -817,7 +840,10 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
+ 	 * TODO: Reiniting LTTPRs here won't be needed once proper connector
+ 	 * HW state readout is added.
+ 	 */
+-	int lttpr_count = intel_dp_lttpr_init(intel_dp);
++	int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
++
++	if (lttpr_count < 0)
++		return;
+ 
+ 	if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count))
+ 		intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
+index 6a1f76bd8c75..9cb7c28027f0 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
+@@ -11,7 +11,7 @@
+ struct intel_crtc_state;
+ struct intel_dp;
+ 
+-int intel_dp_lttpr_init(struct intel_dp *intel_dp);
++int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp);
+ 
+ void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
+ 			       const struct intel_crtc_state *crtc_state,
+-- 
+2.31.1
+
diff --git a/0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-t.patch b/0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-t.patch
new file mode 100644
index 000000000000..38f441d2633c
--- /dev/null
+++ b/0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-t.patch
@@ -0,0 +1,53 @@
+From 5ffd31225f0df5dcd0a1ba60bdae3e7e19afb684 Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@intel.com>
+Date: Tue, 13 Apr 2021 02:24:12 +0300
+Subject: [PATCH 5/6] drm/i915: Fix modesetting in case of unexpected AUX
+ timeouts
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+In case AUX failures happen unexpectedly during a modeset, the driver
+should still complete the modeset. In particular the driver should
+perform the link training sequence steps even in case of an AUX failure,
+as this sequence also includes port initialization steps. Not doing that
+can leave the port/pipe in a broken state and lead for instance to a
+flip done timeout.
+
+Fix this by continuing with link training (in a no-LTTPR mode) if the
+DPRX DPCD readout failed for some reason at the beginning of link
+training. After a successful connector detection we already have the
+DPCD read out and cached, so the failed repeated read for it should not
+cause a problem. Note that a partial AUX read could in theory partly
+overwrite the cached DPCD (and return error) but this overwrite should
+not happen if the returned values are corrupted (due to a timeout or
+some other IO error).
+
+Kudos to Ville to root cause the problem.
+
+Fixes: 7dffbdedb96a ("drm/i915: Disable LTTPR support when the DPCD rev < 1.4")
+References: https://gitlab.freedesktop.org/drm/intel/-/issues/3308
+Cc: stable@vger.kernel.org # 5.11
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+---
+ drivers/gpu/drm/i915/display/intel_dp_link_training.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+index e6532ea5757b..6f2cb9d55e1b 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+@@ -843,7 +843,8 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
+ 	int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
+ 
+ 	if (lttpr_count < 0)
+-		return;
++		/* Still continue with enabling the port and link training. */
++		lttpr_count = 0;
+ 
+ 	if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count))
+ 		intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
+-- 
+2.31.1
+
diff --git a/PKGBUILD b/PKGBUILD
index 59cdea074660..89eae76892a5 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -2,12 +2,12 @@
 # Contributor: Jan Alexander Steffens (heftig) <jan.steffens@gmail.com>
 
 pkgbase=linux-rc
-pkgrel=2
+pkgrel=1
 _srcname=linux-5.11
 _major=5.11
 ### on initial release this is null otherwise it is the current stable subversion
 ### ie 1,2,3 corresponding $_major.1, $_major.3 etc
-_minor=13
+_minor=16
 _minorc=$((_minor+1))
 ### on initial release this is just $_major
 _fullver=$_major.$_minor
@@ -30,17 +30,25 @@ source=(
   https://www.kernel.org/pub/linux/kernel/v5.x/linux-$_fullver.tar.{xz,sign}
   config         # the main kernel config file
   0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
+  0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch
+  0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch
+  0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch
+  0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-t.patch
 )
 validpgpkeys=(
   'ABAF11C65A2970B130ABE3C479BE3E4300411886'  # Linus Torvalds
   '647F28654894E3BD457199BE38DBBDC86092693E'  # Greg Kroah-Hartman
 )
-b2sums=('1146f808dee9bf29b02e135caea52ee49ea8cbc6d4718ecddd9a296239484baa9d06f5968495949973fe22bddd2bd49dc85508cd12c7959d2291b3dc0e5f0d3b'
+b2sums=('f4974eb6000b349713c86ee75bff06d64061509908ec96ea11459999bda9c1e289a48e9b08925aaf9b8eff428488ceaed44c4561cffb6c4c67302905a033e942'
         'SKIP'
-        'fd9537a0eb265660ed25d12ff4098ca208035576c580f81cb6a1355eedde2748bdb65521641f68e626a1aee49e7494c79627015a376b7ee4a6373622605ac760'
+        'fe7a296697d21ac4572b6714da898bc9303cf04f988297329e10d660a957ea6142a182fe583e7a98bf2f767f61989288454ecf640844346af079d90b4fdd21b1'
         'SKIP'
-        '837aeac7d38490f5457f53d2fcb1e114624b0e0b4931b50f016c6b3c7f67d5638df946b960d50b1a14c945229827c936e3f112fddffb80103cd60873fcd15e7d'
-        '2c197117aa915971edb97ec98233d4c394f6790829486403bc51732a18fe12338d82e680ccafd138153affe9830d815ee1b52c7d1f3ed7937bc7a0c1fac3a5ef')
+        'bd8c382158f579c173ac68a7f27d3abfe52b1bd60413dea593534fa6c126d6a804e6dd98c2d9b1f402cd22c9bbd8f39bacaba7d96b13320bd529badba0ec3e0c'
+        '7f6962283f1439ed219c99328acbabea2b5493ee6a8ce476b51ee7f7a38fc741d0a2b546c79a4611acedb6808ac8ab3b3c8f3386837cfef64a343a26f9c84180'
+        'a1f420194ee0c398ec4dd4fb94fd03eea2c156ac1daf89b1238adeb6085871a871099b291249255ebd8cf863c5ed9e8963a35828d9a1061f10554927574f1eac'
+        '10882461985bc99a22e9cceae7a80ba2fd2892a84abb528977ed154725419622c10a515d66a827c1cca567386483445ab3d3e6640439afe114a5c89feb2a69e7'
+        'aa1f093e359ff743e8fe9d7dbbecc780fd7d3e46952c32c051bf1fa8572f2a8c456babedfb5076337274fc0c2f8e026b285eb7343ee8d0d617c446936a65604c'
+        '70d64a1af2c815f40f17abca038b2bc364d609dc857f8c5c08dd5b3293037b8da08e7e3ca9143d17c8c0d482f65b9a3c1d1e6d1b1244e4816e117b948f52570a')
 
 
 export KBUILD_BUILD_HOST=archlinux
diff --git a/config b/config
index d313e6045d57..2f5324bbf092 100644
--- a/config
+++ b/config
@@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/x86 5.11.13-arch1 Kernel Configuration
+# Linux/x86 5.11.16-arch1 Kernel Configuration
 #
 CONFIG_CC_VERSION_TEXT="gcc (GCC) 10.2.0"
 CONFIG_CC_IS_GCC=y
@@ -2276,7 +2276,7 @@ CONFIG_MTD_MAP_BANK_WIDTH_2=y
 CONFIG_MTD_MAP_BANK_WIDTH_4=y
 CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_RAM is not set
+CONFIG_MTD_RAM=m
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
 # end of RAM/ROM/Flash chip drivers
@@ -2285,8 +2285,9 @@ CONFIG_MTD_CFI_I2=y
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
 # CONFIG_MTD_INTEL_VR_NOR is not set
-# CONFIG_MTD_PLATRAM is not set
+CONFIG_MTD_PLATRAM=m
 # end of Mapping drivers for chip access
 
 #
@@ -6237,7 +6238,7 @@ CONFIG_FB_SYS_IMAGEBLIT=m
 # CONFIG_FB_FOREIGN_ENDIAN is not set
 CONFIG_FB_SYS_FOPS=m
 CONFIG_FB_DEFERRED_IO=y
-# CONFIG_FB_MODE_HELPERS is not set
+CONFIG_FB_MODE_HELPERS=y
 CONFIG_FB_TILEBLITTING=y
 
 #
@@ -6250,7 +6251,7 @@ CONFIG_FB_TILEBLITTING=y
 # CONFIG_FB_ASILIANT is not set
 # CONFIG_FB_IMSTT is not set
 # CONFIG_FB_VGA16 is not set
-# CONFIG_FB_UVESA is not set
+CONFIG_FB_UVESA=m
 CONFIG_FB_VESA=y
 CONFIG_FB_EFI=y
 # CONFIG_FB_N411 is not set
@@ -7066,7 +7067,7 @@ CONFIG_HID_ZEROPLUS=m
 CONFIG_ZEROPLUS_FF=y
 CONFIG_HID_ZYDACRON=m
 CONFIG_HID_SENSOR_HUB=m
-# CONFIG_HID_SENSOR_CUSTOM_SENSOR is not set
+CONFIG_HID_SENSOR_CUSTOM_SENSOR=m
 CONFIG_HID_ALPS=m
 CONFIG_HID_MCP2221=m
 # end of Special HID drivers