diff options
author | Adrià Cereto-Massagué | 2018-02-26 10:51:52 +0100 |
---|---|---|
committer | Adrià Cereto-Massagué | 2018-02-26 10:51:52 +0100 |
commit | 2d6e33596c6ce846dfe78f365912d62c4e10a464 (patch) | |
tree | bba0f8a38d6f7035ce97e7b5e813abcf98699302 | |
parent | 7e414ac01a21b3f5eb1780b3377cc6eb9878ca9d (diff) | |
download | aur-2d6e33596c6ce846dfe78f365912d62c4e10a464.tar.gz |
update patch for 4.16
-rw-r--r-- | .SRCINFO | 6 | ||||
-rw-r--r-- | PKGBUILD | 10 | ||||
-rw-r--r-- | config.x86_64 | 26 | ||||
-rw-r--r-- | enable_additional_cpu_optimizations_for_gcc_v4.9%2B_kernel_v4.16%2B.patch | 312 |
4 files changed, 331 insertions, 23 deletions
@@ -1,5 +1,5 @@ pkgbase = linux-ryzen-git - pkgver = 4.16rc1.r0.g7928b2cbe55b + pkgver = 4.16rc3.r0.g4a3928c6f8a5 pkgrel = 1 url = http://www.kernel.org/ arch = x86_64 @@ -15,11 +15,11 @@ pkgbase = linux-ryzen-git source = git+https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git source = config.x86_64 source = linux-ryzen-git.preset - source = https://raw.githubusercontent.com/graysky2/kernel_gcc_patch/master/enable_additional_cpu_optimizations_for_gcc_v4.9%2B_kernel_v4.13%2B.patch + source = enable_additional_cpu_optimizations_for_gcc_v4.9%2B_kernel_v4.16%2B.patch sha256sums = SKIP sha256sums = SKIP sha256sums = 6c4ab77d0be624799b9b8e12b228fe181577b298d73355b14618ebf1f5675fa7 - sha256sums = 8b00041911e67654b0bd9602125853a1a94f6155c5cac4f886507554c8324ee8 + sha256sums = SKIP pkgname = linux-ryzen-git pkgdesc = The Linux kernel and modules (git version), with GCC optimization patch and Ryzen-friendly config flags (CONFIG_RCU_NOCB_CPU=y) to enable the rcu_nocbs=0-x boot argument @@ -8,7 +8,7 @@ pkgbase=linux-ryzen-git _srcname=linux -pkgver=4.16rc1.r0.g7928b2cbe55b +pkgver=4.16rc3.r0.g4a3928c6f8a5 pkgrel=1 arch=('x86_64') url="http://www.kernel.org/" @@ -21,12 +21,14 @@ source=('git+https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git' # standard config files for mkinitcpio ramdisk "${pkgbase}.preset" #Kernel GCC optimization patch - "https://raw.githubusercontent.com/graysky2/kernel_gcc_patch/master/enable_additional_cpu_optimizations_for_gcc_v4.9%2B_kernel_v4.13%2B.patch" +# "https://raw.githubusercontent.com/graysky2/kernel_gcc_patch/master/enable_additional_cpu_optimizations_for_gcc_v4.9%2B_kernel_v4.13%2B.patch" + enable_additional_cpu_optimizations_for_gcc_v4.9%2B_kernel_v4.16%2B.patch ) sha256sums=('SKIP' 'SKIP' '6c4ab77d0be624799b9b8e12b228fe181577b298d73355b14618ebf1f5675fa7' - '8b00041911e67654b0bd9602125853a1a94f6155c5cac4f886507554c8324ee8' +# '8b00041911e67654b0bd9602125853a1a94f6155c5cac4f886507554c8324ee8' + '7d5dc267d0800620883bc6236efcf13a51fe105e6e62160af962c38845188999' ) _kernelname=${pkgbase#linux} @@ -40,7 +42,7 @@ pkgver() { prepare() { cd "${_srcname}" - patch -Np1 -i "${srcdir}/enable_additional_cpu_optimizations_for_gcc_v4.9%2B_kernel_v4.13%2B.patch" + patch -Np1 -i "${srcdir}/enable_additional_cpu_optimizations_for_gcc_v4.9%2B_kernel_v4.16%2B.patch" cat "${srcdir}/config.x86_64" > ./.config diff --git a/config.x86_64 b/config.x86_64 index 412a4cb47399..b5b78caf9473 100644 --- a/config.x86_64 +++ b/config.x86_64 @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86 4.16.0-rc1 Kernel Configuration +# Linux/x86 4.16.0-rc3 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -53,7 +53,7 @@ CONFIG_THREAD_INFO_IN_TASK=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_CROSS_COMPILE="" # CONFIG_COMPILE_TEST is not set -CONFIG_LOCALVERSION="-gd48fcbd864a0" +CONFIG_LOCALVERSION="-g4a3928c6f8a5" # CONFIG_LOCALVERSION_AUTO is not set CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y @@ -491,34 +491,25 @@ CONFIG_PARAVIRT_CLOCK=y CONFIG_JAILHOUSE_GUEST=y CONFIG_NO_BOOTMEM=y # CONFIG_MK8 is not set -# CONFIG_MK8SSE3 is not set # CONFIG_MK10 is not set # CONFIG_MBARCELONA is not set # CONFIG_MBOBCAT is not set -# CONFIG_MJAGUAR is not set # CONFIG_MBULLDOZER is not set # CONFIG_MPILEDRIVER is not set -# CONFIG_MSTEAMROLLER is not set -# CONFIG_MEXCAVATOR is not set -# CONFIG_MZEN is not set +# CONFIG_MJAGUAR is not set # CONFIG_MPSC is not set # CONFIG_MATOM is not set # CONFIG_MCORE2 is not set -# CONFIG_MNEHALEM is not set -# CONFIG_MWESTMERE is not set -# CONFIG_MSILVERMONT is not set -# CONFIG_MSANDYBRIDGE is not set -# CONFIG_MIVYBRIDGE is not set -# CONFIG_MHASWELL is not set -# CONFIG_MBROADWELL is not set -# CONFIG_MSKYLAKE is not set +# CONFIG_MCOREI7 is not set +# CONFIG_MCOREI7AVX is not set +# CONFIG_MCOREAVXI is not set +# CONFIG_MCOREAVX2 is not set # CONFIG_GENERIC_CPU is not set CONFIG_MNATIVE=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y -# CONFIG_X86_P6_NOP is not set CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y CONFIG_X86_CMOV=y @@ -536,6 +527,9 @@ CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y CONFIG_SWIOTLB=y CONFIG_IOMMU_HELPER=y # CONFIG_MAXSMP is not set +CONFIG_NR_CPUS_RANGE_BEGIN=2 +CONFIG_NR_CPUS_RANGE_END=512 +CONFIG_NR_CPUS_DEFAULT=64 CONFIG_NR_CPUS=128 CONFIG_SCHED_SMT=y CONFIG_SCHED_MC=y diff --git a/enable_additional_cpu_optimizations_for_gcc_v4.9%2B_kernel_v4.16%2B.patch b/enable_additional_cpu_optimizations_for_gcc_v4.9%2B_kernel_v4.16%2B.patch new file mode 100644 index 000000000000..c57ee5d13d93 --- /dev/null +++ b/enable_additional_cpu_optimizations_for_gcc_v4.9%2B_kernel_v4.16%2B.patch @@ -0,0 +1,312 @@ +diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu +index 8b8d2297d486..3733cbed9201 100644 +--- a/arch/x86/Kconfig.cpu ++++ b/arch/x86/Kconfig.cpu +@@ -150,7 +150,7 @@ config MPENTIUM4 + + + config MK6 +- bool "K6/K6-II/K6-III" ++ bool "AMD K6/K6-II/K6-III" + depends on X86_32 + ---help--- + Select this for an AMD K6-family processor. Enables use of +@@ -158,7 +158,7 @@ config MK6 + flags to GCC. + + config MK7 +- bool "Athlon/Duron/K7" ++ bool "AMD Athlon/Duron/K7" + depends on X86_32 + ---help--- + Select this for an AMD Athlon K7-family processor. Enables use of +@@ -166,12 +166,55 @@ config MK7 + flags to GCC. + + config MK8 +- bool "Opteron/Athlon64/Hammer/K8" ++ bool "AMD Opteron/Athlon64/Hammer/K8" + ---help--- + Select this for an AMD Opteron or Athlon64 Hammer-family processor. + Enables use of some extended instructions, and passes appropriate + optimization flags to GCC. + ++config MK10 ++ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10" ++ ---help--- ++ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50, ++ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor. ++ Enables use of some extended instructions, and passes appropriate ++ optimization flags to GCC. ++ ++config MBARCELONA ++ bool "AMD Barcelona" ++ ---help--- ++ Select this for AMD Barcelona and newer processors. ++ ++ Enables -march=barcelona ++ ++config MBOBCAT ++ bool "AMD Bobcat" ++ ---help--- ++ Select this for AMD Bobcat processors. ++ ++ Enables -march=btver1 ++ ++config MBULLDOZER ++ bool "AMD Bulldozer" ++ ---help--- ++ Select this for AMD Bulldozer processors. ++ ++ Enables -march=bdver1 ++ ++config MPILEDRIVER ++ bool "AMD Piledriver" ++ ---help--- ++ Select this for AMD Piledriver processors. ++ ++ Enables -march=bdver2 ++ ++config MJAGUAR ++ bool "AMD Jaguar" ++ ---help--- ++ Select this for AMD Jaguar processors. ++ ++ Enables -march=btver2 ++ + config MCRUSOE + bool "Crusoe" + depends on X86_32 +@@ -262,8 +305,17 @@ config MPSC + using the cpu family field + in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one. + ++config MATOM ++ bool "Intel Atom" ++ ---help--- ++ ++ Select this for the Intel Atom platform. Intel Atom CPUs have an ++ in-order pipelining architecture and thus can benefit from ++ accordingly optimized code. Use a recent GCC with specific Atom ++ support in order to fully benefit from selecting this option. ++ + config MCORE2 +- bool "Core 2/newer Xeon" ++ bool "Intel Core 2" + ---help--- + + Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and +@@ -271,14 +323,40 @@ config MCORE2 + family in /proc/cpuinfo. Newer ones have 6 and older ones 15 + (not a typo) + +-config MATOM +- bool "Intel Atom" ++ Enables -march=core2 ++ ++config MCOREI7 ++ bool "Intel Core i7" + ---help--- + +- Select this for the Intel Atom platform. Intel Atom CPUs have an +- in-order pipelining architecture and thus can benefit from +- accordingly optimized code. Use a recent GCC with specific Atom +- support in order to fully benefit from selecting this option. ++ Select this for the Intel Nehalem platform. Intel Nehalem proecessors ++ include Core i3, i5, i7, Xeon: 34xx, 35xx, 55xx, 56xx, 75xx processors. ++ ++ Enables -march=corei7 ++ ++config MCOREI7AVX ++ bool "Intel Core 2nd Gen AVX" ++ ---help--- ++ ++ Select this for 2nd Gen Core processors including Sandy Bridge. ++ ++ Enables -march=corei7-avx ++ ++config MCOREAVXI ++ bool "Intel Core 3rd Gen AVX" ++ ---help--- ++ ++ Select this for 3rd Gen Core processors including Ivy Bridge. ++ ++ Enables -march=core-avx-i ++ ++config MCOREAVX2 ++ bool "Intel Core AVX2" ++ ---help--- ++ ++ Select this for AVX2 enabled processors including Haswell. ++ ++ Enables -march=core-avx2 + + config GENERIC_CPU + bool "Generic-x86-64" +@@ -287,6 +365,19 @@ config GENERIC_CPU + Generic x86-64 CPU. + Run equally well on all x86-64 CPUs. + ++config MNATIVE ++ bool "Native optimizations autodetected by GCC" ++ ---help--- ++ ++ GCC 4.2 and above support -march=native, which automatically detects ++ the optimum settings to use based on your processor. -march=native ++ also detects and applies additional settings beyond -march specific ++ to your CPU, (eg. -msse4). Unless you have a specific reason not to ++ (e.g. distcc cross-compiling), you should probably be using ++ -march=native rather than anything listed below. ++ ++ Enables -march=native ++ + endchoice + + config X86_GENERIC +@@ -311,7 +402,7 @@ config X86_INTERNODE_CACHE_SHIFT + config X86_L1_CACHE_SHIFT + int + default "7" if MPENTIUM4 || MPSC +- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU ++ default "6" if MK7 || MK8 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MJAGUAR || MPENTIUMM || MCORE2 || MCOREI7 || MCOREI7AVX || MCOREAVXI || MCOREAVX2 || MATOM || MVIAC7 || X86_GENERIC || MNATIVE || GENERIC_CPU + default "4" if MELAN || M486 || MGEODEGX1 + default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX + +@@ -342,11 +433,11 @@ config X86_ALIGNMENT_16 + + config X86_INTEL_USERCOPY + def_bool y +- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 ++ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || MNATIVE || X86_GENERIC || MK8 || MK7 || MK10 || MBARCELONA || MEFFICEON || MCORE2 || MCOREI7 || MCOREI7AVX || MCOREAVXI || MCOREAVX2 + + config X86_USE_PPRO_CHECKSUM + def_bool y +- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM ++ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MCOREI7 || MCOREI7AVX || MCOREAVXI || MCOREAVX2 || MATOM || MNATIVE + + config X86_USE_3DNOW + def_bool y +@@ -370,17 +461,17 @@ config X86_P6_NOP + + config X86_TSC + def_bool y +- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64 ++ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MJAGUAR || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MCOREI7 || MCOREI7-AVX || MATOM) || X86_64 || MNATIVE + + config X86_CMPXCHG64 + def_bool y +- depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586TSC || M586MMX || MATOM || MGEODE_LX || MGEODEGX1 || MK6 || MK7 || MK8 ++ depends on X86_PAE || X86_64 || MCORE2 || MCOREI7 || MCOREI7AVX || MCOREAVXI || MCOREAVX2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586TSC || M586MMX || MATOM || MGEODE_LX || MGEODEGX1 || MK6 || MK7 || MK8 || MNATIVE + + # this should be set for all -march=.. options where the compiler + # generates cmov. + config X86_CMOV + def_bool y +- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX) ++ depends on (MK8 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MJAGUAR || MK7 || MCORE2 || MCOREI7 || MCOREI7AVX || MCOREAVXI || MCOREAVX2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX) + + config X86_MINIMUM_CPU_FAMILY + int +diff --git a/arch/x86/Makefile b/arch/x86/Makefile +index fad55160dcb9..0fa14514c1ab 100644 +--- a/arch/x86/Makefile ++++ b/arch/x86/Makefile +@@ -124,11 +124,26 @@ else + KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup) + + # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu) ++ cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native) + cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8) ++ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10) ++ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona) ++ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1) ++ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1) ++ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2) ++ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2) + cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona) + + cflags-$(CONFIG_MCORE2) += \ +- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic)) ++ $(call cc-option,-march=core2,$(call cc-option,-mtune=core2)) ++ cflags-$(CONFIG_MCOREI7) += \ ++ $(call cc-option,-march=corei7,$(call cc-option,-mtune=corei7)) ++ cflags-$(CONFIG_MCOREI7AVX) += \ ++ $(call cc-option,-march=corei7-avx,$(call cc-option,-mtune=corei7-avx)) ++ cflags-$(CONFIG_MCOREAVXI) += \ ++ $(call cc-option,-march=core-avx-i,$(call cc-option,-mtune=core-avx-i)) ++ cflags-$(CONFIG_MCOREAVX2) += \ ++ $(call cc-option,-march=core-avx2,$(call cc-option,-mtune=core-avx2)) + cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \ + $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic)) + cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic) +diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu +index 1f5faf8606b4..10dae99f07a5 100644 +--- a/arch/x86/Makefile_32.cpu ++++ b/arch/x86/Makefile_32.cpu +@@ -23,7 +23,14 @@ cflags-$(CONFIG_MK6) += -march=k6 + # Please note, that patches that add -march=athlon-xp and friends are pointless. + # They make zero difference whatsosever to performance at this time. + cflags-$(CONFIG_MK7) += -march=athlon ++cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native) + cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon) ++cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10,-march=athlon) ++cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona,-march=athlon) ++cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1,-march=athlon) ++cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1,-march=athlon) ++cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon) ++cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2,-march=athlon) + cflags-$(CONFIG_MCRUSOE) += -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0 + cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) -falign-functions=0 -falign-jumps=0 -falign-loops=0 + cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586) +@@ -32,6 +39,10 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-option,-march=c3,-march=i486) -falign-fu + cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686) + cflags-$(CONFIG_MVIAC7) += -march=i686 + cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2) ++cflags-$(CONFIG_MCOREI7) += -march=i686 $(call tune,corei7) ++cflags-$(CONFIG_MCOREI7AVX) += -march=i686 $(call tune,corei7-avx) ++cflags-$(CONFIG_MCOREAVXI) += -march=i686 $(call tune,core-avx-i) ++cflags-$(CONFIG_MCOREAVX2) += -march=i686 $(call tune,core-avx2) + cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \ + $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic)) + +diff --git a/arch/x86/include/asm/module.h b/arch/x86/include/asm/module.h +index 7948a17febb4..1b88e0cfd324 100644 +--- a/arch/x86/include/asm/module.h ++++ b/arch/x86/include/asm/module.h +@@ -25,6 +25,16 @@ struct mod_arch_specific { + #define MODULE_PROC_FAMILY "586MMX " + #elif defined CONFIG_MCORE2 + #define MODULE_PROC_FAMILY "CORE2 " ++#elif defined CONFIG_MNATIVE ++#define MODULE_PROC_FAMILY "NATIVE " ++#elif defined CONFIG_MCOREI7 ++#define MODULE_PROC_FAMILY "COREI7 " ++#elif defined CONFIG_MCOREI7AVX ++#define MODULE_PROC_FAMILY "COREI7AVX " ++#elif defined CONFIG_MCOREAVXI ++#define MODULE_PROC_FAMILY "COREAVXI " ++#elif defined CONFIG_MCOREAVX2 ++#define MODULE_PROC_FAMILY "COREAVX2 " + #elif defined CONFIG_MATOM + #define MODULE_PROC_FAMILY "ATOM " + #elif defined CONFIG_M686 +@@ -43,6 +53,18 @@ struct mod_arch_specific { + #define MODULE_PROC_FAMILY "K7 " + #elif defined CONFIG_MK8 + #define MODULE_PROC_FAMILY "K8 " ++#elif defined CONFIG_MK10 ++#define MODULE_PROC_FAMILY "K10 " ++#elif defined CONFIG_MBARCELONA ++#define MODULE_PROC_FAMILY "BARCELONA " ++#elif defined CONFIG_MBOBCAT ++#define MODULE_PROC_FAMILY "BOBCAT " ++#elif defined CONFIG_MBULLDOZER ++#define MODULE_PROC_FAMILY "BULLDOZER " ++#elif defined CONFIG_MPILEDRIVER ++#define MODULE_PROC_FAMILY "PILEDRIVER " ++#elif defined CONFIG_MJAGUAR ++#define MODULE_PROC_FAMILY "JAGUAR " + #elif defined CONFIG_MELAN + #define MODULE_PROC_FAMILY "ELAN " + #elif defined CONFIG_MCRUSOE + |