diff options
author | Scott B | 2022-01-17 10:15:12 -0800 |
---|---|---|
committer | Scott B | 2022-01-17 10:15:12 -0800 |
commit | 18fdae700838c871adcc50d963f9bf3a1e8bd731 (patch) | |
tree | c3b33149e9d2dcdfb3af3e7753c9f03ae1185b8c | |
parent | 92a947d9879202d69fa462cdd610e2c899911b45 (diff) | |
download | aur-18fdae700838c871adcc50d963f9bf3a1e8bd731.tar.gz |
hotfix: fix suspend regression
-rw-r--r-- | .SRCINFO | 4 | ||||
-rw-r--r-- | 9001-v5.16-s0ix-patch-2022-01-17.patch (renamed from 9001-v5.16-s0ix-patch-2022-01-15.patch) | 254 | ||||
-rw-r--r-- | PKGBUILD | 4 |
3 files changed, 247 insertions, 15 deletions
@@ -32,7 +32,7 @@ pkgbase = linux-xanmod-rog source = Bluetooth-btusb-Add-support-for-IMC-Networks-Mediatek-Chip.patch source = Bluetooth-btusb-Add-support-for-Foxconn-Mediatek-Chip.patch source = Bluetooth-btusb-Add-support-for-IMC-Networks-Mediatek-Chip-MT7921.patch - source = 9001-v5.16-s0ix-patch-2022-01-15.patch + source = 9001-v5.16-s0ix-patch-2022-01-17.patch validpgpkeys = ABAF11C65A2970B130ABE3C479BE3E4300411886 validpgpkeys = 647F28654894E3BD457199BE38DBBDC86092693E sha256sums = 027d7e8988bb69ac12ee92406c3be1fe13f990b1ca2249e226225cd1573308bb @@ -51,7 +51,7 @@ pkgbase = linux-xanmod-rog sha256sums = 292a7e32b248c7eee6e2f5407d609d03d985f367d329adb02b9d6dba1f85b44c sha256sums = 7dbfdd120bc155cad1879579cb9dd1185eb5e37078c8c93fef604a275a163812 sha256sums = 1444af2e125080934c67b6adb4561fd354a72ce47d3de393b24f53832ee492ac - sha256sums = 809c513d36b3e93315fc214f169819993aa9e0b9b2e00a7b28ee6a32d3fc22ed + sha256sums = c9e46df90b9bd721fcd3c84205efce5a6963daf0cadad46c29f5d57be3ec6187 pkgname = linux-xanmod-rog pkgdesc = The Linux Xanmod kernel and modules with ASUS ROG laptop patches (Zephyrus G14, G15, etc) diff --git a/9001-v5.16-s0ix-patch-2022-01-15.patch b/9001-v5.16-s0ix-patch-2022-01-17.patch index eb6bfff652ef..89fa4b80faee 100644 --- a/9001-v5.16-s0ix-patch-2022-01-15.patch +++ b/9001-v5.16-s0ix-patch-2022-01-17.patch @@ -1,11 +1,37 @@ -From ac7032db7c5cfd913e07ee51950d1b8aa9a7e047 Mon Sep 17 00:00:00 2001 +From b4c5953e0377b39c43f0ddb62e1d130495bdf019 Mon Sep 17 00:00:00 2001 From: Scott B <arglebargle@arglebargle.dev> -Date: Sat, 15 Jan 2022 00:36:23 -0800 -Subject: [PATCH] v5.16 s0ix patch 2022-01-15 +Date: Mon, 17 Jan 2022 10:09:38 -0800 +Subject: [PATCH] v5.16 s0ix patch 2022-01-17 Squashed commit of the following: -commit 3b070758bd5756cc5c75765292e003b4ca92135b +commit b7fc459a41bbfbe7268279fb8d0769df37dfb957 +Author: Mario Limonciello <mario.limonciello@amd.com> +Date: Fri Jan 7 10:49:59 2022 -0600 + + drm/amd/display: Revert W/A for hard hangs on DCN20/DCN21 + + The WA from commit 2a50edbf10c8 ("drm/amd/display: Apply w/a for hard hang + on HPD") and commit 1bd3bc745e7f ("drm/amd/display: Extend w/a for hard + hang on HPD to dcn20") causes a regression in s0ix where the system will + fail to resume properly on many laptops. Pull the workarounds out to + avoid that s0ix regression in the common case. This HPD hang happens with + an external device and a new W/A will need to be developed for this in the + future. + + Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com> + Cc: Qingqing Zhuo <qingqing.zhuo@amd.com> + Reported-by: Scott Bruce <smbruce@gmail.com> + Reported-by: Chris Hixon <linux-kernel-bugs@hixontech.com> + Reported-by: spasswolf@web.de + Link: https://bugzilla.kernel.org/show_bug.cgi?id=215436 + Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1821 + Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1852 + Fixes: 2a50edbf10c8 ("drm/amd/display: Apply w/a for hard hang on HPD") + Fixes: 1bd3bc745e7f ("drm/amd/display: Extend w/a for hard hang on HPD to dcn20") + Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> + +commit 73c260f09f0aa7ab79de33f191ae55248952e833 Author: Sanket Goswami <Sanket.Goswami@amd.com> Date: Tue Nov 30 16:53:18 2021 +0530 @@ -24,7 +50,7 @@ Date: Tue Nov 30 16:53:18 2021 +0530 Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> -commit a60bac2812d1dc1d555acbf938403a6e171be167 +commit e6000d5a223f89882671e1aa61dd43e20051fe34 Author: Sanket Goswami <Sanket.Goswami@amd.com> Date: Tue Nov 30 16:53:17 2021 +0530 @@ -37,13 +63,13 @@ Date: Tue Nov 30 16:53:17 2021 +0530 Suggested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> -commit 59eddf7c5b7f573bd2e0ff79a6e50620eaa938ee +commit b6e9788d0f2d13aa2be66c88ca949ebf65ee32ea Author: Julian Sikorski <belegdol+github@gmail.com> Date: Fri Nov 19 17:52:36 2021 +0100 GFXOFF check patch by Lijo Lazar -commit df10edb6cc7d6b1d03ece93f89c035bb140e21a9 +commit af2cbc6459a8108dcc0b8a513630b794c38d8c19 Author: Mario Limonciello <mario.limonciello@amd.com> Date: Fri Sep 24 12:32:06 2021 -0500 @@ -56,10 +82,18 @@ Date: Fri Sep 24 12:32:06 2021 -0500 Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Change-Id: I34f5ca978aab69ff0a0906191eec21649b19fe27 --- - drivers/acpi/x86/s2idle.c | 6 + - drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 5 +- - drivers/platform/x86/amd-pmc.c | 172 ++++++++++++++++++++-- - 3 files changed, 167 insertions(+), 16 deletions(-) + drivers/acpi/x86/s2idle.c | 6 + + .../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 11 +- + .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 11 +- + .../display/dc/irq/dcn20/irq_service_dcn20.c | 25 --- + .../display/dc/irq/dcn20/irq_service_dcn20.h | 2 - + .../display/dc/irq/dcn21/irq_service_dcn21.c | 25 --- + .../display/dc/irq/dcn21/irq_service_dcn21.h | 2 - + .../gpu/drm/amd/display/dc/irq/irq_service.c | 2 +- + .../gpu/drm/amd/display/dc/irq/irq_service.h | 4 - + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 5 +- + drivers/platform/x86/amd-pmc.c | 172 ++++++++++++++++-- + 11 files changed, 170 insertions(+), 95 deletions(-) diff --git a/drivers/acpi/x86/s2idle.c b/drivers/acpi/x86/s2idle.c index 1c48358b43ba..0b65d4623214 100644 @@ -78,6 +112,204 @@ index 1c48358b43ba..0b65d4623214 100644 if (adev->power.state < lpi_constraints_table[i].min_dstate) acpi_handle_info(handle, "LPI: Constraint not met; min power state:%s current power state:%s\n", +diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c +index 2108bff49d4e..146e6d670899 100644 +--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c ++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c +@@ -38,7 +38,6 @@ + #include "clk/clk_11_0_0_offset.h" + #include "clk/clk_11_0_0_sh_mask.h" + +-#include "irq/dcn20/irq_service_dcn20.h" + + #undef FN + #define FN(reg_name, field_name) \ +@@ -223,8 +222,6 @@ void dcn2_update_clocks(struct clk_mgr *clk_mgr_base, + bool force_reset = false; + bool p_state_change_support; + int total_plane_count; +- int irq_src; +- uint32_t hpd_state; + + if (dc->work_arounds.skip_clock_update) + return; +@@ -242,13 +239,7 @@ void dcn2_update_clocks(struct clk_mgr *clk_mgr_base, + if (dc->res_pool->pp_smu) + pp_smu = &dc->res_pool->pp_smu->nv_funcs; + +- for (irq_src = DC_IRQ_SOURCE_HPD1; irq_src <= DC_IRQ_SOURCE_HPD6; irq_src++) { +- hpd_state = dc_get_hpd_state_dcn20(dc->res_pool->irqs, irq_src); +- if (hpd_state) +- break; +- } +- +- if (display_count == 0 && !hpd_state) ++ if (display_count == 0) + enter_display_off = true; + + if (enter_display_off == safe_to_lower) { +diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +index ac2d4c4f04e4..d3c8db65ff45 100644 +--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c ++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +@@ -42,7 +42,6 @@ + #include "clk/clk_10_0_2_sh_mask.h" + #include "renoir_ip_offset.h" + +-#include "irq/dcn21/irq_service_dcn21.h" + + /* Constants */ + +@@ -130,11 +129,9 @@ void rn_update_clocks(struct clk_mgr *clk_mgr_base, + struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; + struct dc *dc = clk_mgr_base->ctx->dc; + int display_count; +- int irq_src; + bool update_dppclk = false; + bool update_dispclk = false; + bool dpp_clock_lowered = false; +- uint32_t hpd_state; + + struct dmcu *dmcu = clk_mgr_base->ctx->dc->res_pool->dmcu; + +@@ -151,14 +148,8 @@ void rn_update_clocks(struct clk_mgr *clk_mgr_base, + + display_count = rn_get_active_display_cnt_wa(dc, context); + +- for (irq_src = DC_IRQ_SOURCE_HPD1; irq_src <= DC_IRQ_SOURCE_HPD5; irq_src++) { +- hpd_state = dc_get_hpd_state_dcn21(dc->res_pool->irqs, irq_src); +- if (hpd_state) +- break; +- } +- + /* if we can go lower, go lower */ +- if (display_count == 0 && !hpd_state) { ++ if (display_count == 0) { + rn_vbios_smu_set_dcn_low_power_state(clk_mgr, DCN_PWR_STATE_LOW_POWER); + /* update power state */ + clk_mgr_base->clks.pwr_state = DCN_PWR_STATE_LOW_POWER; +diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c +index 9ccafe007b23..c4b067d01895 100644 +--- a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c ++++ b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c +@@ -132,31 +132,6 @@ enum dc_irq_source to_dal_irq_source_dcn20( + } + } + +-uint32_t dc_get_hpd_state_dcn20(struct irq_service *irq_service, enum dc_irq_source source) +-{ +- const struct irq_source_info *info; +- uint32_t addr; +- uint32_t value; +- uint32_t current_status; +- +- info = find_irq_source_info(irq_service, source); +- if (!info) +- return 0; +- +- addr = info->status_reg; +- if (!addr) +- return 0; +- +- value = dm_read_reg(irq_service->ctx, addr); +- current_status = +- get_reg_field_value( +- value, +- HPD0_DC_HPD_INT_STATUS, +- DC_HPD_SENSE); +- +- return current_status; +-} +- + static bool hpd_ack( + struct irq_service *irq_service, + const struct irq_source_info *info) +diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h +index 4d69ab24ca25..aee4b37999f1 100644 +--- a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h ++++ b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h +@@ -31,6 +31,4 @@ + struct irq_service *dal_irq_service_dcn20_create( + struct irq_service_init_data *init_data); + +-uint32_t dc_get_hpd_state_dcn20(struct irq_service *irq_service, enum dc_irq_source source); +- + #endif +diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c +index 78940cb20e10..ed54e1c819be 100644 +--- a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c ++++ b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c +@@ -135,31 +135,6 @@ enum dc_irq_source to_dal_irq_source_dcn21( + return DC_IRQ_SOURCE_INVALID; + } + +-uint32_t dc_get_hpd_state_dcn21(struct irq_service *irq_service, enum dc_irq_source source) +-{ +- const struct irq_source_info *info; +- uint32_t addr; +- uint32_t value; +- uint32_t current_status; +- +- info = find_irq_source_info(irq_service, source); +- if (!info) +- return 0; +- +- addr = info->status_reg; +- if (!addr) +- return 0; +- +- value = dm_read_reg(irq_service->ctx, addr); +- current_status = +- get_reg_field_value( +- value, +- HPD0_DC_HPD_INT_STATUS, +- DC_HPD_SENSE); +- +- return current_status; +-} +- + static bool hpd_ack( + struct irq_service *irq_service, + const struct irq_source_info *info) +diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.h b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.h +index 616470e32380..da2bd0e93d7a 100644 +--- a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.h ++++ b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.h +@@ -31,6 +31,4 @@ + struct irq_service *dal_irq_service_dcn21_create( + struct irq_service_init_data *init_data); + +-uint32_t dc_get_hpd_state_dcn21(struct irq_service *irq_service, enum dc_irq_source source); +- + #endif +diff --git a/drivers/gpu/drm/amd/display/dc/irq/irq_service.c b/drivers/gpu/drm/amd/display/dc/irq/irq_service.c +index 4db1133e4466..a2a4fbeb83f8 100644 +--- a/drivers/gpu/drm/amd/display/dc/irq/irq_service.c ++++ b/drivers/gpu/drm/amd/display/dc/irq/irq_service.c +@@ -79,7 +79,7 @@ void dal_irq_service_destroy(struct irq_service **irq_service) + *irq_service = NULL; + } + +-const struct irq_source_info *find_irq_source_info( ++static const struct irq_source_info *find_irq_source_info( + struct irq_service *irq_service, + enum dc_irq_source source) + { +diff --git a/drivers/gpu/drm/amd/display/dc/irq/irq_service.h b/drivers/gpu/drm/amd/display/dc/irq/irq_service.h +index e60b82480093..dbfcb096eedd 100644 +--- a/drivers/gpu/drm/amd/display/dc/irq/irq_service.h ++++ b/drivers/gpu/drm/amd/display/dc/irq/irq_service.h +@@ -69,10 +69,6 @@ struct irq_service { + const struct irq_service_funcs *funcs; + }; + +-const struct irq_source_info *find_irq_source_info( +- struct irq_service *irq_service, +- enum dc_irq_source source); +- + void dal_irq_service_construct( + struct irq_service *irq_service, + struct irq_service_init_data *init_data); diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index 9d7d64fdf410..37e83df92264 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -138,7 +138,7 @@ source=("https://cdn.kernel.org/pub/linux/kernel/v${_branch}/linux-${_major}.tar "Bluetooth-btusb-Add-support-for-IMC-Networks-Mediatek-Chip-MT7921.patch" # squashed s0ix enablement - "9001-v5.16-s0ix-patch-2022-01-15.patch" + "9001-v5.16-s0ix-patch-2022-01-17.patch" ) validpgpkeys=( 'ABAF11C65A2970B130ABE3C479BE3E4300411886' # Linux Torvalds @@ -161,7 +161,7 @@ sha256sums=('027d7e8988bb69ac12ee92406c3be1fe13f990b1ca2249e226225cd1573308bb' '292a7e32b248c7eee6e2f5407d609d03d985f367d329adb02b9d6dba1f85b44c' '7dbfdd120bc155cad1879579cb9dd1185eb5e37078c8c93fef604a275a163812' '1444af2e125080934c67b6adb4561fd354a72ce47d3de393b24f53832ee492ac' - '809c513d36b3e93315fc214f169819993aa9e0b9b2e00a7b28ee6a32d3fc22ed') + 'c9e46df90b9bd721fcd3c84205efce5a6963daf0cadad46c29f5d57be3ec6187') export KBUILD_BUILD_HOST=${KBUILD_BUILD_HOST:-archlinux} export KBUILD_BUILD_USER=${KBUILD_BUILD_USER:-"$pkgbase"} |