Updated to latest release.

Updated binutils to latest release. Removed unecessary patches.

5 files changed, 8 insertions, 992 deletions

diff --git a/.SRCINFO b/.SRCINFO
index 346b49dd75cd..58146a54f60e 100644
--- a/.SRCINFO
+++ b/.SRCINFO
@@ -1,8 +1,8 @@
 # Generated by mksrcinfo v8
-# Fri Jul  1 16:32:53 UTC 2016
+# Fri Aug  5 16:33:36 UTC 2016
 pkgbase = msp430-elf-binutils
 	pkgdesc = GNU binary utilities for the msp430-elf target.
-	pkgver = 2.26.1
+	pkgver = 2.27
 	pkgrel = 1
 	url = http://www.gnu.org/software/binutils/
 	arch = i686
@@ -12,14 +12,8 @@ pkgbase = msp430-elf-binutils
 	depends = flex
 	options = !libtool
 	options = !buildflags
-	source = ftp://ftp.gnu.org/gnu/binutils/binutils-2.26.1.tar.bz2
-	source = dwarf-line-fix.patch
-	source = msp430-dis.c.patch
-	source = update-mcu-list.patch
-	sha256sums = 39c346c87aa4fb14b2f786560aec1d29411b6ec34dce3fe7309fe3dd56949fd8
-	sha256sums = 465964bd2ebf5a7eea340c1e145b3e01bb9da4aa2d9e7d24f8d18a3d2473e2af
-	sha256sums = 0c389f2912d5c860da4f3fd01e589d6da1875582dbca38fde50ae8cd90ab7c79
-	sha256sums = cb0eeaa1c4d90c1da5a26827a2c7f379c8572b7f1373f0f5146e6823b53d5ced
+	source = ftp://ftp.gnu.org/gnu/binutils/binutils-2.27.tar.bz2
+	sha256sums = 369737ce51587f92466041a97ab7d2358c6d9e1b6490b3940eb09fb0a9a6ac88
 
 pkgname = msp430-elf-binutils
 
diff --git a/PKGBUILD b/PKGBUILD
index 75e8eb8e9306..53de86361cf3 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -2,7 +2,7 @@
 
 _target=msp430-elf
 pkgname=${_target}-binutils #-git
-_pkgver=2.26.1
+_pkgver=2.27
 pkgver=${_pkgver}
 #pkgver=2.25.r84308.c576455
 pkgrel=1
@@ -12,6 +12,7 @@ options=('!libtool' '!buildflags')
 url='http://www.gnu.org/software/binutils/'
 license=(GPL)
 depends=('zlib' 'flex')
+
 # build from trunk
 # provides=("${_target}-binutils=${_pkgver}")
 # conflicts=("${_target}-binutils")
@@ -20,14 +21,8 @@ depends=('zlib' 'flex')
 # sha256sums=('SKIP')
 
 # build from source
-source=(ftp://ftp.gnu.org/gnu/binutils/binutils-${pkgver}.tar.bz2
-        dwarf-line-fix.patch
-        msp430-dis.c.patch
-        update-mcu-list.patch)
-sha256sums=('39c346c87aa4fb14b2f786560aec1d29411b6ec34dce3fe7309fe3dd56949fd8'
-            '465964bd2ebf5a7eea340c1e145b3e01bb9da4aa2d9e7d24f8d18a3d2473e2af'
-            '0c389f2912d5c860da4f3fd01e589d6da1875582dbca38fde50ae8cd90ab7c79'
-            'cb0eeaa1c4d90c1da5a26827a2c7f379c8572b7f1373f0f5146e6823b53d5ced')
+source=(ftp://ftp.gnu.org/gnu/binutils/binutils-${pkgver}.tar.bz2)
+sha256sums=('369737ce51587f92466041a97ab7d2358c6d9e1b6490b3940eb09fb0a9a6ac88')
 
 # pkgver() {
 #   cd "${srcdir}/binutils-${_pkgver}"
@@ -38,18 +33,6 @@ sha256sums=('39c346c87aa4fb14b2f786560aec1d29411b6ec34dce3fe7309fe3dd56949fd8'
 
 prepare() {
   cd "${srcdir}/binutils-${_pkgver}"
-  # the following fixes are scheduled for the 2.27 release
-  # fix for
-  # https://sourceware.org/ml/binutils/2016-01/msg00299.html
-  # found in
-  # https://sourceware.org/ml/binutils/2016-01/msg00304.html
-  patch -p1 < ../dwarf-line-fix.patch
-  # fix for
-  # https://sourceware.org/bugzilla/show_bug.cgi?id=20150
-  patch -p1 < ../msp430-dis.c.patch
-  # updated mcu list
-  # https://sourceware.org/ml/binutils/2016-02/msg00243.html
-  patch -p1 < ../update-mcu-list.patch
 
   # ensure a clean build
   [[ -d binutils-build ]] && rm -rf binutils-build
diff --git a/dwarf-line-fix.patch b/dwarf-line-fix.patch
deleted file mode 100644
index a5d322fba061..000000000000
--- a/dwarf-line-fix.patch
+++ /dev/null
@@ -1,10 +0,0 @@
-diff --git a/gas/config/tc-msp430.h b/gas/config/tc-msp430.h
-index 4a02452..86c9117 100644
---- a/gas/config/tc-msp430.h
-+++ b/gas/config/tc-msp430.h
-@@ -171,3 +171,5 @@ extern bfd_boolean msp430_allow_local_subtract (expressionS *, expressionS *, se
-#define DWARF2_USE_FIXED_ADVANCE_PC 1
- 
-#define TC_LINKRELAX_FIXUP(seg) ((seg->flags & SEC_CODE) || (seg->flags & SEC_DEBUGGING))
-+
-+#define DWARF2_ADDR_SIZE(bfd) 4
diff --git a/msp430-dis.c.patch b/msp430-dis.c.patch
deleted file mode 100644
index 95f210691b15..000000000000
--- a/msp430-dis.c.patch
+++ /dev/null
@@ -1,890 +0,0 @@
-diff --git a/opcodes/msp430-dis.c b/opcodes/msp430-dis.c
-index 676a2d8..c7490e9 100644
---- a/opcodes/msp430-dis.c
-+++ b/opcodes/msp430-dis.c
-@@ -36,8 +36,11 @@
- 
- #define PS(x)   (0xffff & (x))
- 
--static unsigned short
--msp430dis_opcode (bfd_vma addr, disassemble_info *info)
-+static bfd_boolean
-+msp430dis_opcode_unsigned (bfd_vma addr,
-+			   disassemble_info *info,
-+			   unsigned short * return_val,
-+			   char * comm)
- {
-   bfd_byte buffer[2];
-   int status;
-@@ -46,9 +49,38 @@ msp430dis_opcode (bfd_vma addr, disassemble_info *info)
-   if (status != 0)
-     {
-       info->memory_error_func (status, addr, info);
--      return -1;
-+      if (comm)
-+	sprintf (comm, _("<memory read failed>"));
-+      * return_val = 0;
-+      return FALSE;
-     }
--  return bfd_getl16 (buffer);
-+  * return_val = bfd_getl16 (buffer);
-+  return TRUE;
-+}
-+
-+static bfd_boolean
-+msp430dis_opcode_signed (bfd_vma addr,
-+			 disassemble_info *info,
-+			 signed int * return_val,
-+			 char * comm)
-+{
-+  bfd_byte buffer[2];
-+  int status;
-+
-+  status = info->read_memory_func (addr, buffer, 2, info);
-+  if (status != 0)
-+    {
-+      info->memory_error_func (status, addr, info);
-+      if (comm)
-+	sprintf (comm, _("<memory read failed>"));
-+      * return_val = 0;
-+      return FALSE;
-+    }
-+  status = bfd_getl_signed_16 (buffer);
-+  if (status & 0x8000)
-+    status |= -1U << 16;
-+  * return_val = status;
-+  return TRUE;
- }
- 
- static int
-@@ -193,47 +225,51 @@ msp430_singleoperand (disassemble_info *info,
- 	  if (regd == 0)
- 	    {
- 	      /* PC relative.  */
--	      dst = msp430dis_opcode (addr + 2, info);
--	      cmd_len += 2;
--	      *cycles = 4;
--	      sprintf (op, "0x%04x", dst);
--	      sprintf (comm, "PC rel. abs addr 0x%04x",
--		       PS ((short) (addr + 2) + dst));
--	      if (extended_dst)
-+	      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
- 		{
--		  dst |= extended_dst << 16;
--		  sprintf (op, "0x%05x", dst);
--		  sprintf (comm, "PC rel. abs addr 0x%05lx",
--			   (long)((addr + 2 + dst) & 0xfffff));
-+		  cmd_len += 2;
-+		  *cycles = 4;
-+		  sprintf (op, "0x%04x", dst);
-+		  sprintf (comm, "PC rel. abs addr 0x%04x",
-+			   PS ((short) (addr + 2) + dst));
-+		  if (extended_dst)
-+		    {
-+		      dst |= extended_dst << 16;
-+		      sprintf (op, "0x%05x", dst);
-+		      sprintf (comm, "PC rel. abs addr 0x%05lx",
-+			       (long)((addr + 2 + dst) & 0xfffff));
-+		    }
- 		}
- 	    }
- 	  else if (regd == 2)
- 	    {
- 	      /* Absolute.  */
--	      dst = msp430dis_opcode (addr + 2, info);
--	      cmd_len += 2;
--	      *cycles = 4;
--	      sprintf (op, "&0x%04x", PS (dst));
--	      if (extended_dst)
-+	      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
- 		{
--		  dst |= extended_dst << 16;
--		  sprintf (op, "&0x%05x", dst & 0xfffff);
-+		  cmd_len += 2;
-+		  *cycles = 4;
-+		  sprintf (op, "&0x%04x", PS (dst));
-+		  if (extended_dst)
-+		    {
-+		      dst |= extended_dst << 16;
-+		      sprintf (op, "&0x%05x", dst & 0xfffff);
-+		    }
- 		}
- 	    }
- 	  else
- 	    {
--	      dst = msp430dis_opcode (addr + 2, info);
--	      cmd_len += 2;
--	      *cycles = 4;
--	      if (extended_dst)
-+	      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
- 		{
--		  dst |= extended_dst << 16;
--		  if (dst & 0x80000)
--		    dst |= -1U << 20;
-+		  cmd_len += 2;
-+		  *cycles = 4;
-+		  if (extended_dst)
-+		    {
-+		      dst |= extended_dst << 16;
-+		      if (dst & 0x80000)
-+			dst |= -1U << 20;
-+		    }
-+		  sprintf (op, "%d(r%d)", dst, regd);
- 		}
--	      else if (dst & 0x8000)
--		dst |= -1U << 16;
--	      sprintf (op, "%d(r%d)", dst, regd);
- 	    }
- 	}
-       break;
-@@ -264,19 +300,21 @@ msp430_singleoperand (disassemble_info *info,
- 	    {
- 	      *cycles = 3;
- 	      /* absolute. @pc+ */
--	      dst = msp430dis_opcode (addr + 2, info);
--	      cmd_len += 2;
--	      sprintf (op, "#%d", dst);
--	      if (dst > 9 || dst < 0)
--		sprintf (comm, "#0x%04x", PS (dst));
--	      if (extended_dst)
-+	      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
- 		{
--		  dst |= extended_dst << 16;
--		  if (dst & 0x80000)
--		    dst |= -1U << 20;
-+		  cmd_len += 2;
- 		  sprintf (op, "#%d", dst);
- 		  if (dst > 9 || dst < 0)
--		    sprintf (comm, "#0x%05x", dst);
-+		    sprintf (comm, "#0x%04x", PS (dst));
-+		  if (extended_dst)
-+		    {
-+		      dst |= extended_dst << 16;
-+		      if (dst & 0x80000)
-+			dst |= -1U << 20;
-+		      sprintf (op, "#%d", dst);
-+		      if (dst > 9 || dst < 0)
-+			sprintf (comm, "#0x%05x", dst);
-+		    }
- 		}
- 	    }
- 	  else
-@@ -288,29 +326,33 @@ msp430_singleoperand (disassemble_info *info,
- 	  if (regd == 0)
- 	    {
- 	      /* PC relative.  */
--	      dst = msp430dis_opcode (addr + 2, info);
--	      cmd_len += 2;
--	      sprintf (op, "0x%04x", PS (dst));
--	      sprintf (comm, "PC rel. 0x%04x",
--		       PS ((short) addr + 2 + dst));
--	      if (extended_dst)
-+	      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
- 		{
--		  dst |= extended_dst << 16;
--		  sprintf (op, "0x%05x", dst & 0xffff);
--		  sprintf (comm, "PC rel. 0x%05lx",
--			   (long)((addr + 2 + dst) & 0xfffff));
-+		  cmd_len += 2;
-+		  sprintf (op, "0x%04x", PS (dst));
-+		  sprintf (comm, "PC rel. 0x%04x",
-+			   PS ((short) addr + 2 + dst));
-+		  if (extended_dst)
-+		    {
-+		      dst |= extended_dst << 16;
-+		      sprintf (op, "0x%05x", dst & 0xffff);
-+		      sprintf (comm, "PC rel. 0x%05lx",
-+			       (long)((addr + 2 + dst) & 0xfffff));
-+		    }
- 		}
- 	    }
- 	  else if (regd == 2)
- 	    {
- 	      /* Absolute.  */
--	      dst = msp430dis_opcode (addr + 2, info);
--	      cmd_len += 2;
--	      sprintf (op, "&0x%04x", PS (dst));
--	      if (extended_dst)
-+	      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
- 		{
--		  dst |= extended_dst << 16;
--		  sprintf (op, "&0x%05x", dst & 0xfffff);
-+		  cmd_len += 2;
-+		  sprintf (op, "&0x%04x", PS (dst));
-+		  if (extended_dst)
-+		    {
-+		      dst |= extended_dst << 16;
-+		      sprintf (op, "&0x%05x", dst & 0xfffff);
-+		    }
- 		}
- 	    }
- 	  else if (regd == 3)
-@@ -322,19 +364,19 @@ msp430_singleoperand (disassemble_info *info,
- 	  else
- 	    {
- 	      /* Indexed.  */
--	      dst = msp430dis_opcode (addr + 2, info);
--	      cmd_len += 2;
--	      if (extended_dst)
-+	      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
- 		{
--		  dst |= extended_dst << 16;
--		  if (dst & 0x80000)
--		    dst |= -1U << 20;
-+		  cmd_len += 2;
-+		  if (extended_dst)
-+		    {
-+		      dst |= extended_dst << 16;
-+		      if (dst & 0x80000)
-+			dst |= -1U << 20;
-+		    }
-+		  sprintf (op, "%d(r%d)", dst, regd);
-+		  if (dst > 9 || dst < 0)
-+		    sprintf (comm, "%05x", dst);
- 		}
--	      else if (dst & 0x8000)
--		dst |= -1U << 16;
--	      sprintf (op, "%d(r%d)", dst, regd);
--	      if (dst > 9 || dst < 0)
--		sprintf (comm, "%05x", dst);
- 	    }
- 	}
-       break;
-@@ -352,6 +394,7 @@ msp430_singleoperand (disassemble_info *info,
-       *cycles = 2;
-       return 2;
-       break;
-+
-     default:
-       cmd_len = 0;
-     }
-@@ -421,56 +464,65 @@ msp430_doubleoperand (disassemble_info *info,
- 	  if (regd == 0)
- 	    {
- 	      /* PC relative, Symbolic.  */
--	      dst = msp430dis_opcode (addr + 2, info);
--	      cmd_len += 4;
--	      *cycles = 6;
--	      sprintf (op1, "0x%04x", PS (dst));
--	      sprintf (comm1, "PC rel. 0x%04x",
--		       PS ((short) addr + 2 + dst));
--	      if (extension_word)
-+	      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
- 		{
--		  dst |= extended_dst << 16;
--		  if (dst & 0x80000)
--		    dst |= -1U << 20;
--		  sprintf (op1, "0x%05x", dst & 0xfffff);
--		  sprintf (comm1, "PC rel. 0x%05lx",
--			   (long)((addr + 2 + dst) & 0xfffff));
-+		  cmd_len += 4;
-+		  *cycles = 6;
-+		  sprintf (op1, "0x%04x", PS (dst));
-+		  sprintf (comm1, "PC rel. 0x%04x",
-+			   PS ((short) addr + 2 + dst));
-+		  if (extension_word)
-+		    {
-+		      dst |= extended_dst << 16;
-+		      if (dst & 0x80000)
-+			dst |= -1U << 20;
-+		      sprintf (op1, "0x%05x", dst & 0xfffff);
-+		      sprintf (comm1, "PC rel. 0x%05lx",
-+			       (long)((addr + 2 + dst) & 0xfffff));
-+		    }
- 		}
- 	    }
- 	  else if (regd == 2)
- 	    {
- 	      /* Absolute.  */
--	      dst = msp430dis_opcode (addr + 2, info);
--	      /* If the 'src' field is not the same as the dst
--		 then this is not an rla instruction.  */
--	      if (dst != msp430dis_opcode (addr + 4, info))
--		return 0;
--	      cmd_len += 4;
--	      *cycles = 6;
--	      sprintf (op1, "&0x%04x", PS (dst));
--	      if (extension_word)
-+	      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
- 		{
--		  dst |= extended_dst << 16;
--		  sprintf (op1, "&0x%05x", dst & 0xfffff);
-+		  int src;
-+
-+		  /* If the 'src' field is not the same as the dst
-+		     then this is not an rla instruction.  */
-+		  if (msp430dis_opcode_signed (addr + 4, info, &src, comm2))
-+		    {
-+		      if (src != dst)
-+			return 0;
-+		    }
-+		  cmd_len += 4;
-+		  *cycles = 6;
-+		  sprintf (op1, "&0x%04x", PS (dst));
-+		  if (extension_word)
-+		    {
-+		      dst |= extended_dst << 16;
-+		      sprintf (op1, "&0x%05x", dst & 0xfffff);
-+		    }
- 		}
- 	    }
- 	  else
- 	    {
- 	      /* Indexed.  */
--	      dst = msp430dis_opcode (addr + 2, info);
--	      if (extension_word)
-+	      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
- 		{
--		  dst |= extended_dst << 16;
--		  if (dst & 0x80000)
--		    dst |= -1U << 20;
-+		  if (extension_word)
-+		    {
-+		      dst |= extended_dst << 16;
-+		      if (dst & 0x80000)
-+			dst |= -1U << 20;
-+		    }
-+		  cmd_len += 4;
-+		  *cycles = 6;
-+		  sprintf (op1, "%d(r%d)", dst, regd);
-+		  if (dst > 9 || dst < -9)
-+		    sprintf (comm1, "#0x%05x", dst);
- 		}
--	      else if (dst & 0x8000)
--		dst |= -1U << 16;
--	      cmd_len += 4;
--	      *cycles = 6;
--	      sprintf (op1, "%d(r%d)", dst, regd);
--	      if (dst > 9 || dst < -9)
--		sprintf (comm1, "#0x%05x", dst);
- 	    }
- 	}
- 
-@@ -514,19 +566,22 @@ msp430_doubleoperand (disassemble_info *info,
- 	{
- 	  *cycles = 3;
- 	  /* Absolute. @pc+.  */
--	  dst = msp430dis_opcode (addr + 2, info);
--	  cmd_len += 2;
--	  sprintf (op1, "#%d", dst);
--	  if (dst > 9 || dst < 0)
--	    sprintf (comm1, "#0x%04x", PS (dst));
--	  if (extension_word)
-+	  if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
- 	    {
--	      dst |= extended_src << 16;
--	      if (dst & 0x80000)
--		dst |= -1U << 20;
-+	      cmd_len += 2;
- 	      sprintf (op1, "#%d", dst);
- 	      if (dst > 9 || dst < 0)
--		sprintf (comm1, "0x%05x", dst & 0xfffff);
-+		sprintf (comm1, "#0x%04x", PS (dst));
-+	      if (extension_word)
-+		{
-+		  dst &= 0xffff;
-+		  dst |= extended_src << 16;
-+		  if (dst & 0x80000)
-+		    dst |= -1U << 20;
-+		  sprintf (op1, "#%d", dst);
-+		  if (dst > 9 || dst < 0)
-+		    sprintf (comm1, "0x%05x", dst & 0xfffff);
-+		}
- 	    }
- 	}
-       else
-@@ -538,34 +593,40 @@ msp430_doubleoperand (disassemble_info *info,
- 	{
- 	  *cycles = 4;
- 	  /* PC relative.  */
--	  dst = msp430dis_opcode (addr + 2, info);
--	  cmd_len += 2;
--	  sprintf (op1, "0x%04x", PS (dst));
--	  sprintf (comm1, "PC rel. 0x%04x",
--		   PS ((short) addr + 2 + dst));
--	  if (extension_word)
-+	  if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
- 	    {
--	      dst |= extended_src << 16;
--	      if (dst & 0x80000)
--		dst |= -1U << 20;
--	      sprintf (op1, "0x%05x", dst & 0xfffff);
--	      sprintf (comm1, "PC rel. 0x%05lx",
--		       (long) ((addr + 2 + dst) & 0xfffff));
-+	      cmd_len += 2;
-+	      sprintf (op1, "0x%04x", PS (dst));
-+	      sprintf (comm1, "PC rel. 0x%04x",
-+		       PS ((short) addr + 2 + dst));
-+	      if (extension_word)
-+		{
-+		  dst &= 0xffff;
-+		  dst |= extended_src << 16;
-+		  if (dst & 0x80000)
-+		    dst |= -1U << 20;
-+		  sprintf (op1, "0x%05x", dst & 0xfffff);
-+		  sprintf (comm1, "PC rel. 0x%05lx",
-+			   (long) ((addr + 2 + dst) & 0xfffff));
-+		}
- 	    }
- 	}
-       else if (regs == 2)
- 	{
- 	  *cycles = 2;
- 	  /* Absolute.  */
--	  dst = msp430dis_opcode (addr + 2, info);
--	  cmd_len += 2;
--	  sprintf (op1, "&0x%04x", PS (dst));
--	  sprintf (comm1, "0x%04x", PS (dst));
--	  if (extension_word)
-+	  if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
- 	    {
--	      dst |= extended_src << 16;
--	      sprintf (op1, "&0x%05x", dst & 0xfffff);
--	      * comm1 = 0;
-+	      cmd_len += 2;
-+	      sprintf (op1, "&0x%04x", PS (dst));
-+	      sprintf (comm1, "0x%04x", PS (dst));
-+	      if (extension_word)
-+		{
-+		  dst &= 0xffff;
-+		  dst |= extended_src << 16;
-+		  sprintf (op1, "&0x%05x", dst & 0xfffff);
-+		  * comm1 = 0;
-+		}
- 	    }
- 	}
-       else if (regs == 3)
-@@ -578,19 +639,20 @@ msp430_doubleoperand (disassemble_info *info,
- 	{
- 	  *cycles = 3;
- 	  /* Indexed.  */
--	  dst = msp430dis_opcode (addr + 2, info);
--	  cmd_len += 2;
--	  if (extension_word)
-+	  if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
- 	    {
--	      dst |= extended_src << 16;
--	      if (dst & 0x80000)
--		dst |= -1U << 20;
-+	      cmd_len += 2;
-+	      if (extension_word)
-+		{
-+		  dst &= 0xffff;
-+		  dst |= extended_src << 16;
-+		  if (dst & 0x80000)
-+		    dst |= -1U << 20;
-+		}
-+	      sprintf (op1, "%d(r%d)", dst, regs);
-+	      if (dst > 9 || dst < -9)
-+		sprintf (comm1, "0x%05x", dst);
- 	    }
--	  else if (dst & 0x8000)
--	    dst |= -1U << 16;
--	  sprintf (op1, "%d(r%d)", dst, regs);
--	  if (dst > 9 || dst < -9)
--	    sprintf (comm1, "0x%05x", dst);
- 	}
-     }
- 
-@@ -621,50 +683,54 @@ msp430_doubleoperand (disassemble_info *info,
- 	{
- 	  /* PC relative.  */
- 	  *cycles += 1;
--	  dst = msp430dis_opcode (addr + cmd_len, info);
--	  sprintf (op2, "0x%04x", PS (dst));
--	  sprintf (comm2, "PC rel. 0x%04x",
--		   PS ((short) addr + cmd_len + dst));
--	  if (extension_word)
-+	  if (msp430dis_opcode_signed (addr + cmd_len, info, &dst, comm2))
- 	    {
--	      dst |= extended_dst << 16;
--	      if (dst & 0x80000)
--		dst |= -1U << 20;
--	      sprintf (op2, "0x%05x", dst & 0xfffff);
--	      sprintf (comm2, "PC rel. 0x%05lx",
--		       (long)((addr + cmd_len + dst) & 0xfffff));
-+	      sprintf (op2, "0x%04x", PS (dst));
-+	      sprintf (comm2, "PC rel. 0x%04x",
-+		       PS ((short) addr + cmd_len + dst));
-+	      if (extension_word)
-+		{
-+		  dst |= extended_dst << 16;
-+		  if (dst & 0x80000)
-+		    dst |= -1U << 20;
-+		  sprintf (op2, "0x%05x", dst & 0xfffff);
-+		  sprintf (comm2, "PC rel. 0x%05lx",
-+			   (long)((addr + cmd_len + dst) & 0xfffff));
-+		}
- 	    }
- 	  cmd_len += 2;
- 	}
-       else if (regd == 2)
- 	{
- 	  /* Absolute.  */
--	  dst = msp430dis_opcode (addr + cmd_len, info);
--	  cmd_len += 2;
--	  sprintf (op2, "&0x%04x", PS (dst));
--	  if (extension_word)
-+	  if (msp430dis_opcode_signed (addr + cmd_len, info, &dst, comm2))
- 	    {
--	      dst |= extended_dst << 16;
--	      sprintf (op2, "&0x%05x", dst & 0xfffff);
-+	      cmd_len += 2;
-+	      sprintf (op2, "&0x%04x", PS (dst));
-+	      if (extension_word)
-+		{
-+		  dst |= extended_dst << 16;
-+		  sprintf (op2, "&0x%05x", dst & 0xfffff);
-+		}
- 	    }
- 	}
-       else
- 	{
--	  dst = msp430dis_opcode (addr + cmd_len, info);
--	  cmd_len += 2;
--	  if (dst & 0x8000)
--	    dst |= -1U << 16;
--	  if (dst > 9 || dst < 0)
--	    sprintf (comm2, "0x%04x", PS (dst));
--	  if (extension_word)
-+	  if (msp430dis_opcode_signed (addr + cmd_len, info, &dst, comm2))
- 	    {
--	      dst |= extended_dst << 16;
--	      if (dst & 0x80000)
--		dst |= -1U << 20;
-+	      cmd_len += 2;
- 	      if (dst > 9 || dst < 0)
--		sprintf (comm2, "0x%05x", dst & 0xfffff);
-+		sprintf (comm2, "0x%04x", PS (dst));
-+	      if (extension_word)
-+		{
-+		  dst |= extended_dst << 16;
-+		  if (dst & 0x80000)
-+		    dst |= -1U << 20;
-+		  if (dst > 9 || dst < 0)
-+		    sprintf (comm2, "0x%05x", dst & 0xfffff);
-+		}
-+	      sprintf (op2, "%d(r%d)", dst, regd);
- 	    }
--	  sprintf (op2, "%d(r%d)", dst, regd);
- 	}
-     }
- 
-@@ -683,7 +749,8 @@ msp430_branchinstr (disassemble_info *info,
-   int regs = 0, regd = 0;
-   int as = 0;
-   int cmd_len = 2;
--  short dst = 0;
-+  int dst = 0;
-+  unsigned short udst = 0;
- 
-   regd = insn & 0x0f;
-   regs = (insn & 0x0f00) >> 8;
-@@ -719,9 +786,11 @@ msp430_branchinstr (disassemble_info *info,
- 	{
- 	  /* Absolute. @pc+  */
- 	  *cycles = 3;
--	  dst = msp430dis_opcode (addr + 2, info);
--	  cmd_len += 2;
--	  sprintf (op1, "#0x%04x", PS (dst));
-+	  if (msp430dis_opcode_unsigned (addr + 2, info, &udst, comm1))
-+	    {
-+	      cmd_len += 2;
-+	      sprintf (op1, "#0x%04x", PS (udst));
-+	    }
- 	}
-       else
- 	* cycles = print_as3_reg_name (regs, op1, comm1, 1, 1, 2);
-@@ -733,19 +802,23 @@ msp430_branchinstr (disassemble_info *info,
-       if (regs == 0)
- 	{
- 	  /* PC relative.  */
--	  dst = msp430dis_opcode (addr + 2, info);
--	  cmd_len += 2;
--	  (*cycles)++;
--	  sprintf (op1, "0x%04x", PS (dst));
--	  sprintf (comm1, "PC rel. 0x%04x",
--		   PS ((short) addr + 2 + dst));
-+	  if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
-+	    {
-+	      cmd_len += 2;
-+	      (*cycles)++;
-+	      sprintf (op1, "0x%04x", PS (dst));
-+	      sprintf (comm1, "PC rel. 0x%04x",
-+		       PS ((short) addr + 2 + dst));
-+	    }
- 	}
-       else if (regs == 2)
- 	{
- 	  /* Absolute.  */
--	  dst = msp430dis_opcode (addr + 2, info);
--	  cmd_len += 2;
--	  sprintf (op1, "&0x%04x", PS (dst));
-+	  if (msp430dis_opcode_unsigned (addr + 2, info, &udst, comm1))
-+	    {
-+	      cmd_len += 2;
-+	      sprintf (op1, "&0x%04x", PS (udst));
-+	    }
- 	}
-       else if (regs == 3)
- 	{
-@@ -756,11 +829,11 @@ msp430_branchinstr (disassemble_info *info,
-       else
- 	{
- 	  /* Indexed.  */
--	  dst = msp430dis_opcode (addr + 2, info);
--	  cmd_len += 2;
--	  if (dst & 0x8000)
--	    dst |= -1U << 16;
--	  sprintf (op1, "%d(r%d)", dst, regs);
-+	  if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
-+	    {
-+	      cmd_len += 2;
-+	      sprintf (op1, "%d(r%d)", dst, regs);
-+	    }
- 	}
-     }
- 
-@@ -780,7 +853,7 @@ msp430x_calla_instr (disassemble_info * info,
-   int            am = (insn & 0xf0) >> 4;
-   int            cmd_len = 2;
-   unsigned short udst = 0;
--  short          dst = 0;
-+  int            dst = 0;
- 
-   switch (am)
-     {
-@@ -791,13 +864,15 @@ msp430x_calla_instr (disassemble_info * info,
- 
-     case 5: /* CALLA x(Rdst) */
-       *cycles = 3;
--      dst = msp430dis_opcode (addr + 2, info);
--      cmd_len += 2;
--      sprintf (op1, "%d(r%d)", dst, reg);
--      if (reg == 0)
--	sprintf (comm1, "PC rel. 0x%05lx", (long) (addr + 2 + dst));
--      else
--	sprintf (comm1, "0x%05x", dst);
-+      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
-+	{
-+	  cmd_len += 2;
-+	  sprintf (op1, "%d(r%d)", dst, reg);
-+	  if (reg == 0)
-+	    sprintf (comm1, "PC rel. 0x%05lx", (long) (addr + 2 + dst));
-+	  else
-+	    sprintf (comm1, "0x%05x", dst);
-+	}
-       break;
- 
-     case 6: /* CALLA @Rdst */
-@@ -811,28 +886,34 @@ msp430x_calla_instr (disassemble_info * info,
-       break;
- 
-     case 8: /* CALLA &abs20 */
--      udst = msp430dis_opcode (addr + 2, info);
--      cmd_len += 2;
--      *cycles = 4;
--      sprintf (op1, "&%d", (ureg << 16) + udst);
--      sprintf (comm1, "0x%05x", (ureg << 16) + udst);
-+      if (msp430dis_opcode_unsigned (addr + 2, info, &udst, comm1))
-+	{
-+	  cmd_len += 2;
-+	  *cycles = 4;
-+	  sprintf (op1, "&%d", (ureg << 16) + udst);
-+	  sprintf (comm1, "0x%05x", (ureg << 16) + udst);
-+	}
-       break;
- 
-     case 9: /* CALLA pcrel-sym */
--      dst = msp430dis_opcode (addr + 2, info);
--      cmd_len += 2;
--      *cycles = 4;
--      sprintf (op1, "%d(PC)", (reg << 16) + dst);
--      sprintf (comm1, "PC rel. 0x%05lx",
--	       (long) (addr + 2 + dst + (reg << 16)));
-+      if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
-+	{
-+	  cmd_len += 2;
-+	  *cycles = 4;
-+	  sprintf (op1, "%d(PC)", (reg << 16) + dst);
-+	  sprintf (comm1, "PC rel. 0x%05lx",
-+		   (long) (addr + 2 + dst + (reg << 16)));
-+	}
-       break;
- 
-     case 11: /* CALLA #imm20 */
--      udst = msp430dis_opcode (addr + 2, info);
--      cmd_len += 2;
--      *cycles = 4;
--      sprintf (op1, "#%d", (ureg << 16) + udst);
--      sprintf (comm1, "0x%05x", (ureg << 16) + udst);
-+      if (msp430dis_opcode_unsigned (addr + 2, info, &udst, comm1))
-+	{
-+	  cmd_len += 2;
-+	  *cycles = 4;
-+	  sprintf (op1, "#%d", (ureg << 16) + udst);
-+	  sprintf (comm1, "0x%05x", (ureg << 16) + udst);
-+	}
-       break;
- 
-     default:
-@@ -855,9 +936,9 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
-   int cycles = 0;
-   char *bc = "";
-   unsigned short extension_word = 0;
-+  unsigned short bits;
- 
--  insn = msp430dis_opcode (addr, info);
--  if (insn == (unsigned short) -1)
-+  if (! msp430dis_opcode_unsigned (addr, info, &insn, NULL))
-     {
-       prin (stream, ".word	0xffff;	????");
-       return 2;
-@@ -877,8 +958,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
-     {
-       extension_word = insn;
-       addr += 2;
--      insn = msp430dis_opcode (addr, info);
--      if (insn == (unsigned short) -1)
-+      if (! msp430dis_opcode_unsigned (addr, info, &insn, NULL))
- 	{
- 	  prin (stream, ".word	0x%04x, 0xffff;	????",
- 		extension_word);
-@@ -963,10 +1043,13 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
- 	      else
- 		{
- 		  n <<= 16;
--		  n |= msp430dis_opcode (addr + 2, info);
--		  sprintf (op1, "#%d", n);
--		  if (n > 9 || n < 0)
--		    sprintf (comm1, "0x%05x", n);
-+		  if (msp430dis_opcode_unsigned (addr + 2, info, &bits, comm1))
-+		    {
-+		      n |= bits;
-+		      sprintf (op1, "#%d", n);
-+		      if (n > 9 || n < 0)
-+			sprintf (comm1, "0x%05x", n);
-+		    }
- 		  cmd_len = 4;
- 		}
- 	      sprintf (op2, "r%d", reg);
-@@ -998,12 +1081,15 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
- 		case 2: /* MOVA &abs20, Rdst */
- 		  cmd_len = 4;
- 		  n <<= 16;
--		  n |= msp430dis_opcode (addr + 2, info);
--		  sprintf (op1, "&%d", n);
--		  if (n > 9 || n < 0)
--		    sprintf (comm1, "0x%05x", n);
--		  if (strcmp (opcode->name, "bra") != 0)
--		    sprintf (op2, "r%d", reg);
-+		  if (msp430dis_opcode_unsigned (addr + 2, info, &bits, comm1))
-+		    {
-+		      n |= bits;
-+		      sprintf (op1, "&%d", n);
-+		      if (n > 9 || n < 0)
-+			sprintf (comm1, "0x%05x", n);
-+		      if (strcmp (opcode->name, "bra") != 0)
-+			sprintf (op2, "r%d", reg);
-+		    }
- 		  break;
- 
- 		case 3: /* MOVA x(Rsrc), Rdst */
-@@ -1011,58 +1097,64 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
- 		  if (strcmp (opcode->name, "bra") != 0)
- 		    sprintf (op2, "r%d", reg);
- 		  reg = n;
--		  n = msp430dis_opcode (addr + 2, info);
--		  if (n & 0x8000)
--		    n |= -1U << 16;
--		  sprintf (op1, "%d(r%d)", n, reg);
--		  if (n > 9 || n < 0)
-+		  if (msp430dis_opcode_signed (addr + 2, info, &n, comm1))
- 		    {
--		      if (reg == 0)
--			sprintf (comm1, "PC rel. 0x%05lx",
--				 (long) (addr + 2 + n));
--		      else
--			sprintf (comm1, "0x%05x", n);
-+		      sprintf (op1, "%d(r%d)", n, reg);
-+		      if (n > 9 || n < 0)
-+			{
-+			  if (reg == 0)
-+			    sprintf (comm1, "PC rel. 0x%05lx",
-+				     (long) (addr + 2 + n));
-+			  else
-+			    sprintf (comm1, "0x%05x", n);
-+			}
- 		    }
- 		  break;
- 
- 		case 6: /* MOVA Rsrc, &abs20 */
- 		  cmd_len = 4;
- 		  reg <<= 16;
--		  reg |= msp430dis_opcode (addr + 2, info);
--		  sprintf (op1, "r%d", n);
--		  sprintf (op2, "&%d", reg);
--		  if (reg > 9 || reg < 0)
--		    sprintf (comm2, "0x%05x", reg);
-+		  if (msp430dis_opcode_unsigned (addr + 2, info, &bits, comm2))
-+		    {
-+		      reg |= bits;
-+		      sprintf (op1, "r%d", n);
-+		      sprintf (op2, "&%d", reg);
-+		      if (reg > 9 || reg < 0)
-+			sprintf (comm2, "0x%05x", reg);
-+		    }
- 		  break;
- 
- 		case 7: /* MOVA Rsrc, x(Rdst) */
- 		  cmd_len = 4;
- 		  sprintf (op1, "r%d", n);
--		  n = msp430dis_opcode (addr + 2, info);
--		  if (n & 0x8000)
--		    n |= -1U << 16;
--		  sprintf (op2, "%d(r%d)", n, reg);
--		  if (n > 9 || n < 0)
-+		  if (msp430dis_opcode_signed (addr + 2, info, &n, comm2))
- 		    {
--		      if (reg == 0)
--			sprintf (comm2, "PC rel. 0x%05lx",
--				 (long) (addr + 2 + n));
--		      else
--			sprintf (comm2, "0x%05x", n);
-+		      sprintf (op2, "%d(r%d)", n, reg);
-+		      if (n > 9 || n < 0)
-+			{
-+			  if (reg == 0)
-+			    sprintf (comm2, "PC rel. 0x%05lx",
-+				     (long) (addr + 2 + n));
-+			  else
-+			    sprintf (comm2, "0x%05x", n);
-+			}
- 		    }
- 		  break;
- 
- 		case 8: /* MOVA #imm20, Rdst */
- 		  cmd_len = 4;
- 		  n <<= 16;
--		  n |= msp430dis_opcode (addr + 2, info);
--		  if (n & 0x80000)
--		    n |= -1U << 20;
--		  sprintf (op1, "#%d", n);
--		  if (n > 9 || n < 0)
--		    sprintf (comm1, "0x%05x", n);
--		  if (strcmp (opcode->name, "bra") != 0)
--		    sprintf (op2, "r%d", reg);
-+		  if (msp430dis_opcode_unsigned (addr + 2, info, &bits, comm1))
-+		    {
-+		      n |= bits;
-+		      if (n & 0x80000)
-+			n |= -1U << 20;
-+		      sprintf (op1, "#%d", n);
-+		      if (n > 9 || n < 0)
-+			sprintf (comm1, "0x%05x", n);
-+		      if (strcmp (opcode->name, "bra") != 0)
-+			sprintf (op2, "r%d", reg);
-+		    }
- 		  break;
- 
- 		case 12: /* MOVA Rsrc, Rdst */
diff --git a/update-mcu-list.patch b/update-mcu-list.patch
deleted file mode 100644
index e3bf224a75fc..000000000000
--- a/update-mcu-list.patch
+++ /dev/null
@@ -1,61 +0,0 @@
---- a/gas/config/tc-msp430.c
-+++ b/gas/config/tc-msp430.c
-@@ -710,7 +710,7 @@ msp430_set_arch (int option)
- /* This is a copy of the same data structure found in gcc/config/msp430/msp430.c
-    Keep these two structures in sync.
-    The data in this structure has been extracted from the devices.csv file
--   released by TI, updated as of 8 October 2015.  */
-+   released by TI, updated as of March 2016.  */
- 
- struct msp430_mcu_data
- {
-@@ -1136,7 +1136,13 @@ msp430_mcu_data [] =
-   { "msp430fg6626",2,8 },
-   { "msp430fr2032",2,0 },
-   { "msp430fr2033",2,0 },
-+  { "msp430fr2310",2,0 },
-+  { "msp430fr2311",2,0 },
-   { "msp430fr2433",2,8 },
-+  { "msp430fr2532",2,8 },
-+  { "msp430fr2533",2,8 },
-+  { "msp430fr2632",2,8 },
-+  { "msp430fr2633",2,8 },
-   { "msp430fr2xx_4xxgeneric",2,8 },
-   { "msp430fr4131",2,0 },
-   { "msp430fr4132",2,0 },
-@@ -1170,6 +1176,8 @@ msp430_mcu_data [] =
-   { "msp430fr5858",2,8 },
-   { "msp430fr5859",2,8 },
-   { "msp430fr5867",2,8 },
-+  { "msp430fr5862",2,8 },
-+  { "msp430fr5864",2,8 },
-   { "msp430fr58671",2,8 },
-   { "msp430fr5868",2,8 },
-   { "msp430fr5869",2,8 },
-@@ -1180,6 +1188,8 @@ msp430_mcu_data [] =
-   { "msp430fr5888",2,8 },
-   { "msp430fr5889",2,8 },
-   { "msp430fr58891",2,8 },
-+  { "msp430fr5892",2,8 },
-+  { "msp430fr5894",2,8 },
-   { "msp430fr5922",2,8 },
-   { "msp430fr59221",2,8 },
-   { "msp430fr5947",2,8 },
-@@ -1189,6 +1199,8 @@ msp430_mcu_data [] =
-   { "msp430fr5957",2,8 },
-   { "msp430fr5958",2,8 },
-   { "msp430fr5959",2,8 },
-+  { "msp430fr5962",2,8 },
-+  { "msp430fr5964",2,8 },
-   { "msp430fr5967",2,8 },
-   { "msp430fr5968",2,8 },
-   { "msp430fr5969",2,8 },
-@@ -1201,6 +1213,8 @@ msp430_mcu_data [] =
-   { "msp430fr5988",2,8 },
-   { "msp430fr5989",2,8 },
-   { "msp430fr59891",2,8 },
-+  { "msp430fr5992",2,8 },
-+  { "msp430fr5994",2,8 },
-   { "msp430fr5xx_6xxgeneric",2,8 },
-   { "msp430fr6820",2,8 },
-   { "msp430fr6822",2,8 },