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authorCayetano Santos2020-04-22 18:11:56 +0200
committerCayetano Santos2020-04-22 18:11:56 +0200
commit39c642a8b2fcfd491047bb219b7186e4fd97e3b5 (patch)
tree2a38cfa77b7cfc3b0a1edc43d40e60518db90365
parentaf2f9334751a06e8935af7f0f2bbc319e4842991 (diff)
downloadaur-39c642a8b2fcfd491047bb219b7186e4fd97e3b5.tar.gz
add setuptools as dependency
-rw-r--r--.SRCINFO1
-rw-r--r--PKGBUILD2
2 files changed, 2 insertions, 1 deletions
diff --git a/.SRCINFO b/.SRCINFO
index 943395d66dac..97b71e5ba254 100644
--- a/.SRCINFO
+++ b/.SRCINFO
@@ -8,6 +8,7 @@ pkgbase = python-cocotb
makedepends = git
makedepends = python-setuptools
depends = python
+ depends = python-setuptools
optdepends = iverilog: for simulating verilog designs
optdepends = ghdl: for simulating VHDL designs
optdepends = gtkwave: for visualizing waveforms
diff --git a/PKGBUILD b/PKGBUILD
index c43601bfff66..e4102697594a 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -8,7 +8,7 @@ url="http://github.com/cocotb/cocotb/"
license=('BSD')
conflicts=('python-cocotb-git')
provides=('python-cocotb')
-depends=('python')
+depends=('python' 'python-setuptools')
makedepends=('git' 'python-setuptools')
optdepends=('iverilog: for simulating verilog designs'