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author | Cayetano Santos | 2020-04-29 17:48:50 +0200 |
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committer | Cayetano Santos | 2020-04-29 17:48:50 +0200 |
commit | d2e3c0eaa4dd82f50156b0ecd70d15e728b278cf (patch) | |
tree | 00f6bd1fcf4cd29e06fab46d2b0adf1f07d81e35 | |
parent | a1e89033bad30807634d17941a858236ff971a08 (diff) | |
download | aur-d2e3c0eaa4dd82f50156b0ecd70d15e728b278cf.tar.gz |
dependency on pyaml
-rw-r--r-- | .SRCINFO | 1 | ||||
-rw-r--r-- | PKGBUILD | 2 |
2 files changed, 2 insertions, 1 deletions
@@ -10,6 +10,7 @@ pkgbase = python-fusesoc depends = python depends = python-edalize depends = python-setuptools + depends = python-pyaml optdepends = iverilog: for simulating verilog designs optdepends = ghdl: for simulating VHDL designs optdepends = gtkwave: for visualizing waveforms @@ -8,7 +8,7 @@ url="http://github.com/olofk/fusesoc/" license=('GPLv3') conflicts=('python-fusesoc-git') provides=('python-fusesoc') -depends=('python' 'python-edalize' 'python-setuptools') +depends=('python' 'python-edalize' 'python-setuptools' 'python-pyaml') makedepends=('git' 'python-pip') optdepends=('iverilog: for simulating verilog designs' |