diff options
author | Adam | 2019-04-19 20:40:41 +0800 |
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committer | Adam | 2019-04-19 20:42:05 +0800 |
commit | 83623247f2a545b19146351bd984ffbc65fc908f (patch) | |
tree | 0451eaebaaceee96c8dee83b5e29f04c12bb4a7f | |
download | aur-83623247f2a545b19146351bd984ffbc65fc908f.tar.gz |
uboot-rockpro64: Initial commit
Signed-off-by: Adam <adam900710@gmail.com>
-rw-r--r-- | .SRCINFO | 28 | ||||
-rw-r--r-- | 0001-board-rockchip-rk3399-add-Rockpro64-board-support.patch | 2391 | ||||
-rw-r--r-- | PKGBUILD | 58 | ||||
-rw-r--r-- | boot.txt | 22 | ||||
-rw-r--r-- | mkscr | 9 | ||||
-rw-r--r-- | rk3399trust.ini | 17 | ||||
-rw-r--r-- | uboot-rockpro64.install | 26 |
7 files changed, 2551 insertions, 0 deletions
diff --git a/.SRCINFO b/.SRCINFO new file mode 100644 index 000000000000..875fe4148d54 --- /dev/null +++ b/.SRCINFO @@ -0,0 +1,28 @@ +pkgbase = uboot-rockpro64 + pkgdesc = U-Boot for RockPro64 + pkgver = 2019.04 + pkgrel = 1 + url = http://www.denx.de/wiki/U-Boot/WebHome + install = uboot-rockpro64.install + arch = aarch64 + license = GPL + makedepends = bc + makedepends = git + makedepends = rockchip-tools + backup = boot/boot.txt + backup = boot/boot.scr + source = ftp://ftp.denx.de/pub/u-boot/u-boot-2019.04.tar.bz2 + source = git+https://github.com/rockchip-linux/rkbin.git#commit=587600675cb8cc77d559e9c506d250ce17d9e2b1 + source = rk3399trust.ini + source = boot.txt + source = mkscr + source = 0001-board-rockchip-rk3399-add-Rockpro64-board-support.patch + sha256sums = 76b7772d156b3ddd7644c8a1736081e55b78828537ff714065d21dbade229bef + sha256sums = SKIP + sha256sums = dd5c56c6957f670e7e52d145aa66238b17a54edd87b787bfda050abb1d22d2db + sha256sums = d7e5c78aac58f0628405de70f92c72c3281bb3d8bb8cfe005644edaa2086ab50 + sha256sums = a4fc8b6b92bc364d6542670d294aa618a8501fb8729f415cc0a3eed776ef0c8e + sha256sums = 2c0ac7700c589d030aa810bff1c9dbea2c71d4a8e09d03632a6627b59464ff35 + +pkgname = uboot-rockpro64 + diff --git a/0001-board-rockchip-rk3399-add-Rockpro64-board-support.patch b/0001-board-rockchip-rk3399-add-Rockpro64-board-support.patch new file mode 100644 index 000000000000..9f2b8fe4e003 --- /dev/null +++ b/0001-board-rockchip-rk3399-add-Rockpro64-board-support.patch @@ -0,0 +1,2391 @@ +From f9e720a057af2caefc93bb0f36add9c15934f5ba Mon Sep 17 00:00:00 2001 +From: Qu Wenruo <wqu@suse.com> +Date: Fri, 19 Apr 2019 18:48:40 +0800 +Subject: [PATCH] board: rockchip: rk3399: add Rockpro64 board support + +Rockpro64 is rk3399 based board from pine64.org. add initial board support +for Rockpro64. +Complete board support will be added later in upcoming patchsets. + +Signed-off-by: Akash Gajjar <akash@openedev.com> +[Solve minor conflicts] +--- + arch/arm/dts/Makefile | 1 + + arch/arm/dts/rk3399-rockpro64.dts | 519 +++++++ + arch/arm/dts/rk3399-sdram-lpddr4-1600.dtsi | 1535 ++++++++++++++++++++ + arch/arm/mach-rockchip/rk3399/Kconfig | 9 + + board/rockchip/rockpro64/Kconfig | 15 + + board/rockchip/rockpro64/MAINTAINERS | 6 + + board/rockchip/rockpro64/Makefile | 7 + + board/rockchip/rockpro64/rockpro64.c | 94 ++ + configs/rockpro64-rk3399_defconfig | 78 + + include/configs/rockpro64.h | 15 + + 10 files changed, 2279 insertions(+) + create mode 100644 arch/arm/dts/rk3399-rockpro64.dts + create mode 100644 arch/arm/dts/rk3399-sdram-lpddr4-1600.dtsi + create mode 100644 board/rockchip/rockpro64/Kconfig + create mode 100644 board/rockchip/rockpro64/MAINTAINERS + create mode 100644 board/rockchip/rockpro64/Makefile + create mode 100644 board/rockchip/rockpro64/rockpro64.c + create mode 100644 configs/rockpro64-rk3399_defconfig + create mode 100644 include/configs/rockpro64.h + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 0aee8dfde009..395037cabf5f 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -91,6 +91,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ + rk3399-puma-ddr1600.dtb \ + rk3399-puma-ddr1866.dtb \ + rk3399-rock960.dtb \ ++ rk3399-rockpro64.dtb \ + rv1108-elgin-r1.dtb \ + rv1108-evb.dtb + dtb-$(CONFIG_ARCH_MESON) += \ +diff --git a/arch/arm/dts/rk3399-rockpro64.dts b/arch/arm/dts/rk3399-rockpro64.dts +new file mode 100644 +index 000000000000..1122d3109194 +--- /dev/null ++++ b/arch/arm/dts/rk3399-rockpro64.dts +@@ -0,0 +1,519 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (c) 2018 Akash Gajjar <akash at openedev.com> ++ */ ++ ++/dts-v1/; ++#include <dt-bindings/pwm/pwm.h> ++#include <dt-bindings/pinctrl/rockchip.h> ++#include "rk3399.dtsi" ++#include "rk3399-sdram-lpddr4-1600.dtsi" ++ ++/ { ++ model = "Pine64 Rockpro64-RK3399 Board"; ++ compatible = "pine64,rockpro64", "rockchip,rk3399"; ++ ++ chosen { ++ stdout-path = &uart2; ++ u-boot,spl-boot-order = &sdhci, &sdmmc; ++ }; ++ ++ clkin_gmac: external-gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "clkin_gmac"; ++ #clock-cells = <0>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host_vbus_drv>; ++ regulator-name = "vcc5v0_host"; ++ regulator-always-on; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 1>; ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <430000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-init-microvolt = <950000>; ++ }; ++ ++ vccadc_ref: vccadc-ref { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v8_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&gmac { ++ assigned-clocks = <&cru SCLK_RMII_SRC>; ++ assigned-clock-parents = <&clkin_gmac>; ++ clock_in_out = "input"; ++ phy-supply = <&vcc_phy>; ++ phy-mode = "rgmii"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ tx_delay = <0x33>; ++ rx_delay = <0x45>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ status = "okay"; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <21 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ vcc10-supply = <&vcc3v3_sys>; ++ vcc11-supply = <&vcc3v3_sys>; ++ vcc12-supply = <&vcc3v3_sys>; ++ vddio-supply = <&vcc1v8_pmu>; ++ ++ regulators { ++ vdd_center: DCDC_REG1 { ++ regulator-name = "vdd_center"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_l: DCDC_REG2 { ++ regulator-name = "vdd_cpu_l"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG4 { ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc1v8_dvp: LDO_REG1 { ++ regulator-name = "vcc1v8_dvp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v0_tp: LDO_REG2 { ++ regulator-name = "vcc3v0_tp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc1v8_pmu: LDO_REG3 { ++ regulator-name = "vcc1v8_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_sd: LDO_REG4 { ++ regulator-name = "vcc_sd"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcca3v0_codec: LDO_REG5 { ++ regulator-name = "vcca3v0_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-name = "vcc_1v5"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcca1v8_codec: LDO_REG7 { ++ regulator-name = "vcca1v8_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG8 { ++ regulator-name = "vcc_3v0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc3v3_s3: SWITCH_REG1 { ++ regulator-name = "vcc3v3_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG2 { ++ regulator-name = "vcc3v3_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++ ++ vdd_cpu_b: regulator@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ fcs,suspend-voltage-selector = <0>; ++ regulator-name = "vdd_cpu_b"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: regulator@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_gpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ i2c-scl-rising-time-ns = <300>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++}; ++ ++&i2c3 { ++ i2c-scl-rising-time-ns = <450>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++}; ++ ++&i2c4 { ++ i2c-scl-rising-time-ns = <600>; ++ i2c-scl-falling-time-ns = <20>; ++ status = "okay"; ++}; ++ ++&i2s0 { ++ rockchip,playback-channels = <8>; ++ rockchip,capture-channels = <8>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&i2s1 { ++ rockchip,playback-channels = <2>; ++ rockchip,capture-channels = <2>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&i2s2 { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ bt656-supply = <&vcc1v8_dvp>; ++ audio-supply = <&vcca1v8_codec>; ++ sdmmc-supply = <&vcc_sd>; ++ gpio1830-supply = <&vcc_3v0>; ++}; ++ ++&pmu_io_domains { ++ pmu1830-supply = <&vcc_3v0>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ buttons { ++ pwrbtn: pwrbtn { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ pmic { ++ vsel1_gpio: vsel1-gpio { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_gpio: vsel2-gpio { ++ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb2 { ++ host_vbus_drv: host-vbus-drv { ++ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vccadc_ref>; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ u-boot,dm-pre-reloc; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ keep-power-in-suspend; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ non-removable; ++ status = "okay"; ++}; ++ ++&tsadc { ++ /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-mode = <1>; ++ /* tshut polarity 0:LOW 1:HIGH */ ++ rockchip,hw-tshut-polarity = <1>; ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++ ++ u2phy0_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy0_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++ ++ u2phy1_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy1_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; +diff --git a/arch/arm/dts/rk3399-sdram-lpddr4-1600.dtsi b/arch/arm/dts/rk3399-sdram-lpddr4-1600.dtsi +new file mode 100644 +index 000000000000..a28306e0c349 +--- /dev/null ++++ b/arch/arm/dts/rk3399-sdram-lpddr4-1600.dtsi +@@ -0,0 +1,1535 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * (C) Copyright 2018 Akash Gajjar <akash at openedev.com> ++ */ ++ ++&dmc { ++ rockchip,sdram-params = < ++ 0x2 ++ 0xa ++ 0x3 ++ 0x2 ++ 0x2 ++ 0x0 ++ 0xf ++ 0xf ++ 1 ++ 0x80191519 ++ 0x14040808 ++ 0x00000002 ++ 0x00006226 ++ 0x0000004c ++ 0x00000000 ++ 0x2 ++ 0xa ++ 0x3 ++ 0x2 ++ 0x2 ++ 0x0 ++ 0xf ++ 0xf ++ 1 ++ 0x80191519 ++ 0x14040808 ++ 0x00000002 ++ 0x00006226 ++ 0x0000004c ++ 0x00000000 ++ 800 ++ 6 ++ 2 ++ 13 ++ 1 ++ 0x00000700 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000050 ++ 0x00027100 ++ 0x00000320 ++ 0x00001f40 ++ 0x00000050 ++ 0x00027100 ++ 0x00000320 ++ 0x00001f40 ++ 0x00000050 ++ 0x00027100 ++ 0x00000320 ++ 0x01001f40 ++ 0x00000000 ++ 0x00000101 ++ 0x00020100 ++ 0x000000a0 ++ 0x00000190 ++ 0x00000000 ++ 0x06180000 ++ 0x00061800 ++ 0x04000618 ++ 0x33080004 ++ 0x280f0622 ++ 0x22330800 ++ 0x00280f06 ++ 0x06223308 ++ 0x0600280f ++ 0x00000a0a ++ 0x0600dac0 ++ 0x0a0a060c ++ 0x0600dac0 ++ 0x0a0a060c ++ 0x0600dac0 ++ 0x0203000c ++ 0x0f0c0f00 ++ 0x040c0f0c ++ 0x14000a0a ++ 0x03030a0a ++ 0x00010003 ++ 0x031b1b1b ++ 0x00111111 ++ 0x00000000 ++ 0x03010000 ++ 0x0c2800a8 ++ 0x0c2800a8 ++ 0x0c2800a8 ++ 0x00000000 ++ 0x00060006 ++ 0x00140006 ++ 0x00140014 ++ 0x000f0f0f ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00b00000 ++ 0x00b000b0 ++ 0x00b000b0 ++ 0x000000b0 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000301 ++ 0x00000001 ++ 0x00000000 ++ 0x00000000 ++ 0x01000000 ++ 0x80104002 ++ 0x00040003 ++ 0x00040005 ++ 0x00030000 ++ 0x00050004 ++ 0x00000004 ++ 0x00040003 ++ 0x00040005 ++ 0x30a00000 ++ 0x00001850 ++ 0x185030a0 ++ 0x30a00000 ++ 0x00001850 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x02020200 ++ 0x00020202 ++ 0x00030200 ++ 0x00040700 ++ 0x00000302 ++ 0x02000407 ++ 0x00000003 ++ 0x00030f04 ++ 0x00070004 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00010000 ++ 0x20040020 ++ 0x00200400 ++ 0x01000400 ++ 0x00000b80 ++ 0x00000000 ++ 0x00000001 ++ 0x00000002 ++ 0x0000000e ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00a00000 ++ 0x00c80050 ++ 0x00c80000 ++ 0x005000a0 ++ 0x000000c8 ++ 0x00a000c8 ++ 0x00c80050 ++ 0x00c80000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00430000 ++ 0x0000001a ++ 0x001a0043 ++ 0x00430000 ++ 0x0000001a ++ 0x00010001 ++ 0x07000001 ++ 0x00000707 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00430000 ++ 0x0000001a ++ 0x001a0043 ++ 0x00430000 ++ 0x0000001a ++ 0x00010001 ++ 0x07000001 ++ 0x00000707 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x01000000 ++ 0x00000000 ++ 0x00000000 ++ 0x18151100 ++ 0x0000000c ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00032003 ++ 0x00480120 ++ 0x00000000 ++ 0x01200320 ++ 0x00000048 ++ 0x00032000 ++ 0x00480120 ++ 0x00000000 ++ 0x00280000 ++ 0x00280028 ++ 0x01010100 ++ 0x01000202 ++ 0x0a000002 ++ 0x01000f0f ++ 0x00000000 ++ 0x00000000 ++ 0x00010003 ++ 0x00000c03 ++ 0x00000100 ++ 0x00010000 ++ 0x01000000 ++ 0x00010000 ++ 0x00000001 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00010000 ++ 0x03030301 ++ 0x01010808 ++ 0x03030001 ++ 0x0a0a0a03 ++ 0x08080808 ++ 0x08050103 ++ 0x08050103 ++ 0x00050103 ++ 0x00020202 ++ 0x05020500 ++ 0x00020502 ++ 0x00000000 ++ 0x00000000 ++ 0x0d000001 ++ 0x00010028 ++ 0x00010000 ++ 0x00000003 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00010100 ++ 0x01000000 ++ 0x00000001 ++ 0x00000303 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x000556aa ++ 0x000aaaaa ++ 0x000aa955 ++ 0x00055555 ++ 0x000b3133 ++ 0x0004cd33 ++ 0x0004cecc ++ 0x000b32cc ++ 0x00010300 ++ 0x03000100 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00ffff00 ++ 0x1e1e0000 ++ 0x0800001e ++ 0x00001850 ++ 0x00000200 ++ 0x00000200 ++ 0x00000200 ++ 0x00000200 ++ 0x00001850 ++ 0x0000f320 ++ 0x1850050a ++ 0x00000200 ++ 0x00000200 ++ 0x00000200 ++ 0x00000200 ++ 0x00001850 ++ 0x0000f320 ++ 0x1850050a ++ 0x00000200 ++ 0x00000200 ++ 0x00000200 ++ 0x00000200 ++ 0x00001850 ++ 0x0000f320 ++ 0x0202050a ++ 0x03030202 ++ 0x00000018 ++ 0x00000000 ++ 0x00000000 ++ 0x00001403 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00030000 ++ 0x000e0020 ++ 0x000e0020 ++ 0x000e0020 ++ 0x00000000 ++ 0x00000000 ++ 0x01000000 ++ 0x00070007 ++ 0x00050007 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x01000101 ++ 0x01010101 ++ 0x01000101 ++ 0x01000100 ++ 0x00010001 ++ 0x00010002 ++ 0x00020100 ++ 0x00000002 ++ 0x00000700 ++ 0x00000000 ++ 0x000030a0 ++ 0x00001850 ++ 0x000030a0 ++ 0x00001850 ++ 0x000030a0 ++ 0x18501850 ++ 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0x00000270 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00800000 ++ 0x00800080 ++ 0x00800080 ++ 0x00800080 ++ 0x00800080 ++ 0x00800080 ++ 0x00800080 ++ 0x00800080 ++ 0x00800080 ++ 0x00b30080 ++ 0x00000003 ++ 0x00000000 ++ 0x00020000 ++ 0x00000200 ++ 0x00000000 ++ 0x51315152 ++ 0xc0013150 ++ 0x020000c0 ++ 0x00100001 ++ 0x07054208 ++ 0x000f0c18 ++ 0x01000140 ++ 0x00000c20 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00800000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000001 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00400320 ++ 0x00000040 ++ 0x00806420 ++ 0x00917531 ++ 0x00806420 ++ 0x01917531 ++ 0x00020003 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x000556aa ++ 0x000aaaaa ++ 0x000aa955 ++ 0x00055555 ++ 0x000b3133 ++ 0x0004cd33 ++ 0x0004cecc ++ 0x000b32cc ++ 0x0a418820 ++ 0x103f0000 ++ 0x0000003f ++ 0x00038055 ++ 0x03800380 ++ 0x03800380 ++ 0x00000380 ++ 0x42080010 ++ 0x00000003 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 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0x03800380 ++ 0x00000380 ++ 0x42080010 ++ 0x00000003 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000001 ++ 0x00000000 ++ 0x01000005 ++ 0x04000f00 ++ 0x00020040 ++ 0x00020055 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000050 ++ 0x00000000 ++ 0x00010100 ++ 0x00000601 ++ 0x00000000 ++ 0x00006400 ++ 0x01221102 ++ 0x00000000 ++ 0x00051f00 ++ 0x051f051f ++ 0x051f051f ++ 0x00030003 ++ 0x03000300 ++ 0x00000300 ++ 0x01221102 ++ 0x00000000 ++ 0x00000000 ++ 0x03020000 ++ 0x00000001 ++ 0x00000011 ++ 0x00000011 ++ 0x00000400 ++ 0x00000000 ++ 0x00000011 ++ 0x00000011 ++ 0x00004410 ++ 0x00004410 ++ 0x00004410 ++ 0x00004410 ++ 0x00004410 ++ 0x00000011 ++ 0x00004410 ++ 0x00000011 ++ 0x00004410 ++ 0x00000011 ++ 0x00004410 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x04000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000508 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0x00000000 ++ 0xe4000000 ++ 0x00000000 ++ 0x00000000 ++ 0x01010000 ++ 0x00000000 ++ >; ++}; +diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig +index 2408adb42067..594211757b3a 100644 +--- a/arch/arm/mach-rockchip/rk3399/Kconfig ++++ b/arch/arm/mach-rockchip/rk3399/Kconfig +@@ -61,6 +61,14 @@ config TARGET_CHROMEBOOK_BOB + 1280x800 display. It uses its USB ports for both power and external + display. It includes a Chrome OS EC (Cortex-M3) to provide access to + the keyboard and battery functions. ++config TARGET_ROCKPRO64_RK3399 ++ bool "RK3399 Rockpro64" ++ help ++ The Rockpro64 is a RK3399 based board from pine64.org. ++ Rockpro64 has a LPDDR4 (2GB and 4GB variant), PCIex4, HDMI, MIPI-DSI, ++ MIPI-CSI, eDP, CSI parallel, SPI, I2C, I2S, UART, USB2.0, USB3.0, USB ++ Type C, es8316 codec, SPDIF out, SD, eMMC and WiFI module support on ++ board. + + endchoice + +@@ -71,6 +79,7 @@ config SYS_MALLOC_F_LEN + default 0x0800 + + source "board/rockchip/evb_rk3399/Kconfig" ++source "board/rockchip/rockpro64/Kconfig" + source "board/theobroma-systems/puma_rk3399/Kconfig" + source "board/vamrs/rock960_rk3399/Kconfig" + source "board/google/gru/Kconfig" +diff --git a/board/rockchip/rockpro64/Kconfig b/board/rockchip/rockpro64/Kconfig +new file mode 100644 +index 000000000000..9cc2a8c38284 +--- /dev/null ++++ b/board/rockchip/rockpro64/Kconfig +@@ -0,0 +1,15 @@ ++if TARGET_ROCKPRO64_RK3399 ++ ++config SYS_BOARD ++ default "rockpro64" ++ ++config SYS_VENDOR ++ default "rockchip" ++ ++config SYS_CONFIG_NAME ++ default "rockpro64" ++ ++config BOARD_SPECIFIC_OPTIONS # dummy ++ def_bool y ++ ++endif +diff --git a/board/rockchip/rockpro64/MAINTAINERS b/board/rockchip/rockpro64/MAINTAINERS +new file mode 100644 +index 000000000000..8910617613bc +--- /dev/null ++++ b/board/rockchip/rockpro64/MAINTAINERS +@@ -0,0 +1,6 @@ ++ROCKPRO64-RK3399 ++M: Akash Gajjar <akash at openedev.com> ++S: Maintained ++F: board/rockchip/rockpro64 ++F: include/configs/rockpro64.h ++F: configs/rockpro64-rk3399_defconfig +diff --git a/board/rockchip/rockpro64/Makefile b/board/rockchip/rockpro64/Makefile +new file mode 100644 +index 000000000000..55d912b26c6d +--- /dev/null ++++ b/board/rockchip/rockpro64/Makefile +@@ -0,0 +1,7 @@ ++# ++# (C) Copyright 2018 Akash Gajjar <akash at openedev.com> ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++ ++obj-y += rockpro64.o +diff --git a/board/rockchip/rockpro64/rockpro64.c b/board/rockchip/rockpro64/rockpro64.c +new file mode 100644 +index 000000000000..b41a006d5f21 +--- /dev/null ++++ b/board/rockchip/rockpro64/rockpro64.c +@@ -0,0 +1,94 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * (C) Copyright 2018 Akash Gajjar <akash at openedev.com> ++ */ ++ ++#include <common.h> ++#include <dm.h> ++#include <dm/pinctrl.h> ++#include <dm/uclass-internal.h> ++#include <asm/arch/periph.h> ++#include <power/regulator.h> ++#include <spl.h> ++ ++int board_init(void) ++{ ++ struct udevice *pinctrl, *regulator; ++ int ret; ++ ++ /* ++ * The PWM do not have decicated interrupt number in dts and can ++ * not get periph_id by pinctrl framework, so let's init them here. ++ * The PWM2 and PWM3 are for pwm regulater. ++ */ ++ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); ++ if (ret) { ++ debug("%s: Cannot find pinctrl device\n", __func__); ++ goto out; ++ } ++ ++ /* Enable pwm0 for panel backlight */ ++ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0); ++ if (ret) { ++ debug("%s PWM0 pinctrl init fail! (ret=%d)\n", __func__, ret); ++ goto out; ++ } ++ ++ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2); ++ if (ret) { ++ debug("%s PWM2 pinctrl init fail!\n", __func__); ++ goto out; ++ } ++ ++ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM3); ++ if (ret) { ++ debug("%s PWM3 pinctrl init fail!\n", __func__); ++ goto out; ++ } ++ ++ ret = regulators_enable_boot_on(false); ++ if (ret) ++ debug("%s: Cannot enable boot on regulator\n", __func__); ++ ++ ret = regulator_get_by_platname("vcc5v0_host", ®ulator); ++ if (ret) { ++ debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); ++ goto out; ++ } ++ ++ ret = regulator_set_enable(regulator, true); ++ if (ret) { ++ debug("%s vcc5v0-host-en set fail!\n", __func__); ++ goto out; ++ } ++ ++out: ++ return 0; ++} ++ ++void spl_board_init(void) ++{ ++ struct udevice *pinctrl; ++ int ret; ++ ++ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); ++ if (ret) { ++ debug("%s: Cannot find pinctrl device\n", __func__); ++ goto err; ++ } ++ ++ /* Enable debug UART */ ++ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG); ++ if (ret) { ++ debug("%s: Failed to set up console UART\n", __func__); ++ goto err; ++ } ++ ++ preloader_console_init(); ++ return; ++err: ++ printf("%s: Error %d\n", __func__, ret); ++ ++ /* No way to report error here */ ++ hang(); ++} +diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig +new file mode 100644 +index 000000000000..88422f2db454 +--- /dev/null ++++ b/configs/rockpro64-rk3399_defconfig +@@ -0,0 +1,78 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SYS_TEXT_BASE=0x00200000 ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_ROCKCHIP_RK3399=y ++CONFIG_TARGET_ROCKPRO64_RK3399=y ++CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 ++CONFIG_DEBUG_UART_BASE=0xFF1A0000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_SPL_STACK_R_ADDR=0x80000 ++CONFIG_DEBUG_UART=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_FIT=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py" ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" ++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_PINCTRL_ROCKCHIP_RK3399=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++CONFIG_USB_ETHER_ASIX88179=y ++CONFIG_USB_ETHER_MCS7830=y ++CONFIG_USB_ETHER_RTL8152=y ++CONFIG_USB_ETHER_SMSC95XX=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_ERRNO_STR=y +diff --git a/include/configs/rockpro64.h b/include/configs/rockpro64.h +new file mode 100644 +index 000000000000..b0edf797d289 +--- /dev/null ++++ b/include/configs/rockpro64.h +@@ -0,0 +1,15 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * (C) Copyright 2018 Akash Gajjar <akash at openedev.com> ++ */ ++ ++#ifndef __ROCKPRO64_RK3399_H ++#define __ROCKPRO64_RK3399_H ++ ++#include <configs/rk3399_common.h> ++ ++#define CONFIG_SYS_MMC_ENV_DEV 1 ++ ++#define SDRAM_BANK_SIZE (2UL << 30) ++ ++#endif +-- +2.21.0 + diff --git a/PKGBUILD b/PKGBUILD new file mode 100644 index 000000000000..935ed8834809 --- /dev/null +++ b/PKGBUILD @@ -0,0 +1,58 @@ +# U-Boot: Rock64 +# Maintainer: Kevin Mihelich +# Maintainer: Adam <adam900710@gmail.com> + +buildarch=8 + +pkgname=uboot-rockpro64 +pkgver=2019.04 +pkgrel=1 +pkgdesc="U-Boot for RockPro64" +arch=('aarch64') +url='http://www.denx.de/wiki/U-Boot/WebHome' +license=('GPL') +backup=('boot/boot.txt' 'boot/boot.scr') +makedepends=('bc' 'git' 'rockchip-tools') +install=${pkgname}.install +_commit_rkbin=587600675cb8cc77d559e9c506d250ce17d9e2b1 +source=("ftp://ftp.denx.de/pub/u-boot/u-boot-${pkgver}.tar.bz2" + "git+https://github.com/rockchip-linux/rkbin.git#commit=$_commit_rkbin" + 'rk3399trust.ini' + 'boot.txt' + 'mkscr' + '0001-board-rockchip-rk3399-add-Rockpro64-board-support.patch') +sha256sums=('76b7772d156b3ddd7644c8a1736081e55b78828537ff714065d21dbade229bef' + 'SKIP' + 'dd5c56c6957f670e7e52d145aa66238b17a54edd87b787bfda050abb1d22d2db' + 'd7e5c78aac58f0628405de70f92c72c3281bb3d8bb8cfe005644edaa2086ab50' + 'a4fc8b6b92bc364d6542670d294aa618a8501fb8729f415cc0a3eed776ef0c8e' + '2c0ac7700c589d030aa810bff1c9dbea2c71d4a8e09d03632a6627b59464ff35') + +build() { + cd u-boot-${pkgver} + + unset CLFAGS CXXFLAGS CPPFLAGS LDFLAGS + + patch -Np1 -i ../0001-board-rockchip-rk3399-add-Rockpro64-board-support.patch + make rockpro64-rk3399_defconfig + echo 'CONFIG_IDENT_STRING=" Arch Linux ARM"' >> .config + make EXTRAVERSION=-${pkgrel} +} + +package() { + cd u-boot-${pkgver} + + mkdir -p "${pkgdir}/boot" + + tools/mkimage -n rk3399 -T rksd -d ../rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin "${pkgdir}/boot/idbloader.img" + cat ../rkbin/bin/rk33/rk3399_miniloader_v1.19.bin >> "${pkgdir}/boot/idbloader.img" + + loaderimage --pack --uboot u-boot-dtb.bin "${pkgdir}/boot/uboot.img" 0x200000 + + trust_merger ../rk3399trust.ini + + cp trust.img "${pkgdir}/boot" + + tools/mkimage -A arm -O linux -T script -C none -n "U-Boot boot script" -d ../boot.txt "${pkgdir}/boot/boot.scr" + cp ../{boot.txt,mkscr} "${pkgdir}"/boot +} diff --git a/boot.txt b/boot.txt new file mode 100644 index 000000000000..2dcccbba664a --- /dev/null +++ b/boot.txt @@ -0,0 +1,22 @@ +# After modifying, run ./mkscr + +# MAC address (use spaces instead of colons) +setenv macaddr da 19 c8 7a 6d f4 + +part uuid ${devtype} ${devnum}:${bootpart} uuid +setenv bootargs console=ttyS2,1500000 root=PARTUUID=${uuid} rw rootwait +setenv fdtfile rockchip/rk3399-rockpro64.dtb + +if load ${devtype} ${devnum}:${bootpart} ${kernel_addr_r} /boot/Image; then + if load ${devtype} ${devnum}:${bootpart} ${fdt_addr_r} /boot/dtbs/${fdtfile}; then + fdt addr ${fdt_addr_r} + fdt resize + fdt set /ethernet@ff540000 local-mac-address "[${macaddr}]" + if load ${devtype} ${devnum}:${bootpart} ${ramdisk_addr_r} /boot/initramfs-linux.img; then + # This upstream Uboot doesn't support compresses cpio initrd, use kernel option to + # load initramfs + setenv bootargs ${bootargs} initrd=${ramdisk_addr_r},20M ramdisk_size=10M + fi; + booti ${kernel_addr_r} - ${fdt_addr_r}; + fi; +fi diff --git a/mkscr b/mkscr new file mode 100644 index 000000000000..272b6a7a500f --- /dev/null +++ b/mkscr @@ -0,0 +1,9 @@ +#!/bin/bash + +if [[ ! -x /usr/bin/mkimage ]]; then + echo "mkimage not found. Please install uboot-tools:" + echo " pacman -S uboot-tools" + exit 1 +fi + +mkimage -A arm -O linux -T script -C none -n "U-Boot boot script" -d boot.txt boot.scr diff --git a/rk3399trust.ini b/rk3399trust.ini new file mode 100644 index 000000000000..594897091330 --- /dev/null +++ b/rk3399trust.ini @@ -0,0 +1,17 @@ +[VERSION] +MAJOR=1 +MINOR=0 +[BL30_OPTION] +SEC=0 +[BL31_OPTION] +SEC=1 +PATH=../rkbin/bin/rk33/rk3399_bl31_v1.25.elf +ADDR=0x00010000 +[BL32_OPTION] +SEC=1 +PATH=../rkbin/bin/rk33/rk3399_bl32_v1.16.bin +ADDR=0x08400000 +[BL33_OPTION] +SEC=0 +[OUTPUT] +PATH=trust.img diff --git a/uboot-rockpro64.install b/uboot-rockpro64.install new file mode 100644 index 000000000000..859b81917f35 --- /dev/null +++ b/uboot-rockpro64.install @@ -0,0 +1,26 @@ +flash_uboot() { + echo "A new U-Boot version needs to be flashed onto /dev/mmcblk0." + echo "Do you want to do this now? [y|N]" + read -r shouldwe + if [[ $shouldwe =~ ^([yY][eE][sS]|[yY])$ ]]; then + dd if=/boot/idbloader.img of=/dev/mmcblk0 seek=64 conv=notrunc + dd if=/boot/uboot.img of=/dev/mmcblk0 seek=16384 conv=notrunc + dd if=/boot/trust.img of=/dev/mmcblk0 seek=24576 conv=notrunc + else + echo "You can do this later by running:" + echo "# dd if=/boot/idbloader.img of=/dev/mmcblk0 seek=64 conv=notrunc" + echo "# dd if=/boot/uboot.img of=/dev/mmcblk0 seek=16384 conv=notrunc" + echo "# dd if=/boot/trust.img of=/dev/mmcblk0 seek=24576 conv=notrunc" + fi +} + +## arg 1: the new package version +post_install() { + flash_uboot +} + +## arg 1: the new package version +## arg 2: the old package version +post_upgrade() { + flash_uboot +} |