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authorgoekce2023-11-06 15:43:52 +0100
committergoekce2023-11-06 15:43:52 +0100
commit29543f1820c735b754c50cfbf25b3995cc62f0f3 (patch)
tree4bbd08fa01dac4f0663e3c583f661fd87b55d31c
parent8b83bdb508dd01c618ffe60621653973820e3143 (diff)
downloadaur-29543f1820c735b754c50cfbf25b3995cc62f0f3.tar.gz
upstream archive name change
Diffstat
-rw-r--r--.SRCINFO2
-rw-r--r--PKGBUILD2
2 files changed, 2 insertions, 2 deletions
diff --git a/.SRCINFO b/.SRCINFO
index fd377cbc436e..698895437349 100644
--- a/.SRCINFO
+++ b/.SRCINFO
@@ -19,7 +19,7 @@ pkgbase = vivado
optdepends = matlab: Model Composer
optdepends = qt4: Model Composer
options = !strip
- source = file:///Xilinx_Unified_2023.2_1013_2256.tar.gz
+ source = file:///FPGAs_AdaptiveSoCs_Unified_2023.2_1013_2256.tar.gz
source = spoof_homedir.c
md5sums = 64d64e9b937b6fd5e98b41811c74aab2
md5sums = 69d14ad64f6ec44e041eaa8ffcb6f87c
diff --git a/PKGBUILD b/PKGBUILD
index e4d76035e700..cb85194d8efc 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -28,7 +28,7 @@
# wrap the `getpwuid()` function and modify the original return value for uid==0.
pkgname=vivado
-_srcname=Xilinx_Unified
+_srcname=FPGAs_AdaptiveSoCs_Unified
pkgver=2023.2
_more_ver=1013_2256
pkgrel=1