Update to 5.10.6

Update patches to v5 version from Lyude

16 files changed, 3440 insertions, 1960 deletions

diff --git a/.SRCINFO b/.SRCINFO
index 18714b7532c8..57d3b256843c 100644
--- a/.SRCINFO
+++ b/.SRCINFO
@@ -1,14 +1,18 @@
 pkgbase = linux-oled
 	pkgdesc = Linux
-	pkgver = 5.9.12.arch1
+	pkgver = 5.10.6.arch1
 	pkgrel = 1
-	url = https://git.archlinux.org/linux.git/log/?h=v5.9.12-arch1
+	url = https://git.archlinux.org/linux.git/log/?h=v5.10.6-arch1
 	arch = x86_64
 	license = GPL2
 	makedepends = bc
 	makedepends = kmod
 	makedepends = libelf
 	makedepends = pahole
+	makedepends = cpio
+	makedepends = perl
+	makedepends = tar
+	makedepends = xz
 	makedepends = xmlto
 	makedepends = python-sphinx
 	makedepends = python-sphinx_rtd_theme
@@ -16,19 +20,33 @@ pkgbase = linux-oled
 	makedepends = imagemagick
 	makedepends = git
 	options = !strip
-	source = archlinux-linux::git+https://git.archlinux.org/linux.git?signed#tag=v5.9.12-arch1
+	source = archlinux-linux::git+https://git.archlinux.org/linux.git?signed#tag=v5.10.6-arch1
 	source = config
-	source = sphinx-workaround.patch
-	source = 0001-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch
-	source = 0002-WIP-drm-i915-Enable-Intel-s-HDR-backlight-interface-.patch
+	source = 0001-drm-i915-refactor-panel-backlight-control-functions..patch
+	source = 0002-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch
+	source = 0003-drm-i915-Rename-pwm_-backlight-callbacks-to-ext_pwm_.patch
+	source = 0004-drm-i915-Pass-down-brightness-values-to-enable-disab.patch
+	source = 0005-drm-i915-dp-Rename-eDP-VESA-backlight-interface-func.patch
+	source = 0006-drm-i915-dp-Add-register-definitions-for-Intel-HDR-b.patch
+	source = 0007-drm-i915-Keep-track-of-pwm-related-backlight-hooks-s.patch
+	source = 0008-drm-i915-dp-Enable-Intel-s-HDR-backlight-interface-o.patch
+	source = 0009-drm-i915-dp-Allow-forcing-specific-interfaces-throug.patch
+	source = 0010-drm-dp-Revert-drm-dp-Introduce-EDID-based-quirks.patch
 	validpgpkeys = ABAF11C65A2970B130ABE3C479BE3E4300411886
 	validpgpkeys = 647F28654894E3BD457199BE38DBBDC86092693E
 	validpgpkeys = A2FF3A36AAA56654109064AB19802F8B0D70FC30
 	sha256sums = SKIP
-	sha256sums = cf69b81648a07ebedb274ed26bed3c4d2ff75c6665ecaca0a724b148c70c9c7c
-	sha256sums = 8cb21e0b3411327b627a9dd15b8eb773295a0d2782b1a41b2a8839d1b2f5778c
-	sha256sums = c60c3040f90a28177a0b7718ebb85b4598d2087a3f7670be6102b0cf79a23598
-	sha256sums = 12ff4aed41d3ad9a0a72124966ceeb96bb34404761221ad43bee2c810ceafe7d
+	sha256sums = d3e7adf5fcfc632887058ca84ca7b849a824dda5a03de854c8d3480ef0124ad1
+	sha256sums = aed42e89690d92c73d6ece35b3e54b19fd0762e5cfa6e6bd406977f81ff2dd11
+	sha256sums = bb4feb3fc811b12ad749737844c9e8c39e8d84db78a20db896f2cade230d8c9b
+	sha256sums = 2e279912671ea24d3b69328116f42e7f67af592c445012cc095b5093416a8477
+	sha256sums = 128eed03043ff4055ba50b0f242598524a69a2b8a046eae50f7a6fdeabeb6874
+	sha256sums = c6765d1a9a5c38dafc9b351e86cca3e3e59863ac29d8f129524a6062a0dceecb
+	sha256sums = 52f85de724220f4794d137c5a1189d97fca48931a84e9accf732e01695358130
+	sha256sums = ca2b4bbe07efd45f0490bc85e657bd08e927f62455ad9f03068ffb884ac53c81
+	sha256sums = 886896af41e87f4698cb3c0c49537055048e327d9a9b36303b8b8a682d46cf47
+	sha256sums = 80924801f42c726a7884a3a8cbd039ad9ddbc57887c6a6f4303c3f310a312d63
+	sha256sums = 3ca75bd291e6716c106e17f6efd370b41e773f7893f962143b9e84f1b79510b2
 
 pkgname = linux-oled
 	pkgdesc = The Linux kernel and modules with OLED brightness patches
@@ -39,10 +57,8 @@ pkgname = linux-oled
 	optdepends = linux-firmware: firmware images needed for some devices
 	provides = VIRTUALBOX-GUEST-MODULES
 	provides = WIREGUARD-MODULE
-	provides = linux
 	replaces = virtualbox-guest-modules-arch
 	replaces = wireguard-arch
-	replaces = linux
 
 pkgname = linux-oled-headers
 	pkgdesc = Headers and scripts for building modules for the Linux kernel
diff --git a/0001-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch b/0001-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch
deleted file mode 100644
index c9f02f13ccde..000000000000
--- a/0001-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 19a69eeab6e384399f2ba99945dffc613d744ca1 Mon Sep 17 00:00:00 2001
-From: Lyude Paul <lyude@redhat.com>
-Date: Fri, 26 Jun 2020 17:53:48 -0400
-Subject: [PATCH 1/2] drm/i915/dp: Program source OUI on eDP panels
-
-Since we're about to start adding support for Intel's magic HDR
-backlight interface over DPCD, we need to ensure we're properly
-programming this field so that Intel specific sink services are exposed.
-Otherwise, 0x300-0x3ff will just read zeroes.
-
-We also take care not to reprogram the source OUI if it already matches
-what we expect. This is just to be careful so that we don't accidentally
-take the panel out of any backlight control modes we found it in.
-
-Signed-off-by: Lyude Paul <lyude@redhat.com>
----
- drivers/gpu/drm/i915/display/intel_dp.c | 25 +++++++++++++++++++++++++
- 1 file changed, 25 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
-index d6295eb20b63..39667264c27d 100644
---- a/drivers/gpu/drm/i915/display/intel_dp.c
-+++ b/drivers/gpu/drm/i915/display/intel_dp.c
-@@ -4554,6 +4554,25 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)
- 	}
- }
- 
-+static void
-+intel_edp_init_source_oui(struct intel_dp *intel_dp)
-+{
-+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
-+	u8 oui[] = { 0x00, 0xaa, 0x01 };
-+	u8 buf[3] = { 0 };
-+
-+	if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf,
-+			     sizeof(buf)) < 0)
-+		drm_err(&i915->drm, "Failed to read source OUI\n");
-+
-+	if (memcmp(oui, buf, sizeof(oui)) == 0)
-+		return;
-+
-+	if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui,
-+			      sizeof(oui)) < 0)
-+		drm_err(&i915->drm, "Failed to write source OUI\n");
-+}
-+
- static bool
- intel_edp_init_dpcd(struct intel_dp *intel_dp)
- {
-@@ -4631,6 +4650,12 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
- 	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
- 		intel_dp_get_dsc_sink_cap(intel_dp);
- 
-+	/*
-+	 * Program our source OUI so we can make various Intel-specific AUX
-+	 * services available (such as HDR backlight controls)
-+	 */
-+	intel_edp_init_source_oui(intel_dp);
-+
- 	return true;
- }
- 
--- 
-2.28.0
-
diff --git a/0001-drm-i915-refactor-panel-backlight-control-functions..patch b/0001-drm-i915-refactor-panel-backlight-control-functions..patch
new file mode 100644
index 000000000000..98ed8d6bfd08
--- /dev/null
+++ b/0001-drm-i915-refactor-panel-backlight-control-functions..patch
@@ -0,0 +1,363 @@
+From 9bfe1f9a243769aa8b225f948df388d7de36a593 Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Tue, 1 Dec 2020 07:09:45 +1000
+Subject: [PATCH 01/10] drm/i915: refactor panel backlight control functions.
+ (v2)
+
+This moves the functions into static const instead of having
+funcs and data in the same struct.
+
+It leaves the power callback alone, as it is used in a different
+manner.
+
+v2: leave power callback alone (Jani)
+
+Reviewed-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20201130210945.31850-1-airlied@gmail.com
+---
+ .../drm/i915/display/intel_display_types.h    |  20 ++-
+ .../drm/i915/display/intel_dp_aux_backlight.c |  14 +-
+ .../i915/display/intel_dsi_dcs_backlight.c    |  14 +-
+ drivers/gpu/drm/i915/display/intel_panel.c    | 153 +++++++++++-------
+ 4 files changed, 127 insertions(+), 74 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
+index 3d4bf9b6a0a2..0e5d158f1691 100644
+--- a/drivers/gpu/drm/i915/display/intel_display_types.h
++++ b/drivers/gpu/drm/i915/display/intel_display_types.h
+@@ -205,6 +205,17 @@ struct intel_encoder {
+ 	const struct drm_connector *audio_connector;
+ };
+ 
++struct intel_panel_bl_funcs {
++	/* Connector and platform specific backlight functions */
++	int (*setup)(struct intel_connector *connector, enum pipe pipe);
++	u32 (*get)(struct intel_connector *connector);
++	void (*set)(const struct drm_connector_state *conn_state, u32 level);
++	void (*disable)(const struct drm_connector_state *conn_state);
++	void (*enable)(const struct intel_crtc_state *crtc_state,
++		       const struct drm_connector_state *conn_state);
++	u32 (*hz_to_pwm)(struct intel_connector *connector, u32 hz);
++};
++
+ struct intel_panel {
+ 	struct drm_display_mode *fixed_mode;
+ 	struct drm_display_mode *downclock_mode;
+@@ -231,14 +242,7 @@ struct intel_panel {
+ 
+ 		struct backlight_device *device;
+ 
+-		/* Connector and platform specific backlight functions */
+-		int (*setup)(struct intel_connector *connector, enum pipe pipe);
+-		u32 (*get)(struct intel_connector *connector);
+-		void (*set)(const struct drm_connector_state *conn_state, u32 level);
+-		void (*disable)(const struct drm_connector_state *conn_state);
+-		void (*enable)(const struct intel_crtc_state *crtc_state,
+-			       const struct drm_connector_state *conn_state);
+-		u32 (*hz_to_pwm)(struct intel_connector *connector, u32 hz);
++		const struct intel_panel_bl_funcs *funcs;
+ 		void (*power)(struct intel_connector *, bool enable);
+ 	} backlight;
+ };
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+index 036f504ac7db..b2f713e7da6b 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+@@ -351,6 +351,14 @@ intel_dp_aux_display_control_capable(struct intel_connector *connector)
+ 	return false;
+ }
+ 
++static const struct intel_panel_bl_funcs intel_dp_bl_funcs = {
++	.setup = intel_dp_aux_setup_backlight,
++	.enable = intel_dp_aux_enable_backlight,
++	.disable = intel_dp_aux_disable_backlight,
++	.set = intel_dp_aux_set_backlight,
++	.get = intel_dp_aux_get_backlight,
++};
++
+ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
+ {
+ 	struct intel_panel *panel = &intel_connector->panel;
+@@ -380,11 +388,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
+ 		return -ENODEV;
+ 	}
+ 
+-	panel->backlight.setup = intel_dp_aux_setup_backlight;
+-	panel->backlight.enable = intel_dp_aux_enable_backlight;
+-	panel->backlight.disable = intel_dp_aux_disable_backlight;
+-	panel->backlight.set = intel_dp_aux_set_backlight;
+-	panel->backlight.get = intel_dp_aux_get_backlight;
++	panel->backlight.funcs = &intel_dp_bl_funcs;
+ 
+ 	return 0;
+ }
+diff --git a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c b/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c
+index b53c50372918..5c508d51f526 100644
+--- a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c
++++ b/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c
+@@ -156,6 +156,14 @@ static int dcs_setup_backlight(struct intel_connector *connector,
+ 	return 0;
+ }
+ 
++static const struct intel_panel_bl_funcs dcs_bl_funcs = {
++	.setup = dcs_setup_backlight,
++	.enable = dcs_enable_backlight,
++	.disable = dcs_disable_backlight,
++	.set = dcs_set_backlight,
++	.get = dcs_get_backlight,
++};
++
+ int intel_dsi_dcs_init_backlight_funcs(struct intel_connector *intel_connector)
+ {
+ 	struct drm_device *dev = intel_connector->base.dev;
+@@ -169,11 +177,7 @@ int intel_dsi_dcs_init_backlight_funcs(struct intel_connector *intel_connector)
+ 	if (drm_WARN_ON(dev, encoder->type != INTEL_OUTPUT_DSI))
+ 		return -EINVAL;
+ 
+-	panel->backlight.setup = dcs_setup_backlight;
+-	panel->backlight.enable = dcs_enable_backlight;
+-	panel->backlight.disable = dcs_disable_backlight;
+-	panel->backlight.set = dcs_set_backlight;
+-	panel->backlight.get = dcs_get_backlight;
++	panel->backlight.funcs = &dcs_bl_funcs;
+ 
+ 	return 0;
+ }
+diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
+index 9f23bac0d792..36b7693453ae 100644
+--- a/drivers/gpu/drm/i915/display/intel_panel.c
++++ b/drivers/gpu/drm/i915/display/intel_panel.c
+@@ -684,7 +684,7 @@ intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state,
+ 	drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", level);
+ 
+ 	level = intel_panel_compute_brightness(connector, level);
+-	panel->backlight.set(conn_state, level);
++	panel->backlight.funcs->set(conn_state, level);
+ }
+ 
+ /* set backlight brightness to level in range [0..max], assuming hw min is
+@@ -870,7 +870,7 @@ void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_st
+ 	if (panel->backlight.device)
+ 		panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
+ 	panel->backlight.enabled = false;
+-	panel->backlight.disable(old_conn_state);
++	panel->backlight.funcs->disable(old_conn_state);
+ 
+ 	mutex_unlock(&dev_priv->backlight_lock);
+ }
+@@ -1198,7 +1198,7 @@ static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_s
+ 						 panel->backlight.device->props.max_brightness);
+ 	}
+ 
+-	panel->backlight.enable(crtc_state, conn_state);
++	panel->backlight.funcs->enable(crtc_state, conn_state);
+ 	panel->backlight.enabled = true;
+ 	if (panel->backlight.device)
+ 		panel->backlight.device->props.power = FB_BLANK_UNBLANK;
+@@ -1234,7 +1234,7 @@ static u32 intel_panel_get_backlight(struct intel_connector *connector)
+ 	mutex_lock(&dev_priv->backlight_lock);
+ 
+ 	if (panel->backlight.enabled) {
+-		val = panel->backlight.get(connector);
++		val = panel->backlight.funcs->get(connector);
+ 		val = intel_panel_compute_brightness(connector, val);
+ 	}
+ 
+@@ -1567,13 +1567,13 @@ static u32 get_backlight_max_vbt(struct intel_connector *connector)
+ 	u16 pwm_freq_hz = get_vbt_pwm_freq(dev_priv);
+ 	u32 pwm;
+ 
+-	if (!panel->backlight.hz_to_pwm) {
++	if (!panel->backlight.funcs->hz_to_pwm) {
+ 		drm_dbg_kms(&dev_priv->drm,
+ 			    "backlight frequency conversion not supported\n");
+ 		return 0;
+ 	}
+ 
+-	pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
++	pwm = panel->backlight.funcs->hz_to_pwm(connector, pwm_freq_hz);
+ 	if (!pwm) {
+ 		drm_dbg_kms(&dev_priv->drm,
+ 			    "backlight frequency conversion failed\n");
+@@ -1981,12 +1981,12 @@ int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
+ 	}
+ 
+ 	/* ensure intel_panel has been initialized first */
+-	if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.setup))
++	if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.funcs))
+ 		return -ENODEV;
+ 
+ 	/* set level and max in panel struct */
+ 	mutex_lock(&dev_priv->backlight_lock);
+-	ret = panel->backlight.setup(intel_connector, pipe);
++	ret = panel->backlight.funcs->setup(intel_connector, pipe);
+ 	mutex_unlock(&dev_priv->backlight_lock);
+ 
+ 	if (ret) {
+@@ -2016,6 +2016,86 @@ static void intel_panel_destroy_backlight(struct intel_panel *panel)
+ 	panel->backlight.present = false;
+ }
+ 
++static const struct intel_panel_bl_funcs bxt_funcs = {
++	.setup = bxt_setup_backlight,
++	.enable = bxt_enable_backlight,
++	.disable = bxt_disable_backlight,
++	.set = bxt_set_backlight,
++	.get = bxt_get_backlight,
++	.hz_to_pwm = bxt_hz_to_pwm,
++};
++
++static const struct intel_panel_bl_funcs cnp_funcs = {
++	.setup = cnp_setup_backlight,
++	.enable = cnp_enable_backlight,
++	.disable = cnp_disable_backlight,
++	.set = bxt_set_backlight,
++	.get = bxt_get_backlight,
++	.hz_to_pwm = cnp_hz_to_pwm,
++};
++
++static const struct intel_panel_bl_funcs lpt_funcs = {
++	.setup = lpt_setup_backlight,
++	.enable = lpt_enable_backlight,
++	.disable = lpt_disable_backlight,
++	.set = lpt_set_backlight,
++	.get = lpt_get_backlight,
++	.hz_to_pwm = lpt_hz_to_pwm,
++};
++
++static const struct intel_panel_bl_funcs spt_funcs = {
++	.setup = lpt_setup_backlight,
++	.enable = lpt_enable_backlight,
++	.disable = lpt_disable_backlight,
++	.set = lpt_set_backlight,
++	.get = lpt_get_backlight,
++	.hz_to_pwm = spt_hz_to_pwm,
++};
++
++static const struct intel_panel_bl_funcs pch_funcs = {
++	.setup = pch_setup_backlight,
++	.enable = pch_enable_backlight,
++	.disable = pch_disable_backlight,
++	.set = pch_set_backlight,
++	.get = pch_get_backlight,
++	.hz_to_pwm = pch_hz_to_pwm,
++};
++
++static const struct intel_panel_bl_funcs pwm_funcs = {
++	.setup = pwm_setup_backlight,
++	.enable = pwm_enable_backlight,
++	.disable = pwm_disable_backlight,
++	.set = pwm_set_backlight,
++	.get = pwm_get_backlight,
++};
++
++static const struct intel_panel_bl_funcs vlv_funcs = {
++	.setup = vlv_setup_backlight,
++	.enable = vlv_enable_backlight,
++	.disable = vlv_disable_backlight,
++	.set = vlv_set_backlight,
++	.get = vlv_get_backlight,
++	.hz_to_pwm = vlv_hz_to_pwm,
++};
++
++static const struct intel_panel_bl_funcs i965_funcs = {
++	.setup = i965_setup_backlight,
++	.enable = i965_enable_backlight,
++	.disable = i965_disable_backlight,
++	.set = i9xx_set_backlight,
++	.get = i9xx_get_backlight,
++	.hz_to_pwm = i965_hz_to_pwm,
++};
++
++static const struct intel_panel_bl_funcs i9xx_funcs = {
++	.setup = i9xx_setup_backlight,
++	.enable = i9xx_enable_backlight,
++	.disable = i9xx_disable_backlight,
++	.set = i9xx_set_backlight,
++	.get = i9xx_get_backlight,
++	.hz_to_pwm = i9xx_hz_to_pwm,
++};
++
+ /* Set up chip specific backlight functions */
+ static void
+ intel_panel_init_backlight_funcs(struct intel_panel *panel)
+@@ -2033,65 +2113,26 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
+ 		return;
+ 
+ 	if (IS_GEN9_LP(dev_priv)) {
+-		panel->backlight.setup = bxt_setup_backlight;
+-		panel->backlight.enable = bxt_enable_backlight;
+-		panel->backlight.disable = bxt_disable_backlight;
+-		panel->backlight.set = bxt_set_backlight;
+-		panel->backlight.get = bxt_get_backlight;
+-		panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
++		panel->backlight.funcs = &bxt_funcs;
+ 	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) {
+-		panel->backlight.setup = cnp_setup_backlight;
+-		panel->backlight.enable = cnp_enable_backlight;
+-		panel->backlight.disable = cnp_disable_backlight;
+-		panel->backlight.set = bxt_set_backlight;
+-		panel->backlight.get = bxt_get_backlight;
+-		panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
++		panel->backlight.funcs = &cnp_funcs;
+ 	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) {
+-		panel->backlight.setup = lpt_setup_backlight;
+-		panel->backlight.enable = lpt_enable_backlight;
+-		panel->backlight.disable = lpt_disable_backlight;
+-		panel->backlight.set = lpt_set_backlight;
+-		panel->backlight.get = lpt_get_backlight;
+ 		if (HAS_PCH_LPT(dev_priv))
+-			panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
++			panel->backlight.funcs = &lpt_funcs;
+ 		else
+-			panel->backlight.hz_to_pwm = spt_hz_to_pwm;
++			panel->backlight.funcs = &spt_funcs;
+ 	} else if (HAS_PCH_SPLIT(dev_priv)) {
+-		panel->backlight.setup = pch_setup_backlight;
+-		panel->backlight.enable = pch_enable_backlight;
+-		panel->backlight.disable = pch_disable_backlight;
+-		panel->backlight.set = pch_set_backlight;
+-		panel->backlight.get = pch_get_backlight;
+-		panel->backlight.hz_to_pwm = pch_hz_to_pwm;
++		panel->backlight.funcs = &pch_funcs;
+ 	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ 		if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
+-			panel->backlight.setup = pwm_setup_backlight;
+-			panel->backlight.enable = pwm_enable_backlight;
+-			panel->backlight.disable = pwm_disable_backlight;
+-			panel->backlight.set = pwm_set_backlight;
+-			panel->backlight.get = pwm_get_backlight;
++			panel->backlight.funcs = &pwm_funcs;
+ 		} else {
+-			panel->backlight.setup = vlv_setup_backlight;
+-			panel->backlight.enable = vlv_enable_backlight;
+-			panel->backlight.disable = vlv_disable_backlight;
+-			panel->backlight.set = vlv_set_backlight;
+-			panel->backlight.get = vlv_get_backlight;
+-			panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
++			panel->backlight.funcs = &vlv_funcs;
+ 		}
+ 	} else if (IS_GEN(dev_priv, 4)) {
+-		panel->backlight.setup = i965_setup_backlight;
+-		panel->backlight.enable = i965_enable_backlight;
+-		panel->backlight.disable = i965_disable_backlight;
+-		panel->backlight.set = i9xx_set_backlight;
+-		panel->backlight.get = i9xx_get_backlight;
+-		panel->backlight.hz_to_pwm = i965_hz_to_pwm;
++		panel->backlight.funcs = &i965_funcs;
+ 	} else {
+-		panel->backlight.setup = i9xx_setup_backlight;
+-		panel->backlight.enable = i9xx_enable_backlight;
+-		panel->backlight.disable = i9xx_disable_backlight;
+-		panel->backlight.set = i9xx_set_backlight;
+-		panel->backlight.get = i9xx_get_backlight;
+-		panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
++		panel->backlight.funcs = &i9xx_funcs;
+ 	}
+ }
+ 
+-- 
+2.29.2
+
diff --git a/0002-WIP-drm-i915-Enable-Intel-s-HDR-backlight-interface-.patch b/0002-WIP-drm-i915-Enable-Intel-s-HDR-backlight-interface-.patch
deleted file mode 100644
index 897574812eef..000000000000
--- a/0002-WIP-drm-i915-Enable-Intel-s-HDR-backlight-interface-.patch
+++ /dev/null
@@ -1,582 +0,0 @@
-From 773c5f1b32519fca04ad446f1cf02e717fb2a7d9 Mon Sep 17 00:00:00 2001
-From: Lyude Paul <lyude@redhat.com>
-Date: Mon, 29 Jun 2020 15:01:49 -0400
-Subject: [PATCH 2/2] WIP: drm/i915: Enable Intel's HDR backlight interface
- (only SDR for now)
-
-So-recently a bunch of laptops on the market have started using DPCD
-backlight controls instead of the traditional DDI backlight controls.
-Originally we thought we had this handled by adding VESA backlight
-control support to i915, but the story ended up being a lot more
-complicated then that.
-
-Simply put-there's two main backlight interfaces Intel can see in the
-wild. Intel's proprietary HDR backlight interface, and the standard VESA
-backlight interface. Note that many panels have been observed to report
-support for both backlight interfaces, but testing has shown far more
-panels work with the Intel HDR backlight interface at the moment.
-Additionally, the VBT appears to be capable of reporting support for the
-VESA backlight interface but not the Intel HDR interface which needs to
-be probed by setting the right magic OUI.
-
-For the time being we've been using EDIDs to maintain a list of quirks
-for panels that safely do support the VESA backlight interface. Adding
-support for Intel's HDR backlight interface in addition however, should
-finally allow us to auto-detect eDP backlight controls properly so long
-as we probe like so:
-
-* If the panel's VBT reports VESA backlight support, assume it really
-  does support it
-* If the panel's VBT reports DDI backlight controls:
-  * First probe for Intel's HDR backlight interface
-  * If that fails, probe for VESA's backlight interface
-  * If that fails, assume no DPCD backlight control
-* If the panel's VBT reports any other backlight type: just assume it
-  doesn't have DPCD backlight controls
-
-Note as well that in order for us to make Intel's HDR backlight
-interface appear, we need to start programming the appropriate source
-OUI on the eDP panel as early as possible in the probing process. Note
-that this technically could be done at any time before setting up
-backlight controls, but this way allows us to avoid re-writing it
-multiple times in case we need to use other source-OUI enabled features
-in the future.
-
-Finally, we also make sure to document the registers for this backlight
-interface since eventually, we want to actually implement the full
-interface instead of keeping it in SDR mode.
-
-Signed-off-by: Lyude Paul <lyude@redhat.com>
----
- .../drm/i915/display/intel_display_types.h    |   9 +-
- drivers/gpu/drm/i915/display/intel_dp.c       |  14 +
- .../drm/i915/display/intel_dp_aux_backlight.c | 332 +++++++++++++++---
- drivers/gpu/drm/i915/i915_params.c            |   2 +-
- 4 files changed, 307 insertions(+), 50 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
-index e8f809161c75..a2f54d308187 100644
---- a/drivers/gpu/drm/i915/display/intel_display_types.h
-+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
-@@ -225,7 +225,14 @@ struct intel_panel {
- 		struct pwm_device *pwm;
- 
- 		/* DPCD backlight */
--		u8 pwmgen_bit_count;
-+		union {
-+			struct {
-+				u8 pwmgen_bit_count;
-+			} vesa;
-+			struct {
-+
-+			} intel;
-+		} edp;
- 
- 		struct backlight_device *device;
- 
-diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
-index 39667264c27d..47f04cbbeb0f 100644
---- a/drivers/gpu/drm/i915/display/intel_dp.c
-+++ b/drivers/gpu/drm/i915/display/intel_dp.c
-@@ -3396,7 +3396,9 @@ void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
- void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
- {
- 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
-+	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
- 	int ret, i;
-+	u8 edp_oui[] = { 0x00, 0xaa, 0x01 };
- 
- 	/* Should have a valid DPCD by this point */
- 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)
-@@ -3411,6 +3413,16 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
- 	} else {
- 		struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);
- 
-+		/* Write the source OUI as early as possible */
-+		if (intel_dp_is_edp(intel_dp)) {
-+			ret = drm_dp_dpcd_write(&intel_dp->aux,
-+						DP_SOURCE_OUI, edp_oui,
-+						sizeof(edp_oui));
-+			if (ret < 0)
-+				drm_err(&i915->drm,
-+					"Failed to write eDP source OUI\n");
-+		}
-+
- 		/*
- 		 * When turning on, we need to retry for 1ms to give the sink
- 		 * time to wake up.
-@@ -4554,6 +4566,8 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)
- 	}
- }
- 
-+
-+
- static void
- intel_edp_init_source_oui(struct intel_dp *intel_dp)
- {
-diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
-index acbd7eb66cbe..1b114ee930d9 100644
---- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
-+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
-@@ -22,10 +22,196 @@
-  *
-  */
- 
-+/* XXX: maybe make this kernel docs */
-+/*
-+ * Laptops with Intel GPUs which have panels that support controlling the
-+ * backlight through DP AUX can actually use two different interfaces: Intel's
-+ * proprietary DP AUX backlight interface, and the standard VESA backlight
-+ * interface. Unfortunately, at the time of writing this a lot of laptops will
-+ * advertise support for the standard VESA backlight interface when they
-+ * don't properly support it. However, on these systems the Intel backlight
-+ * interface generally does work properly. Additionally, these systems will
-+ * usually just indicate that they use PWM backlight controls in their VBIOS
-+ * for some reason.
-+ */
-+
- #include "intel_display_types.h"
- #include "intel_dp_aux_backlight.h"
- 
--static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable)
-+/*
-+ * DP AUX registers for Intel's proprietary HDR backlight interface. We define
-+ * them here since we'll likely be the only driver to ever use these.
-+ */
-+#define INTEL_EDP_HDR_TCON_CAP0                                        0x340
-+
-+#define INTEL_EDP_HDR_TCON_CAP1                                        0x341
-+# define INTEL_EDP_HDR_TCON_2084_DECODE_CAP                           BIT(0)
-+# define INTEL_EDP_HDR_TCON_2020_GAMUT_CAP                            BIT(1)
-+# define INTEL_EDP_HDR_TCON_TONE_MAPPING_CAP                          BIT(2)
-+# define INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_CAP                   BIT(3)
-+# define INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP                       BIT(4)
-+# define INTEL_EDP_HDR_TCON_OPTIMIZATION_CAP                          BIT(5)
-+# define INTEL_EDP_HDR_TCON_SDP_COLORIMETRY_CAP                       BIT(6)
-+# define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_CONVERSION_CAP        BIT(7)
-+
-+#define INTEL_EDP_HDR_TCON_CAP2                                        0x342
-+# define INTEL_EDP_SDR_TCON_BRIGHTNESS_AUX_CAP                        BIT(0)
-+
-+#define INTEL_EDP_HDR_TCON_CAP3                                        0x343
-+
-+#define INTEL_EDP_HDR_GETSET_CTRL_PARAMS                               0x344
-+# define INTEL_EDP_HDR_TCON_2084_DECODE_ENABLE                        BIT(0)
-+# define INTEL_EDP_HDR_TCON_2020_GAMUT_ENABLE                         BIT(1)
-+# define INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE                       BIT(2) /* Pre-TGL+ */
-+# define INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_ENABLE                BIT(3)
-+# define INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE                     BIT(4)
-+# define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_ENABLE                BIT(5)
-+/* Bit 6 is reserved */
-+# define INTEL_EDP_HDR_TCON_SDP_COLORIMETRY_ENABLE                    BIT(7)
-+
-+#define INTEL_EDP_HDR_CONTENT_LUMINANCE                                0x346 /* Pre-TGL+ */
-+#define INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE                         0x34A
-+#define INTEL_EDP_SDR_LUMINANCE_LEVEL                                  0x352
-+#define INTEL_EDP_BRIGHTNESS_NITS_LSB                                  0x354
-+#define INTEL_EDP_BRIGHTNESS_NITS_MSB                                  0x355
-+#define INTEL_EDP_BRIGHTNESS_DELAY_FRAMES                              0x356
-+#define INTEL_EDP_BRIGHTNESS_PER_FRAME_STEPS                           0x357
-+
-+#define INTEL_EDP_BRIGHTNESS_OPTIMIZATION_0                            0x358
-+# define INTEL_EDP_TCON_USAGE_MASK                             GENMASK(0, 3)
-+# define INTEL_EDP_TCON_USAGE_UNKNOWN                                    0x0
-+# define INTEL_EDP_TCON_USAGE_DESKTOP                                    0x1
-+# define INTEL_EDP_TCON_USAGE_FULL_SCREEN_MEDIA                          0x2
-+# define INTEL_EDP_TCON_USAGE_FULL_SCREEN_GAMING                         0x3
-+# define INTEL_EDP_TCON_POWER_MASK                                    BIT(4)
-+# define INTEL_EDP_TCON_POWER_DC                                    (0 << 4)
-+# define INTEL_EDP_TCON_POWER_AC                                    (1 << 4)
-+# define INTEL_EDP_TCON_OPTIMIZATION_STRENGTH_MASK             GENMASK(5, 7)
-+
-+#define INTEL_EDP_BRIGHTNESS_OPTIMIZATION_1                            0x359
-+
-+/* Intel EDP backlight callbacks */
-+static bool
-+intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector)
-+{
-+	struct drm_device *dev = connector->base.dev;
-+	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
-+	struct drm_dp_aux *aux = &intel_dp->aux;
-+	int ret;
-+	u8 tcon_cap[4];
-+
-+	ret = drm_dp_dpcd_read(aux, INTEL_EDP_HDR_TCON_CAP0,
-+			       tcon_cap, sizeof(tcon_cap));
-+	if (ret < 0)
-+		return false;
-+
-+	if (!(tcon_cap[1] & INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP))
-+		return false;
-+
-+	/* TODO: Add support for AUX backlight controls in HDR mode */
-+	if (!(tcon_cap[2] & INTEL_EDP_SDR_TCON_BRIGHTNESS_AUX_CAP)) {
-+		DRM_DEV_DEBUG_KMS(dev->dev,
-+				  "Panel only supports AUX backlight controls for HDR mode, this isn't implemented yet\n");
-+		return false;
-+	}
-+
-+	return true;
-+}
-+
-+static u32
-+intel_dp_aux_hdr_get_backlight(struct intel_connector *connector)
-+{
-+	struct drm_device *dev = connector->base.dev;
-+	struct intel_panel *panel = &connector->panel;
-+	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
-+	u8 tmp;
-+	u8 buf[2] = { 0 };
-+
-+	if (drm_dp_dpcd_readb(&intel_dp->aux,
-+			      INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &tmp) < 0)
-+		DRM_DEV_DEBUG_KMS(dev->dev,
-+				  "Failed to read current backlight mode from DPCD\n");
-+
-+	/* Assume 100% brightness if backlight controls aren't enabled over
-+	 * AUX yet
-+	 */
-+	if (!(tmp & INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE))
-+		return panel->backlight.max;
-+
-+	if (drm_dp_dpcd_read(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB,
-+			     buf, sizeof(buf)) < 0) {
-+		DRM_DEV_DEBUG_KMS(dev->dev,
-+				  "Failed to read brightness from DPCD\n");
-+		return 0;
-+	}
-+
-+	return (buf[1] << 8 | buf[0]);
-+}
-+
-+static void
-+intel_dp_aux_hdr_set_backlight(const struct drm_connector_state *conn_state,
-+				     u32 level)
-+{
-+	struct intel_connector *connector = to_intel_connector(conn_state->connector);
-+	struct drm_device *dev = connector->base.dev;
-+	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
-+	uint8_t buf[4] = { 0 };
-+
-+	buf[0] = level & 0xFF;
-+	buf[1] = (level & 0xFF00) >> 8;
-+
-+	if (drm_dp_dpcd_write(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB,
-+			      buf, 4) < 0)
-+		DRM_DEV_DEBUG_KMS(dev->dev,
-+				  "Failed to write brightness level to DPCD\n");
-+}
-+
-+static void
-+intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state,
-+				  const struct drm_connector_state *conn_state)
-+{
-+	struct intel_connector *connector = to_intel_connector(conn_state->connector);
-+	struct intel_panel *panel = &connector->panel;
-+	struct drm_device *dev = connector->base.dev;
-+	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
-+
-+	/* FIXME: figure out if we really need to clear the register
-+	 * beforehand, ideally we want to avoid turning the backlight off when
-+	 * it's not needed
-+	 */
-+	if (drm_dp_dpcd_writeb(&intel_dp->aux,
-+			       INTEL_EDP_HDR_GETSET_CTRL_PARAMS,
-+			       INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE) < 0)
-+		drm_err(dev, "Failed to enable AUX brightness control\n");
-+
-+	intel_dp_aux_hdr_set_backlight(conn_state, panel->backlight.level);
-+	/* FIXME: do we need to write the brightness level before or after we
-+	 * enable the relevant brightness modes?
-+	 */
-+}
-+
-+static void
-+intel_dp_aux_hdr_disable_backlight(const struct drm_connector_state *old_conn_state)
-+{
-+	/* no-op */
-+}
-+
-+static int
-+intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector,
-+				 enum pipe pipe)
-+{
-+	struct intel_panel *panel = &connector->panel;
-+
-+	panel->backlight.max = 512;
-+	panel->backlight.min = 0;
-+	panel->backlight.level = intel_dp_aux_hdr_get_backlight(connector);
-+	panel->backlight.enabled = panel->backlight.level != 0;
-+
-+	return 0;
-+}
-+
-+/* VESA backlight callbacks */
-+static void set_vesa_backlight_enable(struct intel_dp *intel_dp, bool enable)
- {
- 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
- 	u8 reg_val = 0;
-@@ -56,7 +242,7 @@ static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable)
-  * Read the current backlight value from DPCD register(s) based
-  * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported
-  */
--static u32 intel_dp_aux_get_backlight(struct intel_connector *connector)
-+static u32 intel_dp_aux_vesa_get_backlight(struct intel_connector *connector)
- {
- 	struct intel_dp *intel_dp = intel_attached_dp(connector);
- 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
-@@ -99,7 +285,7 @@ static u32 intel_dp_aux_get_backlight(struct intel_connector *connector)
-  * 8-bit or 16 bit value (MSB and LSB)
-  */
- static void
--intel_dp_aux_set_backlight(const struct drm_connector_state *conn_state, u32 level)
-+intel_dp_aux_vesa_set_backlight(const struct drm_connector_state *conn_state, u32 level)
- {
- 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
- 	struct intel_dp *intel_dp = intel_attached_dp(connector);
-@@ -129,11 +315,11 @@ intel_dp_aux_set_backlight(const struct drm_connector_state *conn_state, u32 lev
-  * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the
-  *             EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h)
-  */
--static bool intel_dp_aux_set_pwm_freq(struct intel_connector *connector)
-+static bool intel_dp_aux_vesa_set_pwm_freq(struct intel_connector *connector)
- {
- 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- 	struct intel_dp *intel_dp = intel_attached_dp(connector);
--	const u8 pn = connector->panel.backlight.pwmgen_bit_count;
-+	const u8 pn = connector->panel.backlight.edp.vesa.pwmgen_bit_count;
- 	int freq, fxp, f, fxp_actual, fxp_min, fxp_max;
- 
- 	freq = dev_priv->vbt.backlight.pwm_freq_hz;
-@@ -165,14 +351,15 @@ static bool intel_dp_aux_set_pwm_freq(struct intel_connector *connector)
- 	return true;
- }
- 
--static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_state,
--					  const struct drm_connector_state *conn_state)
-+static void intel_dp_aux_vesa_enable_backlight(const struct intel_crtc_state *crtc_state,
-+					       const struct drm_connector_state *conn_state)
- {
- 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
- 	struct intel_dp *intel_dp = intel_attached_dp(connector);
- 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
- 	struct intel_panel *panel = &connector->panel;
- 	u8 dpcd_buf, new_dpcd_buf, edp_backlight_mode;
-+	u8 pwmgen_bit_count = panel->backlight.edp.vesa.pwmgen_bit_count;
- 
- 	if (drm_dp_dpcd_readb(&intel_dp->aux,
- 			DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) != 1) {
-@@ -193,7 +380,7 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st
- 
- 		if (drm_dp_dpcd_writeb(&intel_dp->aux,
- 				       DP_EDP_PWMGEN_BIT_COUNT,
--				       panel->backlight.pwmgen_bit_count) < 0)
-+				       pwmgen_bit_count) < 0)
- 			drm_dbg_kms(&i915->drm,
- 				    "Failed to write aux pwmgen bit count\n");
- 
-@@ -206,7 +393,7 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st
- 	}
- 
- 	if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP)
--		if (intel_dp_aux_set_pwm_freq(connector))
-+		if (intel_dp_aux_vesa_set_pwm_freq(connector))
- 			new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE;
- 
- 	if (new_dpcd_buf != dpcd_buf) {
-@@ -217,18 +404,18 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st
- 		}
- 	}
- 
--	intel_dp_aux_set_backlight(conn_state,
--				   connector->panel.backlight.level);
--	set_aux_backlight_enable(intel_dp, true);
-+	intel_dp_aux_vesa_set_backlight(conn_state,
-+					connector->panel.backlight.level);
-+	set_vesa_backlight_enable(intel_dp, true);
- }
- 
--static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state)
-+static void intel_dp_aux_vesa_disable_backlight(const struct drm_connector_state *old_conn_state)
- {
--	set_aux_backlight_enable(enc_to_intel_dp(to_intel_encoder(old_conn_state->best_encoder)),
--				 false);
-+	set_vesa_backlight_enable(enc_to_intel_dp(to_intel_encoder(old_conn_state->best_encoder)),
-+				  false);
- }
- 
--static u32 intel_dp_aux_calc_max_backlight(struct intel_connector *connector)
-+static u32 intel_dp_aux_vesa_calc_max_backlight(struct intel_connector *connector)
- {
- 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
- 	struct intel_dp *intel_dp = intel_attached_dp(connector);
-@@ -301,31 +488,31 @@ static u32 intel_dp_aux_calc_max_backlight(struct intel_connector *connector)
- 			    "Failed to write aux pwmgen bit count\n");
- 		return max_backlight;
- 	}
--	panel->backlight.pwmgen_bit_count = pn;
-+	panel->backlight.edp.vesa.pwmgen_bit_count = pn;
- 
- 	max_backlight = (1 << pn) - 1;
- 
- 	return max_backlight;
- }
- 
--static int intel_dp_aux_setup_backlight(struct intel_connector *connector,
--					enum pipe pipe)
-+static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector,
-+					     enum pipe pipe)
- {
- 	struct intel_panel *panel = &connector->panel;
- 
--	panel->backlight.max = intel_dp_aux_calc_max_backlight(connector);
-+	panel->backlight.max = intel_dp_aux_vesa_calc_max_backlight(connector);
- 	if (!panel->backlight.max)
- 		return -ENODEV;
- 
- 	panel->backlight.min = 0;
--	panel->backlight.level = intel_dp_aux_get_backlight(connector);
-+	panel->backlight.level = intel_dp_aux_vesa_get_backlight(connector);
- 	panel->backlight.enabled = panel->backlight.level != 0;
- 
- 	return 0;
- }
- 
- static bool
--intel_dp_aux_display_control_capable(struct intel_connector *connector)
-+intel_dp_aux_supports_vesa_backlight(struct intel_connector *connector)
- {
- 	struct intel_dp *intel_dp = intel_attached_dp(connector);
- 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
-@@ -342,40 +529,89 @@ intel_dp_aux_display_control_capable(struct intel_connector *connector)
- 	return false;
- }
- 
--int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
-+enum intel_dp_aux_backlight_modparam {
-+	INTEL_DP_AUX_BACKLIGHT_AUTO = -1,
-+	INTEL_DP_AUX_BACKLIGHT_OFF = 0,
-+	INTEL_DP_AUX_BACKLIGHT_ON = 1,
-+	INTEL_DP_AUX_BACKLIGHT_FORCE_VESA = 2,
-+	INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL = 3,
-+};
-+
-+int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
- {
--	struct intel_panel *panel = &intel_connector->panel;
--	struct intel_dp *intel_dp = enc_to_intel_dp(intel_connector->encoder);
-+	struct drm_device *dev = connector->base.dev;
-+	struct intel_panel *panel = &connector->panel;
-+	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
- 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
-+	bool try_intel_interface = false, try_vesa_interface = false;
- 
--	if (i915->params.enable_dpcd_backlight == 0 ||
--	    !intel_dp_aux_display_control_capable(intel_connector))
-+	/* Check the VBT and user's module parameters to figure out which
-+	 * interfaces to probe
-+	 */
-+	switch (i915_modparams.enable_dpcd_backlight) {
-+	case INTEL_DP_AUX_BACKLIGHT_OFF:
- 		return -ENODEV;
-+	case INTEL_DP_AUX_BACKLIGHT_AUTO:
-+		switch (i915->vbt.backlight.type) {
-+		case INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE:
-+			try_vesa_interface = true;
-+			break;
-+		case INTEL_BACKLIGHT_DISPLAY_DDI:
-+			try_intel_interface = true;
-+			try_vesa_interface = true;
-+			break;
-+		default:
-+			return -ENODEV;
-+		}
-+		break;
-+	case INTEL_DP_AUX_BACKLIGHT_ON:
-+		if (i915->vbt.backlight.type !=
-+		    INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE)
-+			try_intel_interface = true;
-+
-+		try_vesa_interface = true;
-+		break;
-+	case INTEL_DP_AUX_BACKLIGHT_FORCE_VESA:
-+		try_vesa_interface = true;
-+		break;
-+	case INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL:
-+		try_intel_interface = true;
-+		break;
-+	}
- 
- 	/*
--	 * There are a lot of machines that don't advertise the backlight
--	 * control interface to use properly in their VBIOS, :\
-+	 * A lot of eDP panels in the wild will report supporting both the
-+	 * Intel proprietary backlight control interface, and the VESA
-+	 * backlight control interface. Many of these panels are liars though,
-+	 * and will only work with the Intel interface. So, always probe for
-+	 * that first.
- 	 */
--	if (i915->vbt.backlight.type !=
--	    INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE &&
--	    i915->params.enable_dpcd_backlight != 1 &&
--	    !drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,
--			      DP_QUIRK_FORCE_DPCD_BACKLIGHT)) {
--		drm_info(&i915->drm,
--			 "Panel advertises DPCD backlight support, but "
--			 "VBT disagrees. If your backlight controls "
--			 "don't work try booting with "
--			 "i915.enable_dpcd_backlight=1. If your machine "
--			 "needs this, please file a _new_ bug report on "
--			 "drm/i915, see " FDO_BUG_URL " for details.\n");
--		return -ENODEV;
-+	if (try_intel_interface &&
-+	    intel_dp_aux_supports_hdr_backlight(connector)) {
-+		DRM_DEV_DEBUG_DRIVER(dev->dev,
-+				     "Using Intel proprietary eDP backlight controls\n");
-+
-+		panel->backlight.setup = intel_dp_aux_hdr_setup_backlight;
-+		panel->backlight.enable = intel_dp_aux_hdr_enable_backlight;
-+		panel->backlight.disable = intel_dp_aux_hdr_disable_backlight;
-+		panel->backlight.set = intel_dp_aux_hdr_set_backlight;
-+		panel->backlight.get = intel_dp_aux_hdr_get_backlight;
-+
-+		return 0;
- 	}
- 
--	panel->backlight.setup = intel_dp_aux_setup_backlight;
--	panel->backlight.enable = intel_dp_aux_enable_backlight;
--	panel->backlight.disable = intel_dp_aux_disable_backlight;
--	panel->backlight.set = intel_dp_aux_set_backlight;
--	panel->backlight.get = intel_dp_aux_get_backlight;
-+	if (try_vesa_interface &&
-+	    intel_dp_aux_supports_vesa_backlight(connector)) {
-+		DRM_DEV_DEBUG_DRIVER(dev->dev,
-+				     "Using VESA eDP backlight controls\n");
-+		panel->backlight.setup = intel_dp_aux_vesa_setup_backlight;
-+		panel->backlight.enable = intel_dp_aux_vesa_enable_backlight;
-+		panel->backlight.disable = intel_dp_aux_vesa_disable_backlight;
-+		panel->backlight.set = intel_dp_aux_vesa_set_backlight;
-+		panel->backlight.get = intel_dp_aux_vesa_get_backlight;
- 
--	return 0;
-+		return 0;
-+	}
-+
-+	return -ENODEV;
- }
-diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
-index 8d8db9ff0a48..4420c86bc228 100644
---- a/drivers/gpu/drm/i915/i915_params.c
-+++ b/drivers/gpu/drm/i915/i915_params.c
-@@ -180,7 +180,7 @@ i915_param_named_unsafe(inject_probe_failure, uint, 0400,
- 
- i915_param_named(enable_dpcd_backlight, int, 0400,
- 	"Enable support for DPCD backlight control"
--	"(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enabled)");
-+	"(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
- 
- #if IS_ENABLED(CONFIG_DRM_I915_GVT)
- i915_param_named(enable_gvt, bool, 0400,
--- 
-2.28.0
-
diff --git a/0002-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch b/0002-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch
new file mode 100644
index 000000000000..20773a6f5c66
--- /dev/null
+++ b/0002-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch
@@ -0,0 +1,92 @@
+From fcd270dd73e76dc2d6cea20f3ab596cf692d9153 Mon Sep 17 00:00:00 2001
+From: Lyude Paul <lyude@redhat.com>
+Date: Fri, 4 Dec 2020 17:35:55 -0500
+Subject: [PATCH 02/10] drm/i915/dp: Program source OUI on eDP panels
+
+Since we're about to start adding support for Intel's magic HDR
+backlight interface over DPCD, we need to ensure we're properly
+programming this field so that Intel specific sink services are exposed.
+Otherwise, 0x300-0x3ff will just read zeroes.
+
+We also take care not to reprogram the source OUI if it already matches
+what we expect. This is just to be careful so that we don't accidentally
+take the panel out of any backlight control modes we found it in.
+
+v2:
+* Add careful parameter to intel_edp_init_source_oui() to avoid
+  re-writing the source OUI if it's already been set during driver
+  initialization
+
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Cc: thaytan@noraisin.net
+Cc: Vasily Khoruzhick <anarsoul@gmail.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20201204223603.249878-2-lyude@redhat.com
+---
+ drivers/gpu/drm/i915/display/intel_dp.c | 35 +++++++++++++++++++++++++
+ 1 file changed, 35 insertions(+)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
+index 9bc59fd2f95f..64ad6f8d1664 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp.c
++++ b/drivers/gpu/drm/i915/display/intel_dp.c
+@@ -3492,6 +3492,29 @@ void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
+ 			    enable ? "enable" : "disable");
+ }
+ 
++static void
++intel_edp_init_source_oui(struct intel_dp *intel_dp, bool careful)
++{
++	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
++	u8 oui[] = { 0x00, 0xaa, 0x01 };
++	u8 buf[3] = { 0 };
++
++	/*
++	 * During driver init, we want to be careful and avoid changing the source OUI if it's
++	 * already set to what we want, so as to avoid clearing any state by accident
++	 */
++	if (careful) {
++		if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf, sizeof(buf)) < 0)
++			drm_err(&i915->drm, "Failed to read source OUI\n");
++
++		if (memcmp(oui, buf, sizeof(oui)) == 0)
++			return;
++	}
++
++	if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)
++		drm_err(&i915->drm, "Failed to write source OUI\n");
++}
++
+ /* If the sink supports it, try to set the power state appropriately */
+ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
+ {
+@@ -3511,6 +3534,12 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
+ 	} else {
+ 		struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);
+ 
++		lspcon_resume(lspcon);
++
++		/* Write the source OUI as early as possible */
++		if (intel_dp_is_edp(intel_dp))
++			intel_edp_init_source_oui(intel_dp, false);
++
+ 		/*
+ 		 * When turning on, we need to retry for 1ms to give the sink
+ 		 * time to wake up.
+@@ -4713,6 +4742,12 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
+ 	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+ 		intel_dp_get_dsc_sink_cap(intel_dp);
+ 
++	/*
++	 * If needed, program our source OUI so we can make various Intel-specific AUX services
++	 * available (such as HDR backlight controls)
++	 */
++	intel_edp_init_source_oui(intel_dp, true);
++
+ 	return true;
+ }
+ 
+-- 
+2.29.2
+
diff --git a/0003-drm-i915-Rename-pwm_-backlight-callbacks-to-ext_pwm_.patch b/0003-drm-i915-Rename-pwm_-backlight-callbacks-to-ext_pwm_.patch
new file mode 100644
index 000000000000..c942fa33d760
--- /dev/null
+++ b/0003-drm-i915-Rename-pwm_-backlight-callbacks-to-ext_pwm_.patch
@@ -0,0 +1,108 @@
+From ae824addb9e71613dc03e3d947daf0dda0a0aaf2 Mon Sep 17 00:00:00 2001
+From: Lyude Paul <lyude@redhat.com>
+Date: Fri, 4 Dec 2020 17:35:56 -0500
+Subject: [PATCH 03/10] drm/i915: Rename pwm_* backlight callbacks to ext_pwm_*
+
+Since we're going to need to add a set of lower-level PWM backlight
+control hooks to be shared by normal backlight controls and HDR
+backlight controls in SDR mode, let's add a prefix to the external PWM
+backlight functions so that the difference between them and the high
+level PWM-only backlight functions is a bit more obvious.
+
+This introduces no functional changes.
+
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Reviewed-by: Jani Nikula <jani.nikula@intel.com>
+Cc: thaytan@noraisin.net
+Cc: Vasily Khoruzhick <anarsoul@gmail.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20201204223603.249878-3-lyude@redhat.com
+---
+ drivers/gpu/drm/i915/display/intel_panel.c | 28 +++++++++++-----------
+ 1 file changed, 14 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
+index 36b7693453ae..da8f7c12ae22 100644
+--- a/drivers/gpu/drm/i915/display/intel_panel.c
++++ b/drivers/gpu/drm/i915/display/intel_panel.c
+@@ -589,7 +589,7 @@ static u32 bxt_get_backlight(struct intel_connector *connector)
+ 			     BXT_BLC_PWM_DUTY(panel->backlight.controller));
+ }
+ 
+-static u32 pwm_get_backlight(struct intel_connector *connector)
++static u32 ext_pwm_get_backlight(struct intel_connector *connector)
+ {
+ 	struct intel_panel *panel = &connector->panel;
+ 	struct pwm_state state;
+@@ -666,7 +666,7 @@ static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32
+ 		       BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
+ }
+ 
+-static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
++static void ext_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
+ 
+@@ -835,7 +835,7 @@ static void cnp_disable_backlight(const struct drm_connector_state *old_conn_sta
+ 		       tmp & ~BXT_BLC_PWM_ENABLE);
+ }
+ 
+-static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
++static void ext_pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
+ {
+ 	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
+ 	struct intel_panel *panel = &connector->panel;
+@@ -1168,8 +1168,8 @@ static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 		       pwm_ctl | BXT_BLC_PWM_ENABLE);
+ }
+ 
+-static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
+-				 const struct drm_connector_state *conn_state)
++static void ext_pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
++				     const struct drm_connector_state *conn_state)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct intel_panel *panel = &connector->panel;
+@@ -1890,8 +1890,8 @@ cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
+ 	return 0;
+ }
+ 
+-static int pwm_setup_backlight(struct intel_connector *connector,
+-			       enum pipe pipe)
++static int ext_pwm_setup_backlight(struct intel_connector *connector,
++				   enum pipe pipe)
+ {
+ 	struct drm_device *dev = connector->base.dev;
+ 	struct drm_i915_private *dev_priv = to_i915(dev);
+@@ -2061,12 +2061,12 @@ static const struct intel_panel_bl_funcs pch_funcs = {
+ 	.hz_to_pwm = pch_hz_to_pwm,
+ };
+ 
+-static const struct intel_panel_bl_funcs pwm_funcs = {
+-	.setup = pwm_setup_backlight,
+-	.enable = pwm_enable_backlight,
+-	.disable = pwm_disable_backlight,
+-	.set = pwm_set_backlight,
+-	.get = pwm_get_backlight,
++static const struct intel_panel_bl_funcs ext_pwm_funcs = {
++	.setup = ext_pwm_setup_backlight,
++	.enable = ext_pwm_enable_backlight,
++	.disable = ext_pwm_disable_backlight,
++	.set = ext_pwm_set_backlight,
++	.get = ext_pwm_get_backlight,
+ };
+ 
+ static const struct intel_panel_bl_funcs vlv_funcs = {
+@@ -2125,7 +2125,7 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
+ 		panel->backlight.funcs = &pch_funcs;
+ 	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ 		if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
+-			panel->backlight.funcs = &pwm_funcs;
++			panel->backlight.funcs = &ext_pwm_funcs;
+ 		} else {
+ 			panel->backlight.funcs = &vlv_funcs;
+ 		}
+-- 
+2.29.2
+
diff --git a/0004-drm-i915-Pass-down-brightness-values-to-enable-disab.patch b/0004-drm-i915-Pass-down-brightness-values-to-enable-disab.patch
new file mode 100644
index 000000000000..c2c7dd9b617b
--- /dev/null
+++ b/0004-drm-i915-Pass-down-brightness-values-to-enable-disab.patch
@@ -0,0 +1,368 @@
+From 2fcd9b2dd0fe45c7233dd8a08f33de5996a8ce9f Mon Sep 17 00:00:00 2001
+From: Lyude Paul <lyude@redhat.com>
+Date: Fri, 4 Dec 2020 17:35:57 -0500
+Subject: [PATCH 04/10] drm/i915: Pass down brightness values to enable/disable
+ backlight callbacks
+
+Instead of using intel_panel->backlight.level, have the caller provide us
+with the current panel backlight value. We'll need this for when we
+separate PWM-related backlight callbacks from other means of backlight
+control (like DPCD backlight controls), as the caller of each PWM callback
+will be responsible for converting the current brightness value to it's
+respective PWM level.
+
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20201204223603.249878-4-lyude@redhat.com
+---
+ .../drm/i915/display/intel_display_types.h    |  4 +-
+ .../drm/i915/display/intel_dp_aux_backlight.c |  8 +--
+ .../i915/display/intel_dsi_dcs_backlight.c    |  7 +-
+ drivers/gpu/drm/i915/display/intel_panel.c    | 67 +++++++++----------
+ 4 files changed, 42 insertions(+), 44 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
+index 0e5d158f1691..6dd8f26ec3c9 100644
+--- a/drivers/gpu/drm/i915/display/intel_display_types.h
++++ b/drivers/gpu/drm/i915/display/intel_display_types.h
+@@ -210,9 +210,9 @@ struct intel_panel_bl_funcs {
+ 	int (*setup)(struct intel_connector *connector, enum pipe pipe);
+ 	u32 (*get)(struct intel_connector *connector);
+ 	void (*set)(const struct drm_connector_state *conn_state, u32 level);
+-	void (*disable)(const struct drm_connector_state *conn_state);
++	void (*disable)(const struct drm_connector_state *conn_state, u32 level);
+ 	void (*enable)(const struct intel_crtc_state *crtc_state,
+-		       const struct drm_connector_state *conn_state);
++		       const struct drm_connector_state *conn_state, u32 level);
+ 	u32 (*hz_to_pwm)(struct intel_connector *connector, u32 hz);
+ };
+ 
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+index b2f713e7da6b..a735e0f600ec 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+@@ -174,7 +174,7 @@ static bool intel_dp_aux_set_pwm_freq(struct intel_connector *connector)
+ }
+ 
+ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_state,
+-					  const struct drm_connector_state *conn_state)
++					  const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct intel_dp *intel_dp = intel_attached_dp(connector);
+@@ -225,12 +225,12 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st
+ 		}
+ 	}
+ 
+-	intel_dp_aux_set_backlight(conn_state,
+-				   connector->panel.backlight.level);
++	intel_dp_aux_set_backlight(conn_state, level);
+ 	set_aux_backlight_enable(intel_dp, true);
+ }
+ 
+-static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state)
++static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state,
++					   u32 level)
+ {
+ 	set_aux_backlight_enable(enc_to_intel_dp(to_intel_encoder(old_conn_state->best_encoder)),
+ 				 false);
+diff --git a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c b/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c
+index 5c508d51f526..88628764956d 100644
+--- a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c
++++ b/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c
+@@ -77,7 +77,7 @@ static void dcs_set_backlight(const struct drm_connector_state *conn_state, u32
+ 	}
+ }
+ 
+-static void dcs_disable_backlight(const struct drm_connector_state *conn_state)
++static void dcs_disable_backlight(const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(to_intel_encoder(conn_state->best_encoder));
+ 	struct mipi_dsi_device *dsi_device;
+@@ -111,10 +111,9 @@ static void dcs_disable_backlight(const struct drm_connector_state *conn_state)
+ }
+ 
+ static void dcs_enable_backlight(const struct intel_crtc_state *crtc_state,
+-				 const struct drm_connector_state *conn_state)
++				 const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(to_intel_encoder(conn_state->best_encoder));
+-	struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
+ 	struct mipi_dsi_device *dsi_device;
+ 	enum port port;
+ 
+@@ -142,7 +141,7 @@ static void dcs_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 				   &cabc, sizeof(cabc));
+ 	}
+ 
+-	dcs_set_backlight(conn_state, panel->backlight.level);
++	dcs_set_backlight(conn_state, level);
+ }
+ 
+ static int dcs_setup_backlight(struct intel_connector *connector,
+diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
+index da8f7c12ae22..67f81ae995c4 100644
+--- a/drivers/gpu/drm/i915/display/intel_panel.c
++++ b/drivers/gpu/drm/i915/display/intel_panel.c
+@@ -726,13 +726,13 @@ void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state
+ 	mutex_unlock(&dev_priv->backlight_lock);
+ }
+ 
+-static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state)
++static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, 0);
++	intel_panel_actually_set_backlight(old_conn_state, level);
+ 
+ 	/*
+ 	 * Although we don't support or enable CPU PWM with LPT/SPT based
+@@ -754,13 +754,13 @@ static void lpt_disable_backlight(const struct drm_connector_state *old_conn_sta
+ 	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
+ }
+ 
+-static void pch_disable_backlight(const struct drm_connector_state *old_conn_state)
++static void pch_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
+ {
+ 	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, 0);
++	intel_panel_actually_set_backlight(old_conn_state, val);
+ 
+ 	tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
+ 	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
+@@ -769,44 +769,44 @@ static void pch_disable_backlight(const struct drm_connector_state *old_conn_sta
+ 	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
+ }
+ 
+-static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state)
++static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
+ {
+-	intel_panel_actually_set_backlight(old_conn_state, 0);
++	intel_panel_actually_set_backlight(old_conn_state, val);
+ }
+ 
+-static void i965_disable_backlight(const struct drm_connector_state *old_conn_state)
++static void i965_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
+ {
+ 	struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
+ 	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, 0);
++	intel_panel_actually_set_backlight(old_conn_state, val);
+ 
+ 	tmp = intel_de_read(dev_priv, BLC_PWM_CTL2);
+ 	intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
+ }
+ 
+-static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state)
++static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
+ {
+ 	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
+ 	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, 0);
++	intel_panel_actually_set_backlight(old_conn_state, val);
+ 
+ 	tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
+ 	intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe),
+ 		       tmp & ~BLM_PWM_ENABLE);
+ }
+ 
+-static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state)
++static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
+ {
+ 	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	struct intel_panel *panel = &connector->panel;
+-	u32 tmp, val;
++	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, 0);
++	intel_panel_actually_set_backlight(old_conn_state, val);
+ 
+ 	tmp = intel_de_read(dev_priv,
+ 			    BXT_BLC_PWM_CTL(panel->backlight.controller));
+@@ -820,14 +820,14 @@ static void bxt_disable_backlight(const struct drm_connector_state *old_conn_sta
+ 	}
+ }
+ 
+-static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state)
++static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
+ {
+ 	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	struct intel_panel *panel = &connector->panel;
+ 	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, 0);
++	intel_panel_actually_set_backlight(old_conn_state, val);
+ 
+ 	tmp = intel_de_read(dev_priv,
+ 			    BXT_BLC_PWM_CTL(panel->backlight.controller));
+@@ -835,7 +835,7 @@ static void cnp_disable_backlight(const struct drm_connector_state *old_conn_sta
+ 		       tmp & ~BXT_BLC_PWM_ENABLE);
+ }
+ 
+-static void ext_pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
++static void ext_pwm_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
+ 	struct intel_panel *panel = &connector->panel;
+@@ -870,13 +870,13 @@ void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_st
+ 	if (panel->backlight.device)
+ 		panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
+ 	panel->backlight.enabled = false;
+-	panel->backlight.funcs->disable(old_conn_state);
++	panel->backlight.funcs->disable(old_conn_state, 0);
+ 
+ 	mutex_unlock(&dev_priv->backlight_lock);
+ }
+ 
+ static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
+-				 const struct drm_connector_state *conn_state)
++				 const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+@@ -923,11 +923,11 @@ static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 		       pch_ctl1 | BLM_PCH_PWM_ENABLE);
+ 
+ 	/* This won't stick until the above enable. */
+-	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
++	intel_panel_actually_set_backlight(conn_state, level);
+ }
+ 
+ static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
+-				 const struct drm_connector_state *conn_state)
++				 const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+@@ -958,7 +958,7 @@ static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
+ 
+ 	/* This won't stick until the above enable. */
+-	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
++	intel_panel_actually_set_backlight(conn_state, level);
+ 
+ 	pch_ctl2 = panel->backlight.max << 16;
+ 	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2);
+@@ -974,7 +974,7 @@ static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
+ }
+ 
+ static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
+-				  const struct drm_connector_state *conn_state)
++				  const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+@@ -1001,7 +1001,7 @@ static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 	intel_de_posting_read(dev_priv, BLC_PWM_CTL);
+ 
+ 	/* XXX: combine this into above write? */
+-	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
++	intel_panel_actually_set_backlight(conn_state, level);
+ 
+ 	/*
+ 	 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
+@@ -1013,7 +1013,7 @@ static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
+ }
+ 
+ static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
+-				  const struct drm_connector_state *conn_state)
++				  const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+@@ -1044,11 +1044,11 @@ static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 	intel_de_posting_read(dev_priv, BLC_PWM_CTL2);
+ 	intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
+ 
+-	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
++	intel_panel_actually_set_backlight(conn_state, level);
+ }
+ 
+ static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
+-				 const struct drm_connector_state *conn_state)
++				 const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+@@ -1067,7 +1067,7 @@ static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 	intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl);
+ 
+ 	/* XXX: combine this into above write? */
+-	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
++	intel_panel_actually_set_backlight(conn_state, level);
+ 
+ 	ctl2 = 0;
+ 	if (panel->backlight.active_low_pwm)
+@@ -1079,7 +1079,7 @@ static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
+ }
+ 
+ static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
+-				 const struct drm_connector_state *conn_state)
++				 const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+@@ -1118,7 +1118,7 @@ static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 		       BXT_BLC_PWM_FREQ(panel->backlight.controller),
+ 		       panel->backlight.max);
+ 
+-	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
++	intel_panel_actually_set_backlight(conn_state, level);
+ 
+ 	pwm_ctl = 0;
+ 	if (panel->backlight.active_low_pwm)
+@@ -1133,7 +1133,7 @@ static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
+ }
+ 
+ static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
+-				 const struct drm_connector_state *conn_state)
++				 const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+@@ -1154,7 +1154,7 @@ static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 		       BXT_BLC_PWM_FREQ(panel->backlight.controller),
+ 		       panel->backlight.max);
+ 
+-	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
++	intel_panel_actually_set_backlight(conn_state, level);
+ 
+ 	pwm_ctl = 0;
+ 	if (panel->backlight.active_low_pwm)
+@@ -1169,11 +1169,10 @@ static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
+ }
+ 
+ static void ext_pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
+-				     const struct drm_connector_state *conn_state)
++				     const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct intel_panel *panel = &connector->panel;
+-	int level = panel->backlight.level;
+ 
+ 	level = intel_panel_compute_brightness(connector, level);
+ 	pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100);
+@@ -1198,7 +1197,7 @@ static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_s
+ 						 panel->backlight.device->props.max_brightness);
+ 	}
+ 
+-	panel->backlight.funcs->enable(crtc_state, conn_state);
++	panel->backlight.funcs->enable(crtc_state, conn_state, panel->backlight.level);
+ 	panel->backlight.enabled = true;
+ 	if (panel->backlight.device)
+ 		panel->backlight.device->props.power = FB_BLANK_UNBLANK;
+-- 
+2.29.2
+
diff --git a/0005-drm-i915-dp-Rename-eDP-VESA-backlight-interface-func.patch b/0005-drm-i915-dp-Rename-eDP-VESA-backlight-interface-func.patch
new file mode 100644
index 000000000000..fb93a8da5c98
--- /dev/null
+++ b/0005-drm-i915-dp-Rename-eDP-VESA-backlight-interface-func.patch
@@ -0,0 +1,203 @@
+From f73f1279fe85b66e103a6b254d3a32dad8103db0 Mon Sep 17 00:00:00 2001
+From: Lyude Paul <lyude@redhat.com>
+Date: Fri, 4 Dec 2020 17:35:59 -0500
+Subject: [PATCH 05/10] drm/i915/dp: Rename eDP VESA backlight interface
+ functions
+
+Since we're about to add support for a second type of backlight control
+interface over DP AUX (specifically, Intel's proprietary HDR backlight
+controls) let's rename all of the current backlight hooks we have for
+vesa to make it clear that they're specific to the VESA interface and
+not Intel's.
+
+v3:
+* Rebase
+
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Cc: thaytan@noraisin.net
+Cc: Vasily Khoruzhick <anarsoul@gmail.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20201204223603.249878-6-lyude@redhat.com
+---
+ .../drm/i915/display/intel_dp_aux_backlight.c | 62 ++++++++++---------
+ 1 file changed, 32 insertions(+), 30 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+index a735e0f600ec..ec47cd69cd69 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+@@ -25,7 +25,7 @@
+ #include "intel_display_types.h"
+ #include "intel_dp_aux_backlight.h"
+ 
+-static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable)
++static void set_vesa_backlight_enable(struct intel_dp *intel_dp, bool enable)
+ {
+ 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ 	u8 reg_val = 0;
+@@ -52,7 +52,7 @@ static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable)
+ 	}
+ }
+ 
+-static bool intel_dp_aux_backlight_dpcd_mode(struct intel_connector *connector)
++static bool intel_dp_aux_vesa_backlight_dpcd_mode(struct intel_connector *connector)
+ {
+ 	struct intel_dp *intel_dp = intel_attached_dp(connector);
+ 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+@@ -75,7 +75,7 @@ static bool intel_dp_aux_backlight_dpcd_mode(struct intel_connector *connector)
+  * Read the current backlight value from DPCD register(s) based
+  * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported
+  */
+-static u32 intel_dp_aux_get_backlight(struct intel_connector *connector)
++static u32 intel_dp_aux_vesa_get_backlight(struct intel_connector *connector)
+ {
+ 	struct intel_dp *intel_dp = intel_attached_dp(connector);
+ 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+@@ -86,7 +86,7 @@ static u32 intel_dp_aux_get_backlight(struct intel_connector *connector)
+ 	 * If we're not in DPCD control mode yet, the programmed brightness
+ 	 * value is meaningless and we should assume max brightness
+ 	 */
+-	if (!intel_dp_aux_backlight_dpcd_mode(connector))
++	if (!intel_dp_aux_vesa_backlight_dpcd_mode(connector))
+ 		return connector->panel.backlight.max;
+ 
+ 	if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
+@@ -107,7 +107,8 @@ static u32 intel_dp_aux_get_backlight(struct intel_connector *connector)
+  * 8-bit or 16 bit value (MSB and LSB)
+  */
+ static void
+-intel_dp_aux_set_backlight(const struct drm_connector_state *conn_state, u32 level)
++intel_dp_aux_vesa_set_backlight(const struct drm_connector_state *conn_state,
++				u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct intel_dp *intel_dp = intel_attached_dp(connector);
+@@ -137,7 +138,7 @@ intel_dp_aux_set_backlight(const struct drm_connector_state *conn_state, u32 lev
+  * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the
+  *             EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h)
+  */
+-static bool intel_dp_aux_set_pwm_freq(struct intel_connector *connector)
++static bool intel_dp_aux_vesa_set_pwm_freq(struct intel_connector *connector)
+ {
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	struct intel_dp *intel_dp = intel_attached_dp(connector);
+@@ -173,8 +174,9 @@ static bool intel_dp_aux_set_pwm_freq(struct intel_connector *connector)
+ 	return true;
+ }
+ 
+-static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_state,
+-					  const struct drm_connector_state *conn_state, u32 level)
++static void
++intel_dp_aux_vesa_enable_backlight(const struct intel_crtc_state *crtc_state,
++				   const struct drm_connector_state *conn_state, u32 level)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct intel_dp *intel_dp = intel_attached_dp(connector);
+@@ -214,7 +216,7 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st
+ 	}
+ 
+ 	if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP)
+-		if (intel_dp_aux_set_pwm_freq(connector))
++		if (intel_dp_aux_vesa_set_pwm_freq(connector))
+ 			new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE;
+ 
+ 	if (new_dpcd_buf != dpcd_buf) {
+@@ -225,18 +227,18 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st
+ 		}
+ 	}
+ 
+-	intel_dp_aux_set_backlight(conn_state, level);
+-	set_aux_backlight_enable(intel_dp, true);
++	intel_dp_aux_vesa_set_backlight(conn_state, level);
++	set_vesa_backlight_enable(intel_dp, true);
+ }
+ 
+-static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state,
+-					   u32 level)
++static void intel_dp_aux_vesa_disable_backlight(const struct drm_connector_state *old_conn_state,
++						u32 level)
+ {
+-	set_aux_backlight_enable(enc_to_intel_dp(to_intel_encoder(old_conn_state->best_encoder)),
+-				 false);
++	set_vesa_backlight_enable(enc_to_intel_dp(to_intel_encoder(old_conn_state->best_encoder)),
++				  false);
+ }
+ 
+-static u32 intel_dp_aux_calc_max_backlight(struct intel_connector *connector)
++static u32 intel_dp_aux_vesa_calc_max_backlight(struct intel_connector *connector)
+ {
+ 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+ 	struct intel_dp *intel_dp = intel_attached_dp(connector);
+@@ -316,25 +318,25 @@ static u32 intel_dp_aux_calc_max_backlight(struct intel_connector *connector)
+ 	return max_backlight;
+ }
+ 
+-static int intel_dp_aux_setup_backlight(struct intel_connector *connector,
+-					enum pipe pipe)
++static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector,
++					     enum pipe pipe)
+ {
+ 	struct intel_panel *panel = &connector->panel;
+ 
+-	panel->backlight.max = intel_dp_aux_calc_max_backlight(connector);
++	panel->backlight.max = intel_dp_aux_vesa_calc_max_backlight(connector);
+ 	if (!panel->backlight.max)
+ 		return -ENODEV;
+ 
+ 	panel->backlight.min = 0;
+-	panel->backlight.level = intel_dp_aux_get_backlight(connector);
+-	panel->backlight.enabled = intel_dp_aux_backlight_dpcd_mode(connector) &&
++	panel->backlight.level = intel_dp_aux_vesa_get_backlight(connector);
++	panel->backlight.enabled = intel_dp_aux_vesa_backlight_dpcd_mode(connector) &&
+ 				   panel->backlight.level != 0;
+ 
+ 	return 0;
+ }
+ 
+ static bool
+-intel_dp_aux_display_control_capable(struct intel_connector *connector)
++intel_dp_aux_supports_vesa_backlight(struct intel_connector *connector)
+ {
+ 	struct intel_dp *intel_dp = intel_attached_dp(connector);
+ 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+@@ -351,12 +353,12 @@ intel_dp_aux_display_control_capable(struct intel_connector *connector)
+ 	return false;
+ }
+ 
+-static const struct intel_panel_bl_funcs intel_dp_bl_funcs = {
+-	.setup = intel_dp_aux_setup_backlight,
+-	.enable = intel_dp_aux_enable_backlight,
+-	.disable = intel_dp_aux_disable_backlight,
+-	.set = intel_dp_aux_set_backlight,
+-	.get = intel_dp_aux_get_backlight,
++static const struct intel_panel_bl_funcs intel_dp_vesa_bl_funcs = {
++	.setup = intel_dp_aux_vesa_setup_backlight,
++	.enable = intel_dp_aux_vesa_enable_backlight,
++	.disable = intel_dp_aux_vesa_disable_backlight,
++	.set = intel_dp_aux_vesa_set_backlight,
++	.get = intel_dp_aux_vesa_get_backlight,
+ };
+ 
+ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
+@@ -366,7 +368,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
+ 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ 
+ 	if (i915->params.enable_dpcd_backlight == 0 ||
+-	    !intel_dp_aux_display_control_capable(intel_connector))
++	    !intel_dp_aux_supports_vesa_backlight(intel_connector))
+ 		return -ENODEV;
+ 
+ 	/*
+@@ -388,7 +390,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
+ 		return -ENODEV;
+ 	}
+ 
+-	panel->backlight.funcs = &intel_dp_bl_funcs;
++	panel->backlight.funcs = &intel_dp_vesa_bl_funcs;
+ 
+ 	return 0;
+ }
+-- 
+2.29.2
+
diff --git a/0006-drm-i915-dp-Add-register-definitions-for-Intel-HDR-b.patch b/0006-drm-i915-dp-Add-register-definitions-for-Intel-HDR-b.patch
new file mode 100644
index 000000000000..17716498406d
--- /dev/null
+++ b/0006-drm-i915-dp-Add-register-definitions-for-Intel-HDR-b.patch
@@ -0,0 +1,88 @@
+From ce0861d0336749a66d49a0d35e6f90265b8c7499 Mon Sep 17 00:00:00 2001
+From: Lyude Paul <lyude@redhat.com>
+Date: Fri, 4 Dec 2020 17:36:00 -0500
+Subject: [PATCH 06/10] drm/i915/dp: Add register definitions for Intel HDR
+ backlight interface
+
+No functional changes yet, this just adds definitions for all of the
+known DPCD registers used by Intel's HDR backlight interface. Since
+we'll only ever use this in i915, we just define them in
+intel_dp_aux_backlight.c
+
+Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+Cc: thaytan@noraisin.net
+Cc: Vasily Khoruzhick <anarsoul@gmail.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20201204223603.249878-7-lyude@redhat.com
+---
+ .../drm/i915/display/intel_dp_aux_backlight.c | 53 +++++++++++++++++++
+ 1 file changed, 53 insertions(+)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+index ec47cd69cd69..2271d75f946a 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+@@ -25,6 +25,59 @@
+ #include "intel_display_types.h"
+ #include "intel_dp_aux_backlight.h"
+ 
++/*
++ * DP AUX registers for Intel's proprietary HDR backlight interface. We define
++ * them here since we'll likely be the only driver to ever use these.
++ */
++#define INTEL_EDP_HDR_TCON_CAP0                                        0x340
++
++#define INTEL_EDP_HDR_TCON_CAP1                                        0x341
++# define INTEL_EDP_HDR_TCON_2084_DECODE_CAP                           BIT(0)
++# define INTEL_EDP_HDR_TCON_2020_GAMUT_CAP                            BIT(1)
++# define INTEL_EDP_HDR_TCON_TONE_MAPPING_CAP                          BIT(2)
++# define INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_CAP                   BIT(3)
++# define INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP                       BIT(4)
++# define INTEL_EDP_HDR_TCON_OPTIMIZATION_CAP                          BIT(5)
++# define INTEL_EDP_HDR_TCON_SDP_COLORIMETRY_CAP                       BIT(6)
++# define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_CONVERSION_CAP        BIT(7)
++
++#define INTEL_EDP_HDR_TCON_CAP2                                        0x342
++# define INTEL_EDP_SDR_TCON_BRIGHTNESS_AUX_CAP                        BIT(0)
++
++#define INTEL_EDP_HDR_TCON_CAP3                                        0x343
++
++#define INTEL_EDP_HDR_GETSET_CTRL_PARAMS                               0x344
++# define INTEL_EDP_HDR_TCON_2084_DECODE_ENABLE                        BIT(0)
++# define INTEL_EDP_HDR_TCON_2020_GAMUT_ENABLE                         BIT(1)
++# define INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE                       BIT(2) /* Pre-TGL+ */
++# define INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_ENABLE                BIT(3)
++# define INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE                     BIT(4)
++# define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_ENABLE                BIT(5)
++/* Bit 6 is reserved */
++# define INTEL_EDP_HDR_TCON_SDP_COLORIMETRY_ENABLE                    BIT(7)
++
++#define INTEL_EDP_HDR_CONTENT_LUMINANCE                                0x346 /* Pre-TGL+ */
++#define INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE                         0x34A
++#define INTEL_EDP_SDR_LUMINANCE_LEVEL                                  0x352
++#define INTEL_EDP_BRIGHTNESS_NITS_LSB                                  0x354
++#define INTEL_EDP_BRIGHTNESS_NITS_MSB                                  0x355
++#define INTEL_EDP_BRIGHTNESS_DELAY_FRAMES                              0x356
++#define INTEL_EDP_BRIGHTNESS_PER_FRAME_STEPS                           0x357
++
++#define INTEL_EDP_BRIGHTNESS_OPTIMIZATION_0                            0x358
++# define INTEL_EDP_TCON_USAGE_MASK                             GENMASK(0, 3)
++# define INTEL_EDP_TCON_USAGE_UNKNOWN                                    0x0
++# define INTEL_EDP_TCON_USAGE_DESKTOP                                    0x1
++# define INTEL_EDP_TCON_USAGE_FULL_SCREEN_MEDIA                          0x2
++# define INTEL_EDP_TCON_USAGE_FULL_SCREEN_GAMING                         0x3
++# define INTEL_EDP_TCON_POWER_MASK                                    BIT(4)
++# define INTEL_EDP_TCON_POWER_DC                                    (0 << 4)
++# define INTEL_EDP_TCON_POWER_AC                                    (1 << 4)
++# define INTEL_EDP_TCON_OPTIMIZATION_STRENGTH_MASK             GENMASK(5, 7)
++
++#define INTEL_EDP_BRIGHTNESS_OPTIMIZATION_1                            0x359
++
++/* VESA backlight callbacks */
+ static void set_vesa_backlight_enable(struct intel_dp *intel_dp, bool enable)
+ {
+ 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+-- 
+2.29.2
+
diff --git a/0007-drm-i915-Keep-track-of-pwm-related-backlight-hooks-s.patch b/0007-drm-i915-Keep-track-of-pwm-related-backlight-hooks-s.patch
new file mode 100644
index 000000000000..2a960d10fa16
--- /dev/null
+++ b/0007-drm-i915-Keep-track-of-pwm-related-backlight-hooks-s.patch
@@ -0,0 +1,876 @@
+From 6ab532a209a7981c5bdaddd9cd31e201d1a59471 Mon Sep 17 00:00:00 2001
+From: Lyude Paul <lyude@redhat.com>
+Date: Thu, 7 Jan 2021 17:52:04 -0500
+Subject: [PATCH 07/10] drm/i915: Keep track of pwm-related backlight hooks
+ separately
+
+Currently, every different type of backlight hook that i915 supports is
+pretty straight forward - you have a backlight, probably through PWM
+(but maybe DPCD), with a single set of platform-specific hooks that are
+used for controlling it.
+
+HDR backlights, in particular VESA and Intel's HDR backlight
+implementations, can end up being more complicated. With Intel's
+proprietary interface, HDR backlight controls always run through the
+DPCD. When the backlight is in SDR backlight mode however, the driver
+may need to bypass the TCON and control the backlight directly through
+PWM.
+
+So, in order to support this we'll need to split our backlight callbacks
+into two groups: a set of high-level backlight control callbacks in
+intel_panel, and an additional set of pwm-specific backlight control
+callbacks. This also implies a functional changes for how these
+callbacks are used:
+
+* We now keep track of two separate backlight level ranges, one for the
+  high-level backlight, and one for the pwm backlight range
+* We also keep track of backlight enablement and PWM backlight
+  enablement separately
+* Since the currently set backlight level might not be the same as the
+  currently programmed PWM backlight level, we stop setting
+  panel->backlight.level with the currently programmed PWM backlight
+  level in panel->backlight.pwm_funcs->setup(). Instead, we rely
+  on the higher level backlight control functions to retrieve the
+  current PWM backlight level (in this case, intel_pwm_get_backlight()).
+  Note that there are still a few PWM backlight setup callbacks that
+  do actually need to retrieve the current PWM backlight level, although
+  we no longer save this value in panel->backlight.level like before.
+
+Additionally, we drop the call to lpt_get_backlight() in
+lpt_setup_backlight(), and avoid unconditionally writing the PWM value that
+we get from it and only write it back if we're in CPU mode, and switching
+to PCH mode. The reason for this is because in the original codepath for
+this, it was expected that the intel_panel_bl_funcs->setup() hook would be
+responsible for fetching the initial backlight level. On lpt systems, the
+only time we could ever be in PCH backlight mode is during the initial
+driver load - meaning that outside of the setup() hook, lpt_get_backlight()
+will always be the callback used for retrieving the current backlight
+level. After this patch we still need to fetch and write-back the PCH
+backlight value if we're switching from CPU mode to PCH, but because
+intel_pwm_setup_backlight() will retrieve the backlight level after setup()
+using the get() hook, which always ends up being lpt_get_backlight(). Thus
+- an additional call to lpt_get_backlight() in lpt_setup_backlight() is
+made redundant.
+
+v5:
+* Fix indenting warnings from checkpatch
+v4:
+* Fix commit message
+* Remove outdated comment in intel_panel.c
+* Rename pwm_(min|max) to pwm_level_(min|max)
+* Use intel_pwm_get_backlight() in intel_pwm_setup_backlight() instead of
+  indirection
+* Don't move intel_dp_aux_init_bcklight_funcs() call to bottom of
+  intel_panel_init_backlight_funcs() quite yet
+v3:
+* Reuse intel_panel_bl_funcs() for pwm_funcs
+* Explain why we drop lpt_get_backlight()
+
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+Cc: thaytan@noraisin.net
+Cc: Vasily Khoruzhick <anarsoul@gmail.com>
+---
+ .../drm/i915/display/intel_display_types.h    |   4 +
+ drivers/gpu/drm/i915/display/intel_panel.c    | 333 ++++++++++--------
+ 2 files changed, 187 insertions(+), 150 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
+index 6dd8f26ec3c9..1abdcc3f91b2 100644
+--- a/drivers/gpu/drm/i915/display/intel_display_types.h
++++ b/drivers/gpu/drm/i915/display/intel_display_types.h
+@@ -232,6 +232,9 @@ struct intel_panel {
+ 		bool alternate_pwm_increment;	/* lpt+ */
+ 
+ 		/* PWM chip */
++		u32 pwm_level_min;
++		u32 pwm_level_max;
++		bool pwm_enabled;
+ 		bool util_pin_active_low;	/* bxt+ */
+ 		u8 controller;		/* bxt+ only */
+ 		struct pwm_device *pwm;
+@@ -243,6 +246,7 @@ struct intel_panel {
+ 		struct backlight_device *device;
+ 
+ 		const struct intel_panel_bl_funcs *funcs;
++		const struct intel_panel_bl_funcs *pwm_funcs;
+ 		void (*power)(struct intel_connector *, bool enable);
+ 	} backlight;
+ };
+diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
+index 67f81ae995c4..8c99bf404a32 100644
+--- a/drivers/gpu/drm/i915/display/intel_panel.c
++++ b/drivers/gpu/drm/i915/display/intel_panel.c
+@@ -511,25 +511,34 @@ static u32 scale_hw_to_user(struct intel_connector *connector,
+ 		     0, user_max);
+ }
+ 
+-static u32 intel_panel_compute_brightness(struct intel_connector *connector,
+-					  u32 val)
++static u32 intel_panel_sanitize_pwm_level(struct intel_connector *connector, u32 val)
+ {
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	struct intel_panel *panel = &connector->panel;
+ 
+-	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
++	drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0);
+ 
+ 	if (dev_priv->params.invert_brightness < 0)
+ 		return val;
+ 
+ 	if (dev_priv->params.invert_brightness > 0 ||
+ 	    dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
+-		return panel->backlight.max - val + panel->backlight.min;
++		return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min;
+ 	}
+ 
+ 	return val;
+ }
+ 
++static void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 val)
++{
++	struct intel_connector *connector = to_intel_connector(conn_state->connector);
++	struct drm_i915_private *i915 = to_i915(connector->base.dev);
++	struct intel_panel *panel = &connector->panel;
++
++	drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", val);
++	panel->backlight.pwm_funcs->set(conn_state, val);
++}
++
+ static u32 lpt_get_backlight(struct intel_connector *connector)
+ {
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+@@ -624,12 +633,12 @@ static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32
+ 	struct intel_panel *panel = &connector->panel;
+ 	u32 tmp, mask;
+ 
+-	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
++	drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0);
+ 
+ 	if (panel->backlight.combination_mode) {
+ 		u8 lbpc;
+ 
+-		lbpc = level * 0xfe / panel->backlight.max + 1;
++		lbpc = level * 0xfe / panel->backlight.pwm_level_max + 1;
+ 		level /= lbpc;
+ 		pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
+ 	}
+@@ -681,9 +690,8 @@ intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state,
+ 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+ 	struct intel_panel *panel = &connector->panel;
+ 
+-	drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", level);
++	drm_dbg_kms(&i915->drm, "set backlight level = %d\n", level);
+ 
+-	level = intel_panel_compute_brightness(connector, level);
+ 	panel->backlight.funcs->set(conn_state, level);
+ }
+ 
+@@ -732,7 +740,7 @@ static void lpt_disable_backlight(const struct drm_connector_state *old_conn_sta
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, level);
++	intel_panel_set_pwm_level(old_conn_state, level);
+ 
+ 	/*
+ 	 * Although we don't support or enable CPU PWM with LPT/SPT based
+@@ -760,7 +768,7 @@ static void pch_disable_backlight(const struct drm_connector_state *old_conn_sta
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, val);
++	intel_panel_set_pwm_level(old_conn_state, val);
+ 
+ 	tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
+ 	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
+@@ -771,7 +779,7 @@ static void pch_disable_backlight(const struct drm_connector_state *old_conn_sta
+ 
+ static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
+ {
+-	intel_panel_actually_set_backlight(old_conn_state, val);
++	intel_panel_set_pwm_level(old_conn_state, val);
+ }
+ 
+ static void i965_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
+@@ -779,7 +787,7 @@ static void i965_disable_backlight(const struct drm_connector_state *old_conn_st
+ 	struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
+ 	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, val);
++	intel_panel_set_pwm_level(old_conn_state, val);
+ 
+ 	tmp = intel_de_read(dev_priv, BLC_PWM_CTL2);
+ 	intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
+@@ -792,7 +800,7 @@ static void vlv_disable_backlight(const struct drm_connector_state *old_conn_sta
+ 	enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
+ 	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, val);
++	intel_panel_set_pwm_level(old_conn_state, val);
+ 
+ 	tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
+ 	intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe),
+@@ -806,7 +814,7 @@ static void bxt_disable_backlight(const struct drm_connector_state *old_conn_sta
+ 	struct intel_panel *panel = &connector->panel;
+ 	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, val);
++	intel_panel_set_pwm_level(old_conn_state, val);
+ 
+ 	tmp = intel_de_read(dev_priv,
+ 			    BXT_BLC_PWM_CTL(panel->backlight.controller));
+@@ -827,7 +835,7 @@ static void cnp_disable_backlight(const struct drm_connector_state *old_conn_sta
+ 	struct intel_panel *panel = &connector->panel;
+ 	u32 tmp;
+ 
+-	intel_panel_actually_set_backlight(old_conn_state, val);
++	intel_panel_set_pwm_level(old_conn_state, val);
+ 
+ 	tmp = intel_de_read(dev_priv,
+ 			    BXT_BLC_PWM_CTL(panel->backlight.controller));
+@@ -906,7 +914,7 @@ static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 		intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken);
+ 	}
+ 
+-	pch_ctl2 = panel->backlight.max << 16;
++	pch_ctl2 = panel->backlight.pwm_level_max << 16;
+ 	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2);
+ 
+ 	pch_ctl1 = 0;
+@@ -923,7 +931,7 @@ static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 		       pch_ctl1 | BLM_PCH_PWM_ENABLE);
+ 
+ 	/* This won't stick until the above enable. */
+-	intel_panel_actually_set_backlight(conn_state, level);
++	intel_panel_set_pwm_level(conn_state, level);
+ }
+ 
+ static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
+@@ -958,9 +966,9 @@ static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
+ 
+ 	/* This won't stick until the above enable. */
+-	intel_panel_actually_set_backlight(conn_state, level);
++	intel_panel_set_pwm_level(conn_state, level);
+ 
+-	pch_ctl2 = panel->backlight.max << 16;
++	pch_ctl2 = panel->backlight.pwm_level_max << 16;
+ 	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2);
+ 
+ 	pch_ctl1 = 0;
+@@ -987,7 +995,7 @@ static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 		intel_de_write(dev_priv, BLC_PWM_CTL, 0);
+ 	}
+ 
+-	freq = panel->backlight.max;
++	freq = panel->backlight.pwm_level_max;
+ 	if (panel->backlight.combination_mode)
+ 		freq /= 0xff;
+ 
+@@ -1001,7 +1009,7 @@ static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 	intel_de_posting_read(dev_priv, BLC_PWM_CTL);
+ 
+ 	/* XXX: combine this into above write? */
+-	intel_panel_actually_set_backlight(conn_state, level);
++	intel_panel_set_pwm_level(conn_state, level);
+ 
+ 	/*
+ 	 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
+@@ -1028,7 +1036,7 @@ static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 		intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2);
+ 	}
+ 
+-	freq = panel->backlight.max;
++	freq = panel->backlight.pwm_level_max;
+ 	if (panel->backlight.combination_mode)
+ 		freq /= 0xff;
+ 
+@@ -1044,7 +1052,7 @@ static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 	intel_de_posting_read(dev_priv, BLC_PWM_CTL2);
+ 	intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
+ 
+-	intel_panel_actually_set_backlight(conn_state, level);
++	intel_panel_set_pwm_level(conn_state, level);
+ }
+ 
+ static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
+@@ -1063,11 +1071,11 @@ static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 		intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2);
+ 	}
+ 
+-	ctl = panel->backlight.max << 16;
++	ctl = panel->backlight.pwm_level_max << 16;
+ 	intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl);
+ 
+ 	/* XXX: combine this into above write? */
+-	intel_panel_actually_set_backlight(conn_state, level);
++	intel_panel_set_pwm_level(conn_state, level);
+ 
+ 	ctl2 = 0;
+ 	if (panel->backlight.active_low_pwm)
+@@ -1116,9 +1124,9 @@ static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 
+ 	intel_de_write(dev_priv,
+ 		       BXT_BLC_PWM_FREQ(panel->backlight.controller),
+-		       panel->backlight.max);
++		       panel->backlight.pwm_level_max);
+ 
+-	intel_panel_actually_set_backlight(conn_state, level);
++	intel_panel_set_pwm_level(conn_state, level);
+ 
+ 	pwm_ctl = 0;
+ 	if (panel->backlight.active_low_pwm)
+@@ -1152,9 +1160,9 @@ static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 
+ 	intel_de_write(dev_priv,
+ 		       BXT_BLC_PWM_FREQ(panel->backlight.controller),
+-		       panel->backlight.max);
++		       panel->backlight.pwm_level_max);
+ 
+-	intel_panel_actually_set_backlight(conn_state, level);
++	intel_panel_set_pwm_level(conn_state, level);
+ 
+ 	pwm_ctl = 0;
+ 	if (panel->backlight.active_low_pwm)
+@@ -1174,7 +1182,6 @@ static void ext_pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct intel_panel *panel = &connector->panel;
+ 
+-	level = intel_panel_compute_brightness(connector, level);
+ 	pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100);
+ 	panel->backlight.pwm_state.enabled = true;
+ 	pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state);
+@@ -1232,10 +1239,8 @@ static u32 intel_panel_get_backlight(struct intel_connector *connector)
+ 
+ 	mutex_lock(&dev_priv->backlight_lock);
+ 
+-	if (panel->backlight.enabled) {
++	if (panel->backlight.enabled)
+ 		val = panel->backlight.funcs->get(connector);
+-		val = intel_panel_compute_brightness(connector, val);
+-	}
+ 
+ 	mutex_unlock(&dev_priv->backlight_lock);
+ 
+@@ -1566,13 +1571,13 @@ static u32 get_backlight_max_vbt(struct intel_connector *connector)
+ 	u16 pwm_freq_hz = get_vbt_pwm_freq(dev_priv);
+ 	u32 pwm;
+ 
+-	if (!panel->backlight.funcs->hz_to_pwm) {
++	if (!panel->backlight.pwm_funcs->hz_to_pwm) {
+ 		drm_dbg_kms(&dev_priv->drm,
+ 			    "backlight frequency conversion not supported\n");
+ 		return 0;
+ 	}
+ 
+-	pwm = panel->backlight.funcs->hz_to_pwm(connector, pwm_freq_hz);
++	pwm = panel->backlight.pwm_funcs->hz_to_pwm(connector, pwm_freq_hz);
+ 	if (!pwm) {
+ 		drm_dbg_kms(&dev_priv->drm,
+ 			    "backlight frequency conversion failed\n");
+@@ -1591,7 +1596,7 @@ static u32 get_backlight_min_vbt(struct intel_connector *connector)
+ 	struct intel_panel *panel = &connector->panel;
+ 	int min;
+ 
+-	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
++	drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0);
+ 
+ 	/*
+ 	 * XXX: If the vbt value is 255, it makes min equal to max, which leads
+@@ -1608,7 +1613,7 @@ static u32 get_backlight_min_vbt(struct intel_connector *connector)
+ 	}
+ 
+ 	/* vbt value is a coefficient in range [0..255] */
+-	return scale(min, 0, 255, 0, panel->backlight.max);
++	return scale(min, 0, 255, 0, panel->backlight.pwm_level_max);
+ }
+ 
+ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
+@@ -1628,37 +1633,32 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
+ 	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
+ 
+ 	pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2);
+-	panel->backlight.max = pch_ctl2 >> 16;
++	panel->backlight.pwm_level_max = pch_ctl2 >> 16;
+ 
+ 	cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
+ 
+-	if (!panel->backlight.max)
+-		panel->backlight.max = get_backlight_max_vbt(connector);
++	if (!panel->backlight.pwm_level_max)
++		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
+ 
+-	if (!panel->backlight.max)
++	if (!panel->backlight.pwm_level_max)
+ 		return -ENODEV;
+ 
+-	panel->backlight.min = get_backlight_min_vbt(connector);
++	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
+ 
+-	panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
++	panel->backlight.pwm_enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
+ 
+-	cpu_mode = panel->backlight.enabled && HAS_PCH_LPT(dev_priv) &&
++	cpu_mode = panel->backlight.pwm_enabled && HAS_PCH_LPT(dev_priv) &&
+ 		   !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) &&
+ 		   (cpu_ctl2 & BLM_PWM_ENABLE);
+-	if (cpu_mode)
+-		val = pch_get_backlight(connector);
+-	else
+-		val = lpt_get_backlight(connector);
+-	val = intel_panel_compute_brightness(connector, val);
+-	panel->backlight.level = clamp(val, panel->backlight.min,
+-				       panel->backlight.max);
+ 
+ 	if (cpu_mode) {
++		val = intel_panel_sanitize_pwm_level(connector, pch_get_backlight(connector));
++
+ 		drm_dbg_kms(&dev_priv->drm,
+ 			    "CPU backlight register was enabled, switching to PCH override\n");
+ 
+ 		/* Write converted CPU PWM value to PCH override register */
+-		lpt_set_backlight(connector->base.state, panel->backlight.level);
++		lpt_set_backlight(connector->base.state, val);
+ 		intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
+ 			       pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE);
+ 
+@@ -1673,29 +1673,24 @@ static int pch_setup_backlight(struct intel_connector *connector, enum pipe unus
+ {
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	struct intel_panel *panel = &connector->panel;
+-	u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
++	u32 cpu_ctl2, pch_ctl1, pch_ctl2;
+ 
+ 	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
+ 	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
+ 
+ 	pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2);
+-	panel->backlight.max = pch_ctl2 >> 16;
++	panel->backlight.pwm_level_max = pch_ctl2 >> 16;
+ 
+-	if (!panel->backlight.max)
+-		panel->backlight.max = get_backlight_max_vbt(connector);
++	if (!panel->backlight.pwm_level_max)
++		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
+ 
+-	if (!panel->backlight.max)
++	if (!panel->backlight.pwm_level_max)
+ 		return -ENODEV;
+ 
+-	panel->backlight.min = get_backlight_min_vbt(connector);
+-
+-	val = pch_get_backlight(connector);
+-	val = intel_panel_compute_brightness(connector, val);
+-	panel->backlight.level = clamp(val, panel->backlight.min,
+-				       panel->backlight.max);
++	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
+ 
+ 	cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
+-	panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
++	panel->backlight.pwm_enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
+ 		(pch_ctl1 & BLM_PCH_PWM_ENABLE);
+ 
+ 	return 0;
+@@ -1715,27 +1710,26 @@ static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unu
+ 	if (IS_PINEVIEW(dev_priv))
+ 		panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
+ 
+-	panel->backlight.max = ctl >> 17;
++	panel->backlight.pwm_level_max = ctl >> 17;
+ 
+-	if (!panel->backlight.max) {
+-		panel->backlight.max = get_backlight_max_vbt(connector);
+-		panel->backlight.max >>= 1;
++	if (!panel->backlight.pwm_level_max) {
++		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
++		panel->backlight.pwm_level_max >>= 1;
+ 	}
+ 
+-	if (!panel->backlight.max)
++	if (!panel->backlight.pwm_level_max)
+ 		return -ENODEV;
+ 
+ 	if (panel->backlight.combination_mode)
+-		panel->backlight.max *= 0xff;
++		panel->backlight.pwm_level_max *= 0xff;
+ 
+-	panel->backlight.min = get_backlight_min_vbt(connector);
++	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
+ 
+ 	val = i9xx_get_backlight(connector);
+-	val = intel_panel_compute_brightness(connector, val);
+-	panel->backlight.level = clamp(val, panel->backlight.min,
+-				       panel->backlight.max);
++	val = intel_panel_sanitize_pwm_level(connector, val);
++	val = clamp(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max);
+ 
+-	panel->backlight.enabled = val != 0;
++	panel->backlight.pwm_enabled = val != 0;
+ 
+ 	return 0;
+ }
+@@ -1744,32 +1738,27 @@ static int i965_setup_backlight(struct intel_connector *connector, enum pipe unu
+ {
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	struct intel_panel *panel = &connector->panel;
+-	u32 ctl, ctl2, val;
++	u32 ctl, ctl2;
+ 
+ 	ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2);
+ 	panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
+ 	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
+ 
+ 	ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
+-	panel->backlight.max = ctl >> 16;
++	panel->backlight.pwm_level_max = ctl >> 16;
+ 
+-	if (!panel->backlight.max)
+-		panel->backlight.max = get_backlight_max_vbt(connector);
++	if (!panel->backlight.pwm_level_max)
++		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
+ 
+-	if (!panel->backlight.max)
++	if (!panel->backlight.pwm_level_max)
+ 		return -ENODEV;
+ 
+ 	if (panel->backlight.combination_mode)
+-		panel->backlight.max *= 0xff;
+-
+-	panel->backlight.min = get_backlight_min_vbt(connector);
++		panel->backlight.pwm_level_max *= 0xff;
+ 
+-	val = i9xx_get_backlight(connector);
+-	val = intel_panel_compute_brightness(connector, val);
+-	panel->backlight.level = clamp(val, panel->backlight.min,
+-				       panel->backlight.max);
++	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
+ 
+-	panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
++	panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE;
+ 
+ 	return 0;
+ }
+@@ -1778,7 +1767,7 @@ static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe
+ {
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	struct intel_panel *panel = &connector->panel;
+-	u32 ctl, ctl2, val;
++	u32 ctl, ctl2;
+ 
+ 	if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B))
+ 		return -ENODEV;
+@@ -1787,22 +1776,17 @@ static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe
+ 	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
+ 
+ 	ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe));
+-	panel->backlight.max = ctl >> 16;
++	panel->backlight.pwm_level_max = ctl >> 16;
+ 
+-	if (!panel->backlight.max)
+-		panel->backlight.max = get_backlight_max_vbt(connector);
++	if (!panel->backlight.pwm_level_max)
++		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
+ 
+-	if (!panel->backlight.max)
++	if (!panel->backlight.pwm_level_max)
+ 		return -ENODEV;
+ 
+-	panel->backlight.min = get_backlight_min_vbt(connector);
++	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
+ 
+-	val = _vlv_get_backlight(dev_priv, pipe);
+-	val = intel_panel_compute_brightness(connector, val);
+-	panel->backlight.level = clamp(val, panel->backlight.min,
+-				       panel->backlight.max);
+-
+-	panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
++	panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE;
+ 
+ 	return 0;
+ }
+@@ -1827,24 +1811,18 @@ bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
+ 	}
+ 
+ 	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
+-	panel->backlight.max =
+-		intel_de_read(dev_priv,
+-			      BXT_BLC_PWM_FREQ(panel->backlight.controller));
++	panel->backlight.pwm_level_max =
++		intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller));
+ 
+-	if (!panel->backlight.max)
+-		panel->backlight.max = get_backlight_max_vbt(connector);
++	if (!panel->backlight.pwm_level_max)
++		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
+ 
+-	if (!panel->backlight.max)
++	if (!panel->backlight.pwm_level_max)
+ 		return -ENODEV;
+ 
+-	panel->backlight.min = get_backlight_min_vbt(connector);
+-
+-	val = bxt_get_backlight(connector);
+-	val = intel_panel_compute_brightness(connector, val);
+-	panel->backlight.level = clamp(val, panel->backlight.min,
+-				       panel->backlight.max);
++	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
+ 
+-	panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
++	panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
+ 
+ 	return 0;
+ }
+@@ -1854,7 +1832,7 @@ cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
+ {
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	struct intel_panel *panel = &connector->panel;
+-	u32 pwm_ctl, val;
++	u32 pwm_ctl;
+ 
+ 	/*
+ 	 * CNP has the BXT implementation of backlight, but with only one
+@@ -1867,24 +1845,18 @@ cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
+ 				BXT_BLC_PWM_CTL(panel->backlight.controller));
+ 
+ 	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
+-	panel->backlight.max =
+-		intel_de_read(dev_priv,
+-			      BXT_BLC_PWM_FREQ(panel->backlight.controller));
++	panel->backlight.pwm_level_max =
++		intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller));
+ 
+-	if (!panel->backlight.max)
+-		panel->backlight.max = get_backlight_max_vbt(connector);
++	if (!panel->backlight.pwm_level_max)
++		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
+ 
+-	if (!panel->backlight.max)
++	if (!panel->backlight.pwm_level_max)
+ 		return -ENODEV;
+ 
+-	panel->backlight.min = get_backlight_min_vbt(connector);
++	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
+ 
+-	val = bxt_get_backlight(connector);
+-	val = intel_panel_compute_brightness(connector, val);
+-	panel->backlight.level = clamp(val, panel->backlight.min,
+-				       panel->backlight.max);
+-
+-	panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
++	panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
+ 
+ 	return 0;
+ }
+@@ -1914,8 +1886,8 @@ static int ext_pwm_setup_backlight(struct intel_connector *connector,
+ 		return -ENODEV;
+ 	}
+ 
+-	panel->backlight.max = 100; /* 100% */
+-	panel->backlight.min = get_backlight_min_vbt(connector);
++	panel->backlight.pwm_level_max = 100; /* 100% */
++	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
+ 
+ 	if (pwm_is_enabled(panel->backlight.pwm)) {
+ 		/* PWM is already enabled, use existing settings */
+@@ -1923,10 +1895,8 @@ static int ext_pwm_setup_backlight(struct intel_connector *connector,
+ 
+ 		level = pwm_get_relative_duty_cycle(&panel->backlight.pwm_state,
+ 						    100);
+-		level = intel_panel_compute_brightness(connector, level);
+-		panel->backlight.level = clamp(level, panel->backlight.min,
+-					       panel->backlight.max);
+-		panel->backlight.enabled = true;
++		level = intel_panel_sanitize_pwm_level(connector, level);
++		panel->backlight.pwm_enabled = true;
+ 
+ 		drm_dbg_kms(&dev_priv->drm, "PWM already enabled at freq %ld, VBT freq %d, level %d\n",
+ 			    NSEC_PER_SEC / (unsigned long)panel->backlight.pwm_state.period,
+@@ -1942,6 +1912,58 @@ static int ext_pwm_setup_backlight(struct intel_connector *connector,
+ 	return 0;
+ }
+ 
++static void intel_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
++{
++	struct intel_connector *connector = to_intel_connector(conn_state->connector);
++	struct intel_panel *panel = &connector->panel;
++
++	panel->backlight.pwm_funcs->set(conn_state,
++				       intel_panel_sanitize_pwm_level(connector, level));
++}
++
++static u32 intel_pwm_get_backlight(struct intel_connector *connector)
++{
++	struct intel_panel *panel = &connector->panel;
++
++	return intel_panel_sanitize_pwm_level(connector,
++					      panel->backlight.pwm_funcs->get(connector));
++}
++
++static void intel_pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
++				       const struct drm_connector_state *conn_state, u32 level)
++{
++	struct intel_connector *connector = to_intel_connector(conn_state->connector);
++	struct intel_panel *panel = &connector->panel;
++
++	panel->backlight.pwm_funcs->enable(crtc_state, conn_state,
++					   intel_panel_sanitize_pwm_level(connector, level));
++}
++
++static void intel_pwm_disable_backlight(const struct drm_connector_state *conn_state, u32 level)
++{
++	struct intel_connector *connector = to_intel_connector(conn_state->connector);
++	struct intel_panel *panel = &connector->panel;
++
++	panel->backlight.pwm_funcs->disable(conn_state,
++					    intel_panel_sanitize_pwm_level(connector, level));
++}
++
++static int intel_pwm_setup_backlight(struct intel_connector *connector, enum pipe pipe)
++{
++	struct intel_panel *panel = &connector->panel;
++	int ret = panel->backlight.pwm_funcs->setup(connector, pipe);
++
++	if (ret < 0)
++		return ret;
++
++	panel->backlight.min = panel->backlight.pwm_level_min;
++	panel->backlight.max = panel->backlight.pwm_level_max;
++	panel->backlight.level = intel_pwm_get_backlight(connector);
++	panel->backlight.enabled = panel->backlight.pwm_enabled;
++
++	return 0;
++}
++
+ void intel_panel_update_backlight(struct intel_atomic_state *state,
+ 				  struct intel_encoder *encoder,
+ 				  const struct intel_crtc_state *crtc_state,
+@@ -2015,7 +2037,7 @@ static void intel_panel_destroy_backlight(struct intel_panel *panel)
+ 	panel->backlight.present = false;
+ }
+ 
+-static const struct intel_panel_bl_funcs bxt_funcs = {
++static const struct intel_panel_bl_funcs bxt_pwm_funcs = {
+ 	.setup = bxt_setup_backlight,
+ 	.enable = bxt_enable_backlight,
+ 	.disable = bxt_disable_backlight,
+@@ -2024,7 +2046,7 @@ static const struct intel_panel_bl_funcs bxt_funcs = {
+ 	.hz_to_pwm = bxt_hz_to_pwm,
+ };
+ 
+-static const struct intel_panel_bl_funcs cnp_funcs = {
++static const struct intel_panel_bl_funcs cnp_pwm_funcs = {
+ 	.setup = cnp_setup_backlight,
+ 	.enable = cnp_enable_backlight,
+ 	.disable = cnp_disable_backlight,
+@@ -2033,7 +2055,7 @@ static const struct intel_panel_bl_funcs cnp_funcs = {
+ 	.hz_to_pwm = cnp_hz_to_pwm,
+ };
+ 
+-static const struct intel_panel_bl_funcs lpt_funcs = {
++static const struct intel_panel_bl_funcs lpt_pwm_funcs = {
+ 	.setup = lpt_setup_backlight,
+ 	.enable = lpt_enable_backlight,
+ 	.disable = lpt_disable_backlight,
+@@ -2042,7 +2064,7 @@ static const struct intel_panel_bl_funcs lpt_funcs = {
+ 	.hz_to_pwm = lpt_hz_to_pwm,
+ };
+ 
+-static const struct intel_panel_bl_funcs spt_funcs = {
++static const struct intel_panel_bl_funcs spt_pwm_funcs = {
+ 	.setup = lpt_setup_backlight,
+ 	.enable = lpt_enable_backlight,
+ 	.disable = lpt_disable_backlight,
+@@ -2051,7 +2073,7 @@ static const struct intel_panel_bl_funcs spt_funcs = {
+ 	.hz_to_pwm = spt_hz_to_pwm,
+ };
+ 
+-static const struct intel_panel_bl_funcs pch_funcs = {
++static const struct intel_panel_bl_funcs pch_pwm_funcs = {
+ 	.setup = pch_setup_backlight,
+ 	.enable = pch_enable_backlight,
+ 	.disable = pch_disable_backlight,
+@@ -2068,7 +2090,7 @@ static const struct intel_panel_bl_funcs ext_pwm_funcs = {
+ 	.get = ext_pwm_get_backlight,
+ };
+ 
+-static const struct intel_panel_bl_funcs vlv_funcs = {
++static const struct intel_panel_bl_funcs vlv_pwm_funcs = {
+ 	.setup = vlv_setup_backlight,
+ 	.enable = vlv_enable_backlight,
+ 	.disable = vlv_disable_backlight,
+@@ -2077,7 +2099,7 @@ static const struct intel_panel_bl_funcs vlv_funcs = {
+ 	.hz_to_pwm = vlv_hz_to_pwm,
+ };
+ 
+-static const struct intel_panel_bl_funcs i965_funcs = {
++static const struct intel_panel_bl_funcs i965_pwm_funcs = {
+ 	.setup = i965_setup_backlight,
+ 	.enable = i965_enable_backlight,
+ 	.disable = i965_disable_backlight,
+@@ -2086,7 +2108,7 @@ static const struct intel_panel_bl_funcs i965_funcs = {
+ 	.hz_to_pwm = i965_hz_to_pwm,
+ };
+ 
+-static const struct intel_panel_bl_funcs i9xx_funcs = {
++static const struct intel_panel_bl_funcs i9xx_pwm_funcs = {
+ 	.setup = i9xx_setup_backlight,
+ 	.enable = i9xx_enable_backlight,
+ 	.disable = i9xx_disable_backlight,
+@@ -2095,6 +2117,14 @@ static const struct intel_panel_bl_funcs i9xx_funcs = {
+ 	.hz_to_pwm = i9xx_hz_to_pwm,
+ };
+ 
++static const struct intel_panel_bl_funcs pwm_bl_funcs = {
++	.setup = intel_pwm_setup_backlight,
++	.enable = intel_pwm_enable_backlight,
++	.disable = intel_pwm_disable_backlight,
++	.set = intel_pwm_set_backlight,
++	.get = intel_pwm_get_backlight,
++};
++
+ /* Set up chip specific backlight functions */
+ static void
+ intel_panel_init_backlight_funcs(struct intel_panel *panel)
+@@ -2112,27 +2142,30 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
+ 		return;
+ 
+ 	if (IS_GEN9_LP(dev_priv)) {
+-		panel->backlight.funcs = &bxt_funcs;
++		panel->backlight.pwm_funcs = &bxt_pwm_funcs;
+ 	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) {
+-		panel->backlight.funcs = &cnp_funcs;
++		panel->backlight.pwm_funcs = &cnp_pwm_funcs;
+ 	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) {
+ 		if (HAS_PCH_LPT(dev_priv))
+-			panel->backlight.funcs = &lpt_funcs;
++			panel->backlight.pwm_funcs = &lpt_pwm_funcs;
+ 		else
+-			panel->backlight.funcs = &spt_funcs;
++			panel->backlight.pwm_funcs = &spt_pwm_funcs;
+ 	} else if (HAS_PCH_SPLIT(dev_priv)) {
+-		panel->backlight.funcs = &pch_funcs;
++		panel->backlight.pwm_funcs = &pch_pwm_funcs;
+ 	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ 		if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
+-			panel->backlight.funcs = &ext_pwm_funcs;
++			panel->backlight.pwm_funcs = &ext_pwm_funcs;
+ 		} else {
+-			panel->backlight.funcs = &vlv_funcs;
++			panel->backlight.pwm_funcs = &vlv_pwm_funcs;
+ 		}
+ 	} else if (IS_GEN(dev_priv, 4)) {
+-		panel->backlight.funcs = &i965_funcs;
++		panel->backlight.pwm_funcs = &i965_pwm_funcs;
+ 	} else {
+-		panel->backlight.funcs = &i9xx_funcs;
++		panel->backlight.pwm_funcs = &i9xx_pwm_funcs;
+ 	}
++
++	/* We're using a standard PWM backlight interface */
++	panel->backlight.funcs = &pwm_bl_funcs;
+ }
+ 
+ enum drm_connector_status
+-- 
+2.29.2
+
diff --git a/0008-drm-i915-dp-Enable-Intel-s-HDR-backlight-interface-o.patch b/0008-drm-i915-dp-Enable-Intel-s-HDR-backlight-interface-o.patch
new file mode 100644
index 000000000000..988da7926b83
--- /dev/null
+++ b/0008-drm-i915-dp-Enable-Intel-s-HDR-backlight-interface-o.patch
@@ -0,0 +1,500 @@
+From 277eaac996d4b20f02143f77be23aa08c3473b5b Mon Sep 17 00:00:00 2001
+From: Lyude Paul <lyude@redhat.com>
+Date: Thu, 7 Jan 2021 17:52:05 -0500
+Subject: [PATCH 08/10] drm/i915/dp: Enable Intel's HDR backlight interface
+ (only SDR for now)
+
+So-recently a bunch of laptops on the market have started using DPCD
+backlight controls instead of the traditional DDI backlight controls.
+Originally we thought we had this handled by adding VESA backlight
+control support to i915, but the story ended up being a lot more
+complicated then that.
+
+Simply put-there's two main backlight interfaces Intel can see in the
+wild. Intel's proprietary HDR backlight interface, and the standard VESA
+backlight interface. Note that many panels have been observed to report
+support for both backlight interfaces, but testing has shown far more
+panels work with the Intel HDR backlight interface at the moment.
+Additionally, the VBT appears to be capable of reporting support for the
+VESA backlight interface but not the Intel HDR interface which needs to
+be probed by setting the right magic OUI.
+
+On top of that however, there's also actually two different variants of
+the Intel HDR backlight interface. The first uses the AUX channel for
+controlling the brightness of the screen in both SDR and HDR mode, and
+the second only uses the AUX channel for setting the brightness level in
+HDR mode - relying on PWM for setting the brightness level in SDR mode.
+
+For the time being we've been using EDIDs to maintain a list of quirks
+for panels that safely do support the VESA backlight interface. Adding
+support for Intel's HDR backlight interface in addition however, should
+finally allow us to auto-detect eDP backlight controls properly so long
+as we probe like so:
+
+* If the panel's VBT reports VESA backlight support, assume it really
+  does support it
+* If the panel's VBT reports DDI backlight controls:
+  * First probe for Intel's HDR backlight interface
+  * If that fails, probe for VESA's backlight interface
+  * If that fails, assume no DPCD backlight control
+* If the panel's VBT reports any other backlight type: just assume it
+  doesn't have DPCD backlight controls
+
+Changes since v4:
+* Fix checkpatch issues
+Changes since v3:
+* Stop using drm_device and use drm_i915_private instead
+* Don't forget to return from intel_dp_aux_hdr_get_backlight() if we fail
+  to read the current backlight mode from the DPCD
+* s/uint8_t/u8/
+* Remove unneeded parenthesis in intel_dp_aux_hdr_enable_backlight()
+* Use drm_dbg_kms() in intel_dp_aux_init_backlight_funcs()
+
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+Acked-by: Jani Nikula <jani.nikula@intel.com>
+Cc: thaytan@noraisin.net
+Cc: Vasily Khoruzhick <anarsoul@gmail.com>
+---
+ .../drm/i915/display/intel_display_types.h    |   9 +-
+ .../drm/i915/display/intel_dp_aux_backlight.c | 248 ++++++++++++++++--
+ drivers/gpu/drm/i915/display/intel_panel.c    |  42 ++-
+ drivers/gpu/drm/i915/display/intel_panel.h    |   4 +
+ 4 files changed, 271 insertions(+), 32 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
+index 1abdcc3f91b2..71b5d0cffe51 100644
+--- a/drivers/gpu/drm/i915/display/intel_display_types.h
++++ b/drivers/gpu/drm/i915/display/intel_display_types.h
+@@ -241,7 +241,14 @@ struct intel_panel {
+ 		struct pwm_state pwm_state;
+ 
+ 		/* DPCD backlight */
+-		u8 pwmgen_bit_count;
++		union {
++			struct {
++				u8 pwmgen_bit_count;
++			} vesa;
++			struct {
++				bool sdr_uses_aux;
++			} intel;
++		} edp;
+ 
+ 		struct backlight_device *device;
+ 
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+index 2271d75f946a..a3c95d611417 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+@@ -22,8 +22,26 @@
+  *
+  */
+ 
++/*
++ * Laptops with Intel GPUs which have panels that support controlling the
++ * backlight through DP AUX can actually use two different interfaces: Intel's
++ * proprietary DP AUX backlight interface, and the standard VESA backlight
++ * interface. Unfortunately, at the time of writing this a lot of laptops will
++ * advertise support for the standard VESA backlight interface when they
++ * don't properly support it. However, on these systems the Intel backlight
++ * interface generally does work properly. Additionally, these systems will
++ * usually just indicate that they use PWM backlight controls in their VBIOS
++ * for some reason.
++ */
++
+ #include "intel_display_types.h"
+ #include "intel_dp_aux_backlight.h"
++#include "intel_panel.h"
++
++/* TODO:
++ * Implement HDR, right now we just implement the bare minimum to bring us back into SDR mode so we
++ * can make people's backlights work in the mean time
++ */
+ 
+ /*
+  * DP AUX registers for Intel's proprietary HDR backlight interface. We define
+@@ -77,6 +95,179 @@
+ 
+ #define INTEL_EDP_BRIGHTNESS_OPTIMIZATION_1                            0x359
+ 
++/* Intel EDP backlight callbacks */
++static bool
++intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector)
++{
++	struct drm_i915_private *i915 = to_i915(connector->base.dev);
++	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
++	struct drm_dp_aux *aux = &intel_dp->aux;
++	struct intel_panel *panel = &connector->panel;
++	int ret;
++	u8 tcon_cap[4];
++
++	ret = drm_dp_dpcd_read(aux, INTEL_EDP_HDR_TCON_CAP0, tcon_cap, sizeof(tcon_cap));
++	if (ret < 0)
++		return false;
++
++	if (!(tcon_cap[1] & INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP))
++		return false;
++
++	if (tcon_cap[0] >= 1) {
++		drm_dbg_kms(&i915->drm, "Detected Intel HDR backlight interface version %d\n",
++			    tcon_cap[0]);
++	} else {
++		drm_dbg_kms(&i915->drm, "Detected unsupported HDR backlight interface version %d\n",
++			    tcon_cap[0]);
++		return false;
++	}
++
++	panel->backlight.edp.intel.sdr_uses_aux =
++		tcon_cap[2] & INTEL_EDP_SDR_TCON_BRIGHTNESS_AUX_CAP;
++
++	return true;
++}
++
++static u32
++intel_dp_aux_hdr_get_backlight(struct intel_connector *connector)
++{
++	struct drm_i915_private *i915 = to_i915(connector->base.dev);
++	struct intel_panel *panel = &connector->panel;
++	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
++	u8 tmp;
++	u8 buf[2] = { 0 };
++
++	if (drm_dp_dpcd_readb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &tmp) < 0) {
++		drm_err(&i915->drm, "Failed to read current backlight mode from DPCD\n");
++		return 0;
++	}
++
++	if (!(tmp & INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE)) {
++		if (!panel->backlight.edp.intel.sdr_uses_aux) {
++			u32 pwm_level = panel->backlight.pwm_funcs->get(connector);
++
++			return intel_panel_backlight_level_from_pwm(connector, pwm_level);
++		}
++
++		/* Assume 100% brightness if backlight controls aren't enabled yet */
++		return panel->backlight.max;
++	}
++
++	if (drm_dp_dpcd_read(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB, buf, sizeof(buf)) < 0) {
++		drm_err(&i915->drm, "Failed to read brightness from DPCD\n");
++		return 0;
++	}
++
++	return (buf[1] << 8 | buf[0]);
++}
++
++static void
++intel_dp_aux_hdr_set_aux_backlight(const struct drm_connector_state *conn_state, u32 level)
++{
++	struct intel_connector *connector = to_intel_connector(conn_state->connector);
++	struct drm_device *dev = connector->base.dev;
++	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
++	u8 buf[4] = { 0 };
++
++	buf[0] = level & 0xFF;
++	buf[1] = (level & 0xFF00) >> 8;
++
++	if (drm_dp_dpcd_write(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB, buf, 4) < 0)
++		drm_err(dev, "Failed to write brightness level to DPCD\n");
++}
++
++static void
++intel_dp_aux_hdr_set_backlight(const struct drm_connector_state *conn_state, u32 level)
++{
++	struct intel_connector *connector = to_intel_connector(conn_state->connector);
++	struct intel_panel *panel = &connector->panel;
++
++	if (panel->backlight.edp.intel.sdr_uses_aux) {
++		intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
++	} else {
++		const u32 pwm_level = intel_panel_backlight_level_to_pwm(connector, level);
++
++		intel_panel_set_pwm_level(conn_state, pwm_level);
++	}
++}
++
++static void
++intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state,
++				  const struct drm_connector_state *conn_state, u32 level)
++{
++	struct intel_connector *connector = to_intel_connector(conn_state->connector);
++	struct intel_panel *panel = &connector->panel;
++	struct drm_i915_private *i915 = to_i915(connector->base.dev);
++	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
++	int ret;
++	u8 old_ctrl, ctrl;
++
++	ret = drm_dp_dpcd_readb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &old_ctrl);
++	if (ret < 0) {
++		drm_err(&i915->drm, "Failed to read current backlight control mode: %d\n", ret);
++		return;
++	}
++
++	ctrl = old_ctrl;
++	if (panel->backlight.edp.intel.sdr_uses_aux) {
++		ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
++		intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
++	} else {
++		u32 pwm_level = intel_panel_backlight_level_to_pwm(connector, level);
++
++		panel->backlight.pwm_funcs->enable(crtc_state, conn_state, pwm_level);
++
++		ctrl &= ~INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
++	}
++
++	if (ctrl != old_ctrl)
++		if (drm_dp_dpcd_writeb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, ctrl) < 0)
++			drm_err(&i915->drm, "Failed to configure DPCD brightness controls\n");
++}
++
++static void
++intel_dp_aux_hdr_disable_backlight(const struct drm_connector_state *conn_state, u32 level)
++{
++	struct intel_connector *connector = to_intel_connector(conn_state->connector);
++	struct intel_panel *panel = &connector->panel;
++
++	/* Nothing to do for AUX based backlight controls */
++	if (panel->backlight.edp.intel.sdr_uses_aux)
++		return;
++
++	/* Note we want the actual pwm_level to be 0, regardless of pwm_min */
++	panel->backlight.pwm_funcs->disable(conn_state,
++					    intel_panel_sanitize_pwm_level(connector, 0));
++}
++
++static int
++intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pipe)
++{
++	struct drm_i915_private *i915 = to_i915(connector->base.dev);
++	struct intel_panel *panel = &connector->panel;
++	int ret;
++
++	if (panel->backlight.edp.intel.sdr_uses_aux) {
++		drm_dbg_kms(&i915->drm, "SDR backlight is controlled through DPCD\n");
++	} else {
++		drm_dbg_kms(&i915->drm, "SDR backlight is controlled through PWM\n");
++
++		ret = panel->backlight.pwm_funcs->setup(connector, pipe);
++		if (ret < 0) {
++			drm_err(&i915->drm,
++				"Failed to setup SDR backlight controls through PWM: %d\n", ret);
++			return ret;
++		}
++	}
++
++	panel->backlight.max = 512;
++	panel->backlight.min = 0;
++	panel->backlight.level = intel_dp_aux_hdr_get_backlight(connector);
++	panel->backlight.enabled = panel->backlight.level != 0;
++
++	return 0;
++}
++
+ /* VESA backlight callbacks */
+ static void set_vesa_backlight_enable(struct intel_dp *intel_dp, bool enable)
+ {
+@@ -195,7 +386,7 @@ static bool intel_dp_aux_vesa_set_pwm_freq(struct intel_connector *connector)
+ {
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	struct intel_dp *intel_dp = intel_attached_dp(connector);
+-	const u8 pn = connector->panel.backlight.pwmgen_bit_count;
++	const u8 pn = connector->panel.backlight.edp.vesa.pwmgen_bit_count;
+ 	int freq, fxp, f, fxp_actual, fxp_min, fxp_max;
+ 
+ 	freq = dev_priv->vbt.backlight.pwm_freq_hz;
+@@ -236,6 +427,7 @@ intel_dp_aux_vesa_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ 	struct intel_panel *panel = &connector->panel;
+ 	u8 dpcd_buf, new_dpcd_buf, edp_backlight_mode;
++	u8 pwmgen_bit_count = panel->backlight.edp.vesa.pwmgen_bit_count;
+ 
+ 	if (drm_dp_dpcd_readb(&intel_dp->aux,
+ 			DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) != 1) {
+@@ -256,7 +448,7 @@ intel_dp_aux_vesa_enable_backlight(const struct intel_crtc_state *crtc_state,
+ 
+ 		if (drm_dp_dpcd_writeb(&intel_dp->aux,
+ 				       DP_EDP_PWMGEN_BIT_COUNT,
+-				       panel->backlight.pwmgen_bit_count) < 0)
++				       pwmgen_bit_count) < 0)
+ 			drm_dbg_kms(&i915->drm,
+ 				    "Failed to write aux pwmgen bit count\n");
+ 
+@@ -364,7 +556,7 @@ static u32 intel_dp_aux_vesa_calc_max_backlight(struct intel_connector *connecto
+ 			    "Failed to write aux pwmgen bit count\n");
+ 		return max_backlight;
+ 	}
+-	panel->backlight.pwmgen_bit_count = pn;
++	panel->backlight.edp.vesa.pwmgen_bit_count = pn;
+ 
+ 	max_backlight = (1 << pn) - 1;
+ 
+@@ -406,6 +598,14 @@ intel_dp_aux_supports_vesa_backlight(struct intel_connector *connector)
+ 	return false;
+ }
+ 
++static const struct intel_panel_bl_funcs intel_dp_hdr_bl_funcs = {
++	.setup = intel_dp_aux_hdr_setup_backlight,
++	.enable = intel_dp_aux_hdr_enable_backlight,
++	.disable = intel_dp_aux_hdr_disable_backlight,
++	.set = intel_dp_aux_hdr_set_backlight,
++	.get = intel_dp_aux_hdr_get_backlight,
++};
++
+ static const struct intel_panel_bl_funcs intel_dp_vesa_bl_funcs = {
+ 	.setup = intel_dp_aux_vesa_setup_backlight,
+ 	.enable = intel_dp_aux_vesa_enable_backlight,
+@@ -414,36 +614,34 @@ static const struct intel_panel_bl_funcs intel_dp_vesa_bl_funcs = {
+ 	.get = intel_dp_aux_vesa_get_backlight,
+ };
+ 
+-int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
++int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
+ {
+-	struct intel_panel *panel = &intel_connector->panel;
+-	struct intel_dp *intel_dp = enc_to_intel_dp(intel_connector->encoder);
++	struct drm_device *dev = connector->base.dev;
++	struct intel_panel *panel = &connector->panel;
++	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
+ 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ 
+-	if (i915->params.enable_dpcd_backlight == 0 ||
+-	    !intel_dp_aux_supports_vesa_backlight(intel_connector))
++	if (i915->params.enable_dpcd_backlight == 0)
+ 		return -ENODEV;
+ 
+ 	/*
+-	 * There are a lot of machines that don't advertise the backlight
+-	 * control interface to use properly in their VBIOS, :\
++	 * A lot of eDP panels in the wild will report supporting both the
++	 * Intel proprietary backlight control interface, and the VESA
++	 * backlight control interface. Many of these panels are liars though,
++	 * and will only work with the Intel interface. So, always probe for
++	 * that first.
+ 	 */
+-	if (i915->vbt.backlight.type !=
+-	    INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE &&
+-	    i915->params.enable_dpcd_backlight != 1 &&
+-	    !drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,
+-			      DP_QUIRK_FORCE_DPCD_BACKLIGHT)) {
+-		drm_info(&i915->drm,
+-			 "Panel advertises DPCD backlight support, but "
+-			 "VBT disagrees. If your backlight controls "
+-			 "don't work try booting with "
+-			 "i915.enable_dpcd_backlight=1. If your machine "
+-			 "needs this, please file a _new_ bug report on "
+-			 "drm/i915, see " FDO_BUG_URL " for details.\n");
+-		return -ENODEV;
++	if (intel_dp_aux_supports_hdr_backlight(connector)) {
++		drm_dbg_kms(dev, "Using Intel proprietary eDP backlight controls\n");
++		panel->backlight.funcs = &intel_dp_hdr_bl_funcs;
++		return 0;
+ 	}
+ 
+-	panel->backlight.funcs = &intel_dp_vesa_bl_funcs;
++	if (intel_dp_aux_supports_vesa_backlight(connector)) {
++		drm_dbg_kms(dev, "Using VESA eDP backlight controls\n");
++		panel->backlight.funcs = &intel_dp_vesa_bl_funcs;
++		return 0;
++	}
+ 
+-	return 0;
++	return -ENODEV;
+ }
+diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
+index 8c99bf404a32..f4f3abac3ee4 100644
+--- a/drivers/gpu/drm/i915/display/intel_panel.c
++++ b/drivers/gpu/drm/i915/display/intel_panel.c
+@@ -511,7 +511,7 @@ static u32 scale_hw_to_user(struct intel_connector *connector,
+ 		     0, user_max);
+ }
+ 
+-static u32 intel_panel_sanitize_pwm_level(struct intel_connector *connector, u32 val)
++u32 intel_panel_sanitize_pwm_level(struct intel_connector *connector, u32 val)
+ {
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 	struct intel_panel *panel = &connector->panel;
+@@ -529,7 +529,7 @@ static u32 intel_panel_sanitize_pwm_level(struct intel_connector *connector, u32
+ 	return val;
+ }
+ 
+-static void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 val)
++void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 val)
+ {
+ 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+@@ -539,6 +539,36 @@ static void intel_panel_set_pwm_level(const struct drm_connector_state *conn_sta
+ 	panel->backlight.pwm_funcs->set(conn_state, val);
+ }
+ 
++u32 intel_panel_backlight_level_to_pwm(struct intel_connector *connector, u32 val)
++{
++	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
++	struct intel_panel *panel = &connector->panel;
++
++	drm_WARN_ON_ONCE(&dev_priv->drm,
++			 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0);
++
++	val = scale(val, panel->backlight.min, panel->backlight.max,
++		    panel->backlight.pwm_level_min, panel->backlight.pwm_level_max);
++
++	return intel_panel_sanitize_pwm_level(connector, val);
++}
++
++u32 intel_panel_backlight_level_from_pwm(struct intel_connector *connector, u32 val)
++{
++	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
++	struct intel_panel *panel = &connector->panel;
++
++	drm_WARN_ON_ONCE(&dev_priv->drm,
++			 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0);
++
++	if (dev_priv->params.invert_brightness > 0 ||
++	    (dev_priv->params.invert_brightness == 0 && dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS))
++		val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min);
++
++	return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max,
++		     panel->backlight.min, panel->backlight.max);
++}
++
+ static u32 lpt_get_backlight(struct intel_connector *connector)
+ {
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+@@ -2133,10 +2163,6 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
+ 		container_of(panel, struct intel_connector, panel);
+ 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ 
+-	if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
+-	    intel_dp_aux_init_backlight_funcs(connector) == 0)
+-		return;
+-
+ 	if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
+ 	    intel_dsi_dcs_init_backlight_funcs(connector) == 0)
+ 		return;
+@@ -2164,6 +2190,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
+ 		panel->backlight.pwm_funcs = &i9xx_pwm_funcs;
+ 	}
+ 
++	if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
++	    intel_dp_aux_init_backlight_funcs(connector) == 0)
++		return;
++
+ 	/* We're using a standard PWM backlight interface */
+ 	panel->backlight.funcs = &pwm_bl_funcs;
+ }
+diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
+index 5b813fe90557..a548347a975f 100644
+--- a/drivers/gpu/drm/i915/display/intel_panel.h
++++ b/drivers/gpu/drm/i915/display/intel_panel.h
+@@ -49,6 +49,10 @@ struct drm_display_mode *
+ intel_panel_edid_fixed_mode(struct intel_connector *connector);
+ struct drm_display_mode *
+ intel_panel_vbt_fixed_mode(struct intel_connector *connector);
++void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 level);
++u32 intel_panel_sanitize_pwm_level(struct intel_connector *connector, u32 level);
++u32 intel_panel_backlight_level_to_pwm(struct intel_connector *connector, u32 level);
++u32 intel_panel_backlight_level_from_pwm(struct intel_connector *connector, u32 val);
+ 
+ #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
+ int intel_backlight_device_register(struct intel_connector *connector);
+-- 
+2.29.2
+
diff --git a/0009-drm-i915-dp-Allow-forcing-specific-interfaces-throug.patch b/0009-drm-i915-dp-Allow-forcing-specific-interfaces-throug.patch
new file mode 100644
index 000000000000..ceabc4d155c9
--- /dev/null
+++ b/0009-drm-i915-dp-Allow-forcing-specific-interfaces-throug.patch
@@ -0,0 +1,123 @@
+From 31535cf7ec18fb70599b1331d3641020711637ec Mon Sep 17 00:00:00 2001
+From: Lyude Paul <lyude@redhat.com>
+Date: Thu, 7 Jan 2021 17:52:06 -0500
+Subject: [PATCH 09/10] drm/i915/dp: Allow forcing specific interfaces through
+ enable_dpcd_backlight
+
+Since we now support controlling panel backlights through DPCD using
+both the standard VESA interface, and Intel's proprietary HDR backlight
+interface, we should allow the user to be able to explicitly choose
+between one or the other in the event that we're wrong about panels
+reliably reporting support for the Intel HDR interface.
+
+So, this commit adds support for this by introducing two new
+enable_dpcd_backlight options: 2 which forces i915 to only probe for the
+VESA interface, and 3 which forces i915 to only probe for the Intel
+backlight interface (might be useful if we find panels in the wild that
+report the VESA interface in their VBT, but actually only support the
+Intel backlight interface).
+
+v3:
+* Rebase
+
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+Reviewed-by: Jani Nikula <jani.nikula@intel.com>
+Cc: thaytan@noraisin.net
+Cc: Vasily Khoruzhick <anarsoul@gmail.com>
+---
+ .../drm/i915/display/intel_dp_aux_backlight.c | 45 +++++++++++++++++--
+ drivers/gpu/drm/i915/i915_params.c            |  2 +-
+ 2 files changed, 43 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+index a3c95d611417..c9bcdddfdea1 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+@@ -614,15 +614,54 @@ static const struct intel_panel_bl_funcs intel_dp_vesa_bl_funcs = {
+ 	.get = intel_dp_aux_vesa_get_backlight,
+ };
+ 
++enum intel_dp_aux_backlight_modparam {
++	INTEL_DP_AUX_BACKLIGHT_AUTO = -1,
++	INTEL_DP_AUX_BACKLIGHT_OFF = 0,
++	INTEL_DP_AUX_BACKLIGHT_ON = 1,
++	INTEL_DP_AUX_BACKLIGHT_FORCE_VESA = 2,
++	INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL = 3,
++};
++
+ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
+ {
+ 	struct drm_device *dev = connector->base.dev;
+ 	struct intel_panel *panel = &connector->panel;
+ 	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
+ 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
++	bool try_intel_interface = false, try_vesa_interface = false;
+ 
+-	if (i915->params.enable_dpcd_backlight == 0)
++	/* Check the VBT and user's module parameters to figure out which
++	 * interfaces to probe
++	 */
++	switch (i915->params.enable_dpcd_backlight) {
++	case INTEL_DP_AUX_BACKLIGHT_OFF:
+ 		return -ENODEV;
++	case INTEL_DP_AUX_BACKLIGHT_AUTO:
++		switch (i915->vbt.backlight.type) {
++		case INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE:
++			try_vesa_interface = true;
++			break;
++		case INTEL_BACKLIGHT_DISPLAY_DDI:
++			try_intel_interface = true;
++			try_vesa_interface = true;
++			break;
++		default:
++			return -ENODEV;
++		}
++		break;
++	case INTEL_DP_AUX_BACKLIGHT_ON:
++		if (i915->vbt.backlight.type != INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE)
++			try_intel_interface = true;
++
++		try_vesa_interface = true;
++		break;
++	case INTEL_DP_AUX_BACKLIGHT_FORCE_VESA:
++		try_vesa_interface = true;
++		break;
++	case INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL:
++		try_intel_interface = true;
++		break;
++	}
+ 
+ 	/*
+ 	 * A lot of eDP panels in the wild will report supporting both the
+@@ -631,13 +670,13 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
+ 	 * and will only work with the Intel interface. So, always probe for
+ 	 * that first.
+ 	 */
+-	if (intel_dp_aux_supports_hdr_backlight(connector)) {
++	if (try_intel_interface && intel_dp_aux_supports_hdr_backlight(connector)) {
+ 		drm_dbg_kms(dev, "Using Intel proprietary eDP backlight controls\n");
+ 		panel->backlight.funcs = &intel_dp_hdr_bl_funcs;
+ 		return 0;
+ 	}
+ 
+-	if (intel_dp_aux_supports_vesa_backlight(connector)) {
++	if (try_vesa_interface && intel_dp_aux_supports_vesa_backlight(connector)) {
+ 		drm_dbg_kms(dev, "Using VESA eDP backlight controls\n");
+ 		panel->backlight.funcs = &intel_dp_vesa_bl_funcs;
+ 		return 0;
+diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
+index 7f139ea4a90b..6939634e56ed 100644
+--- a/drivers/gpu/drm/i915/i915_params.c
++++ b/drivers/gpu/drm/i915/i915_params.c
+@@ -185,7 +185,7 @@ i915_param_named_unsafe(inject_probe_failure, uint, 0400,
+ 
+ i915_param_named(enable_dpcd_backlight, int, 0400,
+ 	"Enable support for DPCD backlight control"
+-	"(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enabled)");
++	"(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
+ 
+ #if IS_ENABLED(CONFIG_DRM_I915_GVT)
+ i915_param_named(enable_gvt, bool, 0400,
+-- 
+2.29.2
+
diff --git a/0010-drm-dp-Revert-drm-dp-Introduce-EDID-based-quirks.patch b/0010-drm-dp-Revert-drm-dp-Introduce-EDID-based-quirks.patch
new file mode 100644
index 000000000000..723ffccadf0e
--- /dev/null
+++ b/0010-drm-dp-Revert-drm-dp-Introduce-EDID-based-quirks.patch
@@ -0,0 +1,309 @@
+From 500b98c21ad4998ba6389efac921e935743fce78 Mon Sep 17 00:00:00 2001
+From: Lyude Paul <lyude@redhat.com>
+Date: Thu, 7 Jan 2021 17:52:07 -0500
+Subject: [PATCH 10/10] drm/dp: Revert "drm/dp: Introduce EDID-based quirks"
+
+This reverts commit 0883ce8146ed6074c76399f4e70dbed788582e12. Originally
+these quirks were added because of the issues with using the eDP
+backlight interfaces on certain laptop panels, which made it impossible
+to properly probe for DPCD backlight support without having a whitelist
+for panels that we know have working VESA backlight control interfaces
+over DPCD. As well, it should be noted it was impossible to use the
+normal sink OUI for recognizing these panels as none of them actually
+filled out their OUIs, hence needing to resort to checking EDIDs.
+
+At the time we weren't really sure why certain panels had issues with
+DPCD backlight controls, but we eventually figured out that there was a
+second interface that these problematic laptop panels actually did work
+with and advertise properly: Intel's proprietary backlight interface for
+HDR panels. So far the testing we've done hasn't brought any panels to
+light that advertise this interface and don't support it properly, which
+means we finally have a real solution to this problem.
+
+As a result, we now have no need for the force DPCD backlight quirk, and
+furthermore this also removes the need for any kind of EDID quirk
+checking in DRM. So, let's just revert it for now since we were the only
+driver using this.
+
+v3:
+* Rebase
+v2:
+* Fix indenting error picked up by checkpatch in
+  intel_edp_init_connector()
+
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+Acked-by: Jani Nikula <jani.nikula@intel.com>
+Cc: thaytan@noraisin.net
+Cc: Vasily Khoruzhick <anarsoul@gmail.com>
+---
+ drivers/gpu/drm/drm_dp_helper.c               | 82 +------------------
+ drivers/gpu/drm/drm_dp_mst_topology.c         |  3 +-
+ .../drm/i915/display/intel_display_types.h    |  1 -
+ drivers/gpu/drm/i915/display/intel_dp.c       |  9 +-
+ drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 +-
+ drivers/gpu/drm/i915/display/intel_psr.c      |  2 +-
+ include/drm/drm_dp_helper.h                   | 21 +----
+ 7 files changed, 9 insertions(+), 112 deletions(-)
+
+diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
+index deeed73f4ed6..5172745a1434 100644
+--- a/drivers/gpu/drm/drm_dp_helper.c
++++ b/drivers/gpu/drm/drm_dp_helper.c
+@@ -1127,7 +1127,7 @@ bool drm_dp_read_sink_count_cap(struct drm_connector *connector,
+ 	return connector->connector_type != DRM_MODE_CONNECTOR_eDP &&
+ 		dpcd[DP_DPCD_REV] >= DP_DPCD_REV_11 &&
+ 		dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT &&
+-		!drm_dp_has_quirk(desc, 0, DP_DPCD_QUIRK_NO_SINK_COUNT);
++		!drm_dp_has_quirk(desc, DP_DPCD_QUIRK_NO_SINK_COUNT);
+ }
+ EXPORT_SYMBOL(drm_dp_read_sink_count_cap);
+ 
+@@ -1848,86 +1848,6 @@ drm_dp_get_quirks(const struct drm_dp_dpcd_ident *ident, bool is_branch)
+ #undef DEVICE_ID_ANY
+ #undef DEVICE_ID
+ 
+-struct edid_quirk {
+-	u8 mfg_id[2];
+-	u8 prod_id[2];
+-	u32 quirks;
+-};
+-
+-#define MFG(first, second) { (first), (second) }
+-#define PROD_ID(first, second) { (first), (second) }
+-
+-/*
+- * Some devices have unreliable OUIDs where they don't set the device ID
+- * correctly, and as a result we need to use the EDID for finding additional
+- * DP quirks in such cases.
+- */
+-static const struct edid_quirk edid_quirk_list[] = {
+-	/* Optional 4K AMOLED panel in the ThinkPad X1 Extreme 2nd Generation
+-	 * only supports DPCD backlight controls
+-	 */
+-	{ MFG(0x4c, 0x83), PROD_ID(0x41, 0x41), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) },
+-	/*
+-	 * Some Dell CML 2020 systems have panels support both AUX and PWM
+-	 * backlight control, and some only support AUX backlight control. All
+-	 * said panels start up in AUX mode by default, and we don't have any
+-	 * support for disabling HDR mode on these panels which would be
+-	 * required to switch to PWM backlight control mode (plus, I'm not
+-	 * even sure we want PWM backlight controls over DPCD backlight
+-	 * controls anyway...). Until we have a better way of detecting these,
+-	 * force DPCD backlight mode on all of them.
+-	 */
+-	{ MFG(0x06, 0xaf), PROD_ID(0x9b, 0x32), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) },
+-	{ MFG(0x06, 0xaf), PROD_ID(0xeb, 0x41), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) },
+-	{ MFG(0x4d, 0x10), PROD_ID(0xc7, 0x14), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) },
+-	{ MFG(0x4d, 0x10), PROD_ID(0xe6, 0x14), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) },
+-	{ MFG(0x4c, 0x83), PROD_ID(0x47, 0x41), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) },
+-};
+-
+-#undef MFG
+-#undef PROD_ID
+-
+-/**
+- * drm_dp_get_edid_quirks() - Check the EDID of a DP device to find additional
+- * DP-specific quirks
+- * @edid: The EDID to check
+- *
+- * While OUIDs are meant to be used to recognize a DisplayPort device, a lot
+- * of manufacturers don't seem to like following standards and neglect to fill
+- * the dev-ID in, making it impossible to only use OUIDs for determining
+- * quirks in some cases. This function can be used to check the EDID and look
+- * up any additional DP quirks. The bits returned by this function correspond
+- * to the quirk bits in &drm_dp_quirk.
+- *
+- * Returns: a bitmask of quirks, if any. The driver can check this using
+- * drm_dp_has_quirk().
+- */
+-u32 drm_dp_get_edid_quirks(const struct edid *edid)
+-{
+-	const struct edid_quirk *quirk;
+-	u32 quirks = 0;
+-	int i;
+-
+-	if (!edid)
+-		return 0;
+-
+-	for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
+-		quirk = &edid_quirk_list[i];
+-		if (memcmp(quirk->mfg_id, edid->mfg_id,
+-			   sizeof(edid->mfg_id)) == 0 &&
+-		    memcmp(quirk->prod_id, edid->prod_code,
+-			   sizeof(edid->prod_code)) == 0)
+-			quirks |= quirk->quirks;
+-	}
+-
+-	DRM_DEBUG_KMS("DP sink: EDID mfg %*phD prod-ID %*phD quirks: 0x%04x\n",
+-		      (int)sizeof(edid->mfg_id), edid->mfg_id,
+-		      (int)sizeof(edid->prod_code), edid->prod_code, quirks);
+-
+-	return quirks;
+-}
+-EXPORT_SYMBOL(drm_dp_get_edid_quirks);
+-
+ /**
+  * drm_dp_read_desc - read sink/branch descriptor from DPCD
+  * @aux: DisplayPort AUX channel
+diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
+index e87542533640..f21516142dd5 100644
+--- a/drivers/gpu/drm/drm_dp_mst_topology.c
++++ b/drivers/gpu/drm/drm_dp_mst_topology.c
+@@ -5824,8 +5824,7 @@ struct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct drm_dp_mst_port *port)
+ 	if (drm_dp_read_desc(port->mgr->aux, &desc, true))
+ 		return NULL;
+ 
+-	if (drm_dp_has_quirk(&desc, 0,
+-			     DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD) &&
++	if (drm_dp_has_quirk(&desc, DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD) &&
+ 	    port->mgr->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14 &&
+ 	    port->parent == port->mgr->mst_primary) {
+ 		u8 downstreamport;
+diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
+index 71b5d0cffe51..42d6461ebbfb 100644
+--- a/drivers/gpu/drm/i915/display/intel_display_types.h
++++ b/drivers/gpu/drm/i915/display/intel_display_types.h
+@@ -1312,7 +1312,6 @@ struct intel_dp {
+ 	int max_link_rate;
+ 	/* sink or branch descriptor */
+ 	struct drm_dp_desc desc;
+-	u32 edid_quirks;
+ 	struct drm_dp_aux aux;
+ 	u32 aux_busy_last_status;
+ 	u8 train_set[4];
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
+index 64ad6f8d1664..f2bf647aca0e 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp.c
++++ b/drivers/gpu/drm/i915/display/intel_dp.c
+@@ -162,8 +162,7 @@ static void intel_dp_set_sink_rates(struct intel_dp *intel_dp)
+ 	};
+ 	int i, max_rate;
+ 
+-	if (drm_dp_has_quirk(&intel_dp->desc, 0,
+-			     DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS)) {
++	if (drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS)) {
+ 		/* Needed, e.g., for Apple MBP 2017, 15 inch eDP Retina panel */
+ 		static const int quirk_rates[] = { 162000, 270000, 324000 };
+ 
+@@ -2698,8 +2697,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
+ 	struct intel_connector *intel_connector = intel_dp->attached_connector;
+ 	struct intel_digital_connector_state *intel_conn_state =
+ 		to_intel_digital_connector_state(conn_state);
+-	bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0,
+-					   DP_DPCD_QUIRK_CONSTANT_N);
++	bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
+ 	int ret = 0, output_bpp;
+ 
+ 	if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && port != PORT_A)
+@@ -6299,7 +6297,6 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
+ 	}
+ 
+ 	drm_dp_cec_set_edid(&intel_dp->aux, edid);
+-	intel_dp->edid_quirks = drm_dp_get_edid_quirks(edid);
+ }
+ 
+ static void
+@@ -6313,7 +6310,6 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
+ 
+ 	intel_dp->has_hdmi_sink = false;
+ 	intel_dp->has_audio = false;
+-	intel_dp->edid_quirks = 0;
+ 
+ 	intel_dp->dfp.max_bpc = 0;
+ 	intel_dp->dfp.max_dotclock = 0;
+@@ -7686,7 +7682,6 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
+ 	if (edid) {
+ 		if (drm_add_edid_modes(connector, edid)) {
+ 			drm_connector_update_edid_property(connector, edid);
+-			intel_dp->edid_quirks = drm_dp_get_edid_quirks(edid);
+ 		} else {
+ 			kfree(edid);
+ 			edid = ERR_PTR(-EINVAL);
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
+index 64d885539e94..c8b9ffa388cf 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
+@@ -52,8 +52,7 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
+ 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+ 	const struct drm_display_mode *adjusted_mode =
+ 		&crtc_state->hw.adjusted_mode;
+-	bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0,
+-					   DP_DPCD_QUIRK_CONSTANT_N);
++	bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
+ 	int bpp, slots = -EINVAL;
+ 
+ 	crtc_state->lane_count = limits->max_lane_count;
+diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
+index 40e9cb29233d..38140474b5cb 100644
+--- a/drivers/gpu/drm/i915/display/intel_psr.c
++++ b/drivers/gpu/drm/i915/display/intel_psr.c
+@@ -310,7 +310,7 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
+ 	drm_dbg_kms(&dev_priv->drm, "eDP panel supports PSR version %x\n",
+ 		    intel_dp->psr_dpcd[0]);
+ 
+-	if (drm_dp_has_quirk(&intel_dp->desc, 0, DP_DPCD_QUIRK_NO_PSR)) {
++	if (drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_PSR)) {
+ 		drm_dbg_kms(&dev_priv->drm,
+ 			    "PSR support not currently available for this panel\n");
+ 		return;
+diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
+index a53243abd945..a09a615fab19 100644
+--- a/include/drm/drm_dp_helper.h
++++ b/include/drm/drm_dp_helper.h
+@@ -1723,16 +1723,13 @@ struct drm_dp_desc {
+ 
+ int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc,
+ 		     bool is_branch);
+-u32 drm_dp_get_edid_quirks(const struct edid *edid);
+ 
+ /**
+  * enum drm_dp_quirk - Display Port sink/branch device specific quirks
+  *
+  * Display Port sink and branch devices in the wild have a variety of bugs, try
+  * to collect them here. The quirks are shared, but it's up to the drivers to
+- * implement workarounds for them. Note that because some devices have
+- * unreliable OUIDs, the EDID of sinks should also be checked for quirks using
+- * drm_dp_get_edid_quirks().
++ * implement workarounds for them.
+  */
+ enum drm_dp_quirk {
+ 	/**
+@@ -1764,16 +1761,6 @@ enum drm_dp_quirk {
+ 	 * The DSC caps can be read from the physical aux instead.
+ 	 */
+ 	DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD,
+-	/**
+-	 * @DP_QUIRK_FORCE_DPCD_BACKLIGHT:
+-	 *
+-	 * The device is telling the truth when it says that it uses DPCD
+-	 * backlight controls, even if the system's firmware disagrees. This
+-	 * quirk should be checked against both the ident and panel EDID.
+-	 * When present, the driver should honor the DPCD backlight
+-	 * capabilities advertised.
+-	 */
+-	DP_QUIRK_FORCE_DPCD_BACKLIGHT,
+ 	/**
+ 	 * @DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS:
+ 	 *
+@@ -1786,16 +1773,14 @@ enum drm_dp_quirk {
+ /**
+  * drm_dp_has_quirk() - does the DP device have a specific quirk
+  * @desc: Device descriptor filled by drm_dp_read_desc()
+- * @edid_quirks: Optional quirk bitmask filled by drm_dp_get_edid_quirks()
+  * @quirk: Quirk to query for
+  *
+  * Return true if DP device identified by @desc has @quirk.
+  */
+ static inline bool
+-drm_dp_has_quirk(const struct drm_dp_desc *desc, u32 edid_quirks,
+-		 enum drm_dp_quirk quirk)
++drm_dp_has_quirk(const struct drm_dp_desc *desc, enum drm_dp_quirk quirk)
+ {
+-	return (desc->quirks | edid_quirks) & BIT(quirk);
++	return desc->quirks & BIT(quirk);
+ }
+ 
+ #ifdef CONFIG_DRM_DP_CEC
+-- 
+2.29.2
+
diff --git a/PKGBUILD b/PKGBUILD
index 25edf160bb55..b5049e2de4b9 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -1,7 +1,7 @@
-# Maintainer: Jan Alexander Steffens (heftig) <jan.steffens@gmail.com>
+# Maintainer: Jan Alexander Steffens (heftig) <heftig@archlinux.org>
 
 pkgbase=linux-oled
-pkgver=5.9.12.arch1
+pkgver=5.10.6.arch1
 pkgrel=1
 pkgdesc='Linux'
 _srctag=v${pkgver%.*}-${pkgver##*.}
@@ -9,7 +9,7 @@ url="https://git.archlinux.org/linux.git/log/?h=$_srctag"
 arch=(x86_64)
 license=(GPL2)
 makedepends=(
-  bc kmod libelf pahole
+  bc kmod libelf pahole cpio perl tar xz
   xmlto python-sphinx python-sphinx_rtd_theme graphviz imagemagick
   git
 )
@@ -18,9 +18,16 @@ _srcname=archlinux-linux
 source=(
   "$_srcname::git+https://git.archlinux.org/linux.git?signed#tag=$_srctag"
   config         # the main kernel config file
-  sphinx-workaround.patch
-  0001-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch
-  0002-WIP-drm-i915-Enable-Intel-s-HDR-backlight-interface-.patch
+  0001-drm-i915-refactor-panel-backlight-control-functions..patch
+  0002-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch
+  0003-drm-i915-Rename-pwm_-backlight-callbacks-to-ext_pwm_.patch
+  0004-drm-i915-Pass-down-brightness-values-to-enable-disab.patch
+  0005-drm-i915-dp-Rename-eDP-VESA-backlight-interface-func.patch
+  0006-drm-i915-dp-Add-register-definitions-for-Intel-HDR-b.patch
+  0007-drm-i915-Keep-track-of-pwm-related-backlight-hooks-s.patch
+  0008-drm-i915-dp-Enable-Intel-s-HDR-backlight-interface-o.patch
+  0009-drm-i915-dp-Allow-forcing-specific-interfaces-throug.patch
+  0010-drm-dp-Revert-drm-dp-Introduce-EDID-based-quirks.patch
 )
 validpgpkeys=(
   'ABAF11C65A2970B130ABE3C479BE3E4300411886'  # Linus Torvalds
@@ -28,10 +35,17 @@ validpgpkeys=(
   'A2FF3A36AAA56654109064AB19802F8B0D70FC30'  # Jan Alexander Steffens (heftig)
 )
 sha256sums=('SKIP'
-            'cf69b81648a07ebedb274ed26bed3c4d2ff75c6665ecaca0a724b148c70c9c7c'
-            '8cb21e0b3411327b627a9dd15b8eb773295a0d2782b1a41b2a8839d1b2f5778c'
-            'c60c3040f90a28177a0b7718ebb85b4598d2087a3f7670be6102b0cf79a23598'
-            '12ff4aed41d3ad9a0a72124966ceeb96bb34404761221ad43bee2c810ceafe7d')
+            'd3e7adf5fcfc632887058ca84ca7b849a824dda5a03de854c8d3480ef0124ad1'
+            'aed42e89690d92c73d6ece35b3e54b19fd0762e5cfa6e6bd406977f81ff2dd11'
+            'bb4feb3fc811b12ad749737844c9e8c39e8d84db78a20db896f2cade230d8c9b'
+            '2e279912671ea24d3b69328116f42e7f67af592c445012cc095b5093416a8477'
+            '128eed03043ff4055ba50b0f242598524a69a2b8a046eae50f7a6fdeabeb6874'
+            'c6765d1a9a5c38dafc9b351e86cca3e3e59863ac29d8f129524a6062a0dceecb'
+            '52f85de724220f4794d137c5a1189d97fca48931a84e9accf732e01695358130'
+            'ca2b4bbe07efd45f0490bc85e657bd08e927f62455ad9f03068ffb884ac53c81'
+            '886896af41e87f4698cb3c0c49537055048e327d9a9b36303b8b8a682d46cf47'
+            '80924801f42c726a7884a3a8cbd039ad9ddbc57887c6a6f4303c3f310a312d63'
+            '3ca75bd291e6716c106e17f6efd370b41e773f7893f962143b9e84f1b79510b2')
 
 export KBUILD_BUILD_HOST=archlinux
 export KBUILD_BUILD_USER=$pkgbase
@@ -73,8 +87,8 @@ _package() {
   depends=(coreutils kmod initramfs)
   optdepends=('crda: to set the correct wireless channels of your country'
               'linux-firmware: firmware images needed for some devices')
-  provides=(VIRTUALBOX-GUEST-MODULES WIREGUARD-MODULE linux)
-  replaces=(virtualbox-guest-modules-arch wireguard-arch linux)
+  provides=(VIRTUALBOX-GUEST-MODULES WIREGUARD-MODULE)
+  replaces=(virtualbox-guest-modules-arch wireguard-arch)
 
   cd $_srcname
   local kernver="$(<version)"
diff --git a/config b/config
index c436de77b81d..3d8e59193b0f 100644
--- a/config
+++ b/config
@@ -1,12 +1,13 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/x86 5.9.11-arch2 Kernel Configuration
+# Linux/x86 5.10.6-arch1 Kernel Configuration
 #
 CONFIG_CC_VERSION_TEXT="gcc (GCC) 10.2.0"
 CONFIG_CC_IS_GCC=y
 CONFIG_GCC_VERSION=100200
 CONFIG_LD_VERSION=235010000
 CONFIG_CLANG_VERSION=0
+CONFIG_LLD_VERSION=0
 CONFIG_CC_CAN_LINK=y
 CONFIG_CC_CAN_LINK_STATIC=y
 CONFIG_CC_HAS_ASM_GOTO=y
@@ -59,6 +60,7 @@ CONFIG_GENERIC_IRQ_SHOW=y
 CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GENERIC_PENDING_IRQ=y
 CONFIG_GENERIC_IRQ_MIGRATION=y
+CONFIG_GENERIC_IRQ_INJECTION=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_GENERIC_IRQ_CHIP=y
 CONFIG_IRQ_DOMAIN=y
@@ -133,6 +135,7 @@ CONFIG_TREE_SRCU=y
 CONFIG_TASKS_RCU_GENERIC=y
 CONFIG_TASKS_RCU=y
 CONFIG_TASKS_RUDE_RCU=y
+CONFIG_TASKS_TRACE_RCU=y
 CONFIG_RCU_STALL_COMMON=y
 CONFIG_RCU_NEED_SEGCBLIST=y
 CONFIG_RCU_FANOUT=64
@@ -147,7 +150,7 @@ CONFIG_RCU_BOOST_DELAY=500
 CONFIG_BUILD_BIN2C=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
-# CONFIG_IKHEADERS is not set
+CONFIG_IKHEADERS=m
 CONFIG_LOG_BUF_SHIFT=17
 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
@@ -214,16 +217,17 @@ CONFIG_RD_ZSTD=y
 CONFIG_BOOT_CONFIG=y
 CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_LD_ORPHAN_WARN=y
 CONFIG_SYSCTL=y
 CONFIG_HAVE_UID16=y
 CONFIG_SYSCTL_EXCEPTION_TRACE=y
 CONFIG_HAVE_PCSPKR_PLATFORM=y
 CONFIG_BPF=y
-CONFIG_EXPERT=y
-# CONFIG_UID16 is not set
+# CONFIG_EXPERT is not set
+CONFIG_UID16=y
 CONFIG_MULTIUSER=y
 CONFIG_SGETMASK_SYSCALL=y
-# CONFIG_SYSFS_SYSCALL is not set
+CONFIG_SYSFS_SYSCALL=y
 CONFIG_FHANDLE=y
 CONFIG_POSIX_TIMERS=y
 CONFIG_PRINTK=y
@@ -253,13 +257,14 @@ CONFIG_BPF_SYSCALL=y
 CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y
 CONFIG_BPF_JIT_ALWAYS_ON=y
 CONFIG_BPF_JIT_DEFAULT_ON=y
+CONFIG_USERMODE_DRIVER=y
+CONFIG_BPF_PRELOAD=y
+CONFIG_BPF_PRELOAD_UMD=m
 CONFIG_USERFAULTFD=y
 CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
 CONFIG_RSEQ=y
-# CONFIG_DEBUG_RSEQ is not set
 # CONFIG_EMBEDDED is not set
 CONFIG_HAVE_PERF_EVENTS=y
-# CONFIG_PC104 is not set
 
 #
 # Kernel Performance Events And Counters
@@ -270,11 +275,9 @@ CONFIG_PERF_EVENTS=y
 
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLUB_DEBUG=y
-# CONFIG_SLUB_MEMCG_SYSFS_ON is not set
 # CONFIG_COMPAT_BRK is not set
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
-# CONFIG_SLOB is not set
 CONFIG_SLAB_MERGE_DEFAULT=y
 CONFIG_SLAB_FREELIST_RANDOM=y
 CONFIG_SLAB_FREELIST_HARDENED=y
@@ -377,7 +380,6 @@ CONFIG_X86_MINIMUM_CPU_FAMILY=64
 CONFIG_X86_DEBUGCTLMSR=y
 CONFIG_IA32_FEAT_CTL=y
 CONFIG_X86_VMX_FEATURE_NAMES=y
-CONFIG_PROCESSOR_SELECT=y
 CONFIG_CPU_SUP_INTEL=y
 CONFIG_CPU_SUP_AMD=y
 CONFIG_CPU_SUP_HYGON=y
@@ -386,7 +388,7 @@ CONFIG_CPU_SUP_ZHAOXIN=y
 CONFIG_HPET_TIMER=y
 CONFIG_HPET_EMULATE_RTC=y
 CONFIG_DMI=y
-CONFIG_GART_IOMMU=y
+# CONFIG_GART_IOMMU is not set
 # CONFIG_MAXSMP is not set
 CONFIG_NR_CPUS_RANGE_BEGIN=2
 CONFIG_NR_CPUS_RANGE_END=512
@@ -423,12 +425,12 @@ CONFIG_I8K=m
 CONFIG_MICROCODE=y
 CONFIG_MICROCODE_INTEL=y
 CONFIG_MICROCODE_AMD=y
-CONFIG_MICROCODE_OLD_INTERFACE=y
-CONFIG_X86_MSR=m
-CONFIG_X86_CPUID=m
+# CONFIG_MICROCODE_OLD_INTERFACE is not set
+CONFIG_X86_MSR=y
+CONFIG_X86_CPUID=y
 CONFIG_X86_5LEVEL=y
 CONFIG_X86_DIRECT_GBPAGES=y
-# CONFIG_X86_CPA_STATISTICS is not set
+CONFIG_X86_CPA_STATISTICS=y
 CONFIG_AMD_MEM_ENCRYPT=y
 # CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT is not set
 CONFIG_NUMA=y
@@ -439,7 +441,7 @@ CONFIG_NODES_SHIFT=5
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
 CONFIG_ARCH_SPARSEMEM_DEFAULT=y
 CONFIG_ARCH_SELECT_MEMORY_MODEL=y
-CONFIG_ARCH_MEMORY_PROBE=y
+# CONFIG_ARCH_MEMORY_PROBE is not set
 CONFIG_ARCH_PROC_KCORE_TEXT=y
 CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
 CONFIG_X86_PMEM_LEGACY_DEVICE=y
@@ -463,7 +465,6 @@ CONFIG_X86_INTEL_TSX_MODE_AUTO=y
 CONFIG_EFI=y
 CONFIG_EFI_STUB=y
 CONFIG_EFI_MIXED=y
-CONFIG_SECCOMP=y
 # CONFIG_HZ_100 is not set
 # CONFIG_HZ_250 is not set
 CONFIG_HZ_300=y
@@ -483,7 +484,7 @@ CONFIG_X86_NEED_RELOCS=y
 CONFIG_PHYSICAL_ALIGN=0x200000
 CONFIG_DYNAMIC_MEMORY_LAYOUT=y
 CONFIG_RANDOMIZE_MEMORY=y
-CONFIG_RANDOMIZE_MEMORY_PHYSICAL_PADDING=0x1
+CONFIG_RANDOMIZE_MEMORY_PHYSICAL_PADDING=0xa
 CONFIG_HOTPLUG_CPU=y
 # CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set
 # CONFIG_DEBUG_HOTPLUG_CPU0 is not set
@@ -511,30 +512,25 @@ CONFIG_ARCH_ENABLE_THP_MIGRATION=y
 CONFIG_ARCH_HIBERNATION_HEADER=y
 CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
-# CONFIG_SUSPEND_SKIP_SYNC is not set
 CONFIG_HIBERNATE_CALLBACKS=y
 CONFIG_HIBERNATION=y
 CONFIG_HIBERNATION_SNAPSHOT_DEV=y
 CONFIG_PM_STD_PARTITION=""
 CONFIG_PM_SLEEP=y
 CONFIG_PM_SLEEP_SMP=y
-CONFIG_PM_AUTOSLEEP=y
-CONFIG_PM_WAKELOCKS=y
-CONFIG_PM_WAKELOCKS_LIMIT=100
-CONFIG_PM_WAKELOCKS_GC=y
+# CONFIG_PM_AUTOSLEEP is not set
+# CONFIG_PM_WAKELOCKS is not set
 CONFIG_PM=y
 CONFIG_PM_DEBUG=y
-CONFIG_PM_ADVANCED_DEBUG=y
+# CONFIG_PM_ADVANCED_DEBUG is not set
 # CONFIG_PM_TEST_SUSPEND is not set
 CONFIG_PM_SLEEP_DEBUG=y
-# CONFIG_DPM_WATCHDOG is not set
 CONFIG_PM_TRACE=y
 CONFIG_PM_TRACE_RTC=y
 CONFIG_PM_CLK=y
 CONFIG_PM_GENERIC_DOMAINS=y
 CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
 CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
-CONFIG_PM_GENERIC_DOMAINS_OF=y
 CONFIG_ENERGY_MODEL=y
 CONFIG_ARCH_SUPPORTS_ACPI=y
 CONFIG_ACPI=y
@@ -546,11 +542,11 @@ CONFIG_ACPI_SPCR_TABLE=y
 CONFIG_ACPI_LPIT=y
 CONFIG_ACPI_SLEEP=y
 CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y
-CONFIG_ACPI_EC_DEBUGFS=y
-CONFIG_ACPI_AC=m
-CONFIG_ACPI_BATTERY=m
+CONFIG_ACPI_EC_DEBUGFS=m
+CONFIG_ACPI_AC=y
+CONFIG_ACPI_BATTERY=y
 CONFIG_ACPI_BUTTON=y
-CONFIG_ACPI_VIDEO=y
+CONFIG_ACPI_VIDEO=m
 CONFIG_ACPI_FAN=y
 CONFIG_ACPI_TAD=m
 CONFIG_ACPI_DOCK=y
@@ -561,7 +557,7 @@ CONFIG_ACPI_CPPC_LIB=y
 CONFIG_ACPI_PROCESSOR=y
 CONFIG_ACPI_IPMI=m
 CONFIG_ACPI_HOTPLUG_CPU=y
-CONFIG_ACPI_PROCESSOR_AGGREGATOR=y
+CONFIG_ACPI_PROCESSOR_AGGREGATOR=m
 CONFIG_ACPI_THERMAL=y
 CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y
 CONFIG_ACPI_TABLE_UPGRADE=y
@@ -574,7 +570,6 @@ CONFIG_ACPI_SBS=m
 CONFIG_ACPI_HED=y
 CONFIG_ACPI_CUSTOM_METHOD=m
 CONFIG_ACPI_BGRT=y
-# CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set
 CONFIG_ACPI_NFIT=m
 # CONFIG_NFIT_SECURITY_DEBUG is not set
 CONFIG_ACPI_NUMA=y
@@ -587,10 +582,13 @@ CONFIG_ACPI_APEI_PCIEAER=y
 CONFIG_ACPI_APEI_MEMORY_FAILURE=y
 CONFIG_ACPI_APEI_EINJ=m
 CONFIG_ACPI_APEI_ERST_DEBUG=m
+CONFIG_ACPI_DPTF=y
 CONFIG_DPTF_POWER=m
+CONFIG_DPTF_PCH_FIVR=m
 CONFIG_ACPI_WATCHDOG=y
 CONFIG_ACPI_EXTLOG=m
 CONFIG_ACPI_ADXL=y
+CONFIG_ACPI_CONFIGFS=m
 CONFIG_PMIC_OPREGION=y
 CONFIG_BYTCRC_PMIC_OPREGION=y
 CONFIG_CHTCRC_PMIC_OPREGION=y
@@ -598,10 +596,9 @@ CONFIG_XPOWER_PMIC_OPREGION=y
 CONFIG_BXT_WC_PMIC_OPREGION=y
 CONFIG_CHT_WC_PMIC_OPREGION=y
 CONFIG_CHT_DC_TI_PMIC_OPREGION=y
-CONFIG_ACPI_CONFIGFS=m
 CONFIG_TPS68470_PMIC_OPREGION=y
 CONFIG_X86_PM_TIMER=y
-CONFIG_SFI=y
+# CONFIG_SFI is not set
 
 #
 # CPU Frequency scaling
@@ -615,17 +612,15 @@ CONFIG_CPU_FREQ_STAT=y
 # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
 CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
 CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=m
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_CPU_FREQ_GOV_ONDEMAND=m
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
 
 #
 # CPU frequency scaling drivers
 #
-CONFIG_CPUFREQ_DT=m
-CONFIG_CPUFREQ_DT_PLATDEV=y
 CONFIG_X86_INTEL_PSTATE=y
 CONFIG_X86_PCC_CPUFREQ=m
 CONFIG_X86_ACPI_CPUFREQ=m
@@ -662,8 +657,6 @@ CONFIG_PCI_DIRECT=y
 CONFIG_PCI_MMCONFIG=y
 CONFIG_PCI_XEN=y
 CONFIG_MMCONF_FAM10H=y
-# CONFIG_PCI_CNB20LE_QUIRK is not set
-# CONFIG_ISA_BUS is not set
 CONFIG_ISA_DMA_API=y
 CONFIG_AMD_NB=y
 # CONFIG_X86_SYSFB is not set
@@ -687,7 +680,7 @@ CONFIG_EDD=m
 # CONFIG_EDD_OFF is not set
 CONFIG_FIRMWARE_MEMMAP=y
 CONFIG_DMIID=y
-CONFIG_DMI_SYSFS=m
+CONFIG_DMI_SYSFS=y
 CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y
 CONFIG_ISCSI_IBFT_FIND=y
 CONFIG_ISCSI_IBFT=m
@@ -707,11 +700,14 @@ CONFIG_GOOGLE_VPD=m
 #
 # CONFIG_EFI_VARS is not set
 CONFIG_EFI_ESRT=y
+CONFIG_EFI_VARS_PSTORE=y
+# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set
 CONFIG_EFI_RUNTIME_MAP=y
 # CONFIG_EFI_FAKE_MEMMAP is not set
 CONFIG_EFI_SOFT_RESERVE=y
 CONFIG_EFI_RUNTIME_WRAPPERS=y
 CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
+CONFIG_EFI_BOOTLOADER_CONTROL=m
 CONFIG_EFI_CAPSULE_LOADER=m
 # CONFIG_EFI_TEST is not set
 CONFIG_APPLE_PROPERTIES=y
@@ -725,6 +721,7 @@ CONFIG_UEFI_CPER=y
 CONFIG_UEFI_CPER_X86=y
 CONFIG_EFI_DEV_PATH_PARSER=y
 CONFIG_EFI_EARLYCON=y
+CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y
 
 #
 # Tegra firmware driver
@@ -749,7 +746,6 @@ CONFIG_HAVE_KVM_NO_POLL=y
 CONFIG_KVM_XFER_TO_GUEST_WORK=y
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM=m
-CONFIG_KVM_WERROR=y
 CONFIG_KVM_INTEL=m
 CONFIG_KVM_AMD=m
 CONFIG_KVM_AMD_SEV=y
@@ -773,6 +769,7 @@ CONFIG_OPROFILE_NMI_TIMER=y
 CONFIG_KPROBES=y
 CONFIG_JUMP_LABEL=y
 # CONFIG_STATIC_KEYS_SELFTEST is not set
+# CONFIG_STATIC_CALL_SELFTEST is not set
 CONFIG_OPTPROBES=y
 CONFIG_KPROBES_ON_FTRACE=y
 CONFIG_UPROBES=y
@@ -816,7 +813,9 @@ CONFIG_HAVE_CMPXCHG_LOCAL=y
 CONFIG_HAVE_CMPXCHG_DOUBLE=y
 CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
 CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y
+CONFIG_HAVE_ARCH_SECCOMP=y
 CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_SECCOMP=y
 CONFIG_SECCOMP_FILTER=y
 CONFIG_HAVE_ARCH_STACKLEAK=y
 CONFIG_HAVE_STACKPROTECTOR=y
@@ -857,6 +856,9 @@ CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
 CONFIG_ARCH_USE_MEMREMAP_PROT=y
 CONFIG_LOCK_EVENT_COUNTS=y
 CONFIG_ARCH_HAS_MEM_ENCRYPT=y
+CONFIG_HAVE_STATIC_CALL=y
+CONFIG_HAVE_STATIC_CALL_INLINE=y
+CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
 
 #
 # GCOV-based kernel profiling
@@ -867,7 +869,6 @@ CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
 
 CONFIG_HAVE_GCC_PLUGINS=y
 CONFIG_GCC_PLUGINS=y
-# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set
 # CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set
 # CONFIG_GCC_PLUGIN_RANDSTRUCT is not set
 # end of General architecture-dependent options
@@ -1030,7 +1031,10 @@ CONFIG_ARCH_WANTS_THP_SWAP=y
 CONFIG_THP_SWAP=y
 CONFIG_CLEANCACHE=y
 CONFIG_FRONTSWAP=y
-# CONFIG_CMA is not set
+CONFIG_CMA=y
+# CONFIG_CMA_DEBUG is not set
+CONFIG_CMA_DEBUGFS=y
+CONFIG_CMA_AREAS=7
 CONFIG_MEM_SOFT_DIRTY=y
 CONFIG_ZSWAP=y
 # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set
@@ -1049,7 +1053,6 @@ CONFIG_ZPOOL=y
 CONFIG_ZBUD=y
 CONFIG_Z3FOLD=y
 CONFIG_ZSMALLOC=y
-# CONFIG_ZSMALLOC_PGTABLE_MAPPING is not set
 # CONFIG_ZSMALLOC_STAT is not set
 CONFIG_GENERIC_EARLY_IOREMAP=y
 # CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
@@ -1059,6 +1062,7 @@ CONFIG_ZONE_DEVICE=y
 CONFIG_DEV_PAGEMAP_OPS=y
 CONFIG_HMM_MIRROR=y
 CONFIG_DEVICE_PRIVATE=y
+CONFIG_VMAP_PFN=y
 CONFIG_FRAME_VECTOR=y
 CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y
 CONFIG_ARCH_HAS_PKEYS=y
@@ -1080,17 +1084,18 @@ CONFIG_SKB_EXTENSIONS=y
 # Networking options
 #
 CONFIG_PACKET=y
-CONFIG_PACKET_DIAG=y
+CONFIG_PACKET_DIAG=m
 CONFIG_UNIX=y
 CONFIG_UNIX_SCM=y
-CONFIG_UNIX_DIAG=y
+CONFIG_UNIX_DIAG=m
 CONFIG_TLS=m
 CONFIG_TLS_DEVICE=y
 # CONFIG_TLS_TOE is not set
 CONFIG_XFRM=y
 CONFIG_XFRM_OFFLOAD=y
-CONFIG_XFRM_ALGO=m
-CONFIG_XFRM_USER=m
+CONFIG_XFRM_ALGO=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_USER_COMPAT is not set
 CONFIG_XFRM_INTERFACE=m
 CONFIG_XFRM_SUB_POLICY=y
 CONFIG_XFRM_MIGRATE=y
@@ -1104,11 +1109,11 @@ CONFIG_XFRM_ESPINTCP=y
 CONFIG_SMC=m
 CONFIG_SMC_DIAG=m
 CONFIG_XDP_SOCKETS=y
-CONFIG_XDP_SOCKETS_DIAG=y
+CONFIG_XDP_SOCKETS_DIAG=m
 CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
 CONFIG_IP_ADVANCED_ROUTER=y
-# CONFIG_IP_FIB_TRIE_STATS is not set
+CONFIG_IP_FIB_TRIE_STATS=y
 CONFIG_IP_MULTIPLE_TABLES=y
 CONFIG_IP_ROUTE_MULTIPATH=y
 CONFIG_IP_ROUTE_VERBOSE=y
@@ -1118,7 +1123,7 @@ CONFIG_NET_IPIP=m
 CONFIG_NET_IPGRE_DEMUX=m
 CONFIG_NET_IP_TUNNEL=m
 CONFIG_NET_IPGRE=m
-# CONFIG_NET_IPGRE_BROADCAST is not set
+CONFIG_NET_IPGRE_BROADCAST=y
 CONFIG_IP_MROUTE_COMMON=y
 CONFIG_IP_MROUTE=y
 CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
@@ -1552,24 +1557,7 @@ CONFIG_BRIDGE_EBT_SNAT=m
 CONFIG_BRIDGE_EBT_LOG=m
 CONFIG_BRIDGE_EBT_NFLOG=m
 # CONFIG_BPFILTER is not set
-CONFIG_IP_DCCP=m
-CONFIG_INET_DCCP_DIAG=m
-
-#
-# DCCP CCIDs Configuration
-#
-# CONFIG_IP_DCCP_CCID2_DEBUG is not set
-CONFIG_IP_DCCP_CCID3=y
-# CONFIG_IP_DCCP_CCID3_DEBUG is not set
-CONFIG_IP_DCCP_TFRC_LIB=y
-# end of DCCP CCIDs Configuration
-
-#
-# DCCP Kernel Hacking
-#
-# CONFIG_IP_DCCP_DEBUG is not set
-# end of DCCP Kernel Hacking
-
+# CONFIG_IP_DCCP is not set
 CONFIG_IP_SCTP=m
 # CONFIG_SCTP_DBG_OBJCNT is not set
 # CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5 is not set
@@ -1595,7 +1583,7 @@ CONFIG_ATM_MPOA=m
 CONFIG_ATM_BR2684=m
 # CONFIG_ATM_BR2684_IPFILTER is not set
 CONFIG_L2TP=m
-# CONFIG_L2TP_DEBUGFS is not set
+CONFIG_L2TP_DEBUGFS=m
 CONFIG_L2TP_V3=y
 CONFIG_L2TP_IP=m
 CONFIG_L2TP_ETH=m
@@ -1638,7 +1626,7 @@ CONFIG_IPDDP_ENCAP=y
 # CONFIG_LAPB is not set
 CONFIG_PHONET=m
 CONFIG_6LOWPAN=m
-# CONFIG_6LOWPAN_DEBUGFS is not set
+CONFIG_6LOWPAN_DEBUGFS=y
 CONFIG_6LOWPAN_NHC=m
 CONFIG_6LOWPAN_NHC_DEST=m
 CONFIG_6LOWPAN_NHC_FRAGMENT=m
@@ -1843,6 +1831,7 @@ CONFIG_CAN_RAW=m
 CONFIG_CAN_BCM=m
 CONFIG_CAN_GW=m
 CONFIG_CAN_J1939=m
+CONFIG_CAN_ISOTP=m
 
 #
 # CAN Device Drivers
@@ -1852,8 +1841,6 @@ CONFIG_CAN_VXCAN=m
 CONFIG_CAN_SLCAN=m
 CONFIG_CAN_DEV=m
 CONFIG_CAN_CALC_BITTIMING=y
-CONFIG_CAN_FLEXCAN=m
-CONFIG_CAN_GRCAN=m
 CONFIG_CAN_JANZ_ICAN3=m
 CONFIG_CAN_KVASER_PCIEFD=m
 CONFIG_CAN_C_CAN=m
@@ -1886,6 +1873,8 @@ CONFIG_CAN_SOFTING_CS=m
 #
 CONFIG_CAN_HI311X=m
 CONFIG_CAN_MCP251X=m
+CONFIG_CAN_MCP251XFD=m
+# CONFIG_CAN_MCP251XFD_SANITY is not set
 # end of CAN SPI interfaces
 
 #
@@ -1980,7 +1969,6 @@ CONFIG_WEXT_PRIV=y
 CONFIG_CFG80211=m
 # CONFIG_NL80211_TESTMODE is not set
 # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
-# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
 CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y
 CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y
 CONFIG_CFG80211_DEFAULT_PS=y
@@ -2015,10 +2003,7 @@ CONFIG_NET_9P_VIRTIO=m
 CONFIG_NET_9P_XEN=m
 CONFIG_NET_9P_RDMA=m
 # CONFIG_NET_9P_DEBUG is not set
-CONFIG_CAIF=m
-# CONFIG_CAIF_DEBUG is not set
-CONFIG_CAIF_NETDEV=m
-CONFIG_CAIF_USB=m
+# CONFIG_CAIF is not set
 CONFIG_CEPH_LIB=m
 CONFIG_CEPH_LIB_PRETTYDEBUG=y
 CONFIG_CEPH_LIB_USE_DNS_RESOLVER=y
@@ -2091,7 +2076,7 @@ CONFIG_PCI_DOMAINS=y
 CONFIG_PCIEPORTBUS=y
 CONFIG_HOTPLUG_PCI_PCIE=y
 CONFIG_PCIEAER=y
-# CONFIG_PCIEAER_INJECT is not set
+CONFIG_PCIEAER_INJECT=m
 CONFIG_PCIE_ECRC=y
 CONFIG_PCIEASPM=y
 CONFIG_PCIEASPM_DEFAULT=y
@@ -2107,12 +2092,11 @@ CONFIG_PCI_MSI=y
 CONFIG_PCI_MSI_IRQ_DOMAIN=y
 CONFIG_PCI_QUIRKS=y
 # CONFIG_PCI_DEBUG is not set
-CONFIG_PCI_REALLOC_ENABLE_AUTO=y
+# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
 CONFIG_PCI_STUB=y
 CONFIG_PCI_PF_STUB=m
 CONFIG_XEN_PCIDEV_FRONTEND=m
 CONFIG_PCI_ATS=y
-CONFIG_PCI_ECAM=y
 CONFIG_PCI_LOCKLESS_CONFIG=y
 CONFIG_PCI_IOV=y
 CONFIG_PCI_PRI=y
@@ -2131,10 +2115,6 @@ CONFIG_HOTPLUG_PCI_SHPC=y
 #
 # PCI controller drivers
 #
-CONFIG_PCI_FTPCI100=y
-CONFIG_PCI_HOST_COMMON=y
-CONFIG_PCI_HOST_GENERIC=y
-CONFIG_PCIE_XILINX=y
 CONFIG_VMD=m
 CONFIG_PCI_HYPERV_INTERFACE=m
 
@@ -2143,11 +2123,8 @@ CONFIG_PCI_HYPERV_INTERFACE=m
 #
 CONFIG_PCIE_DW=y
 CONFIG_PCIE_DW_HOST=y
-CONFIG_PCIE_DW_EP=y
 CONFIG_PCIE_DW_PLAT=y
 CONFIG_PCIE_DW_PLAT_HOST=y
-CONFIG_PCIE_DW_PLAT_EP=y
-CONFIG_PCIE_INTEL_GW=y
 CONFIG_PCI_MESON=y
 # end of DesignWare PCI Core Support
 
@@ -2159,24 +2136,13 @@ CONFIG_PCI_MESON=y
 #
 # Cadence PCIe controllers support
 #
-CONFIG_PCIE_CADENCE=y
-CONFIG_PCIE_CADENCE_HOST=y
-CONFIG_PCIE_CADENCE_EP=y
-CONFIG_PCIE_CADENCE_PLAT=y
-CONFIG_PCIE_CADENCE_PLAT_HOST=y
-CONFIG_PCIE_CADENCE_PLAT_EP=y
-CONFIG_PCI_J721E=y
-CONFIG_PCI_J721E_HOST=y
-CONFIG_PCI_J721E_EP=y
 # end of Cadence PCIe controllers support
 # end of PCI controller drivers
 
 #
 # PCI Endpoint
 #
-CONFIG_PCI_ENDPOINT=y
-CONFIG_PCI_ENDPOINT_CONFIGFS=y
-# CONFIG_PCI_EPF_TEST is not set
+# CONFIG_PCI_ENDPOINT is not set
 # end of PCI Endpoint
 
 #
@@ -2202,25 +2168,7 @@ CONFIG_YENTA_TOSHIBA=y
 CONFIG_PD6729=m
 CONFIG_I82092=m
 CONFIG_PCCARD_NONSTATIC=y
-CONFIG_RAPIDIO=m
-CONFIG_RAPIDIO_TSI721=m
-CONFIG_RAPIDIO_DISC_TIMEOUT=30
-CONFIG_RAPIDIO_ENABLE_RX_TX_PORTS=y
-CONFIG_RAPIDIO_DMA_ENGINE=y
-# CONFIG_RAPIDIO_DEBUG is not set
-CONFIG_RAPIDIO_ENUM_BASIC=m
-CONFIG_RAPIDIO_CHMAN=m
-CONFIG_RAPIDIO_MPORT_CDEV=m
-
-#
-# RapidIO Switch drivers
-#
-CONFIG_RAPIDIO_TSI57X=m
-CONFIG_RAPIDIO_CPS_XX=m
-CONFIG_RAPIDIO_TSI568=m
-CONFIG_RAPIDIO_CPS_GEN2=m
-CONFIG_RAPIDIO_RXS_GEN3=m
-# end of RapidIO Switch drivers
+# CONFIG_RAPIDIO is not set
 
 #
 # Generic Driver Options
@@ -2257,13 +2205,12 @@ CONFIG_REGMAP=y
 CONFIG_REGMAP_I2C=y
 CONFIG_REGMAP_SLIMBUS=m
 CONFIG_REGMAP_SPI=y
-CONFIG_REGMAP_SPMI=m
 CONFIG_REGMAP_W1=m
 CONFIG_REGMAP_MMIO=y
 CONFIG_REGMAP_IRQ=y
 CONFIG_REGMAP_SOUNDWIRE=m
 CONFIG_REGMAP_SCCB=m
-CONFIG_REGMAP_I3C=m
+CONFIG_REGMAP_SPI_AVMM=m
 CONFIG_DMA_SHARED_BUFFER=y
 # CONFIG_DMA_FENCE_TRACE is not set
 # end of Generic Driver Options
@@ -2271,9 +2218,8 @@ CONFIG_DMA_SHARED_BUFFER=y
 #
 # Bus devices
 #
-CONFIG_MOXTET=m
-CONFIG_SIMPLE_PM_BUS=y
 CONFIG_MHI_BUS=m
+# CONFIG_MHI_BUS_DEBUG is not set
 # end of Bus devices
 
 CONFIG_CONNECTOR=y
@@ -2284,18 +2230,14 @@ CONFIG_GNSS_MTK_SERIAL=m
 CONFIG_GNSS_SIRF_SERIAL=m
 CONFIG_GNSS_UBX_SERIAL=m
 CONFIG_MTD=m
-CONFIG_MTD_TESTS=m
+# CONFIG_MTD_TESTS is not set
 
 #
 # Partition parsers
 #
-CONFIG_MTD_AR7_PARTS=m
-CONFIG_MTD_CMDLINE_PARTS=m
-CONFIG_MTD_OF_PARTS=m
-CONFIG_MTD_REDBOOT_PARTS=m
-CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
-# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
-# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_AR7_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
 # end of Partition parsers
 
 #
@@ -2303,164 +2245,109 @@ CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
 #
 CONFIG_MTD_BLKDEVS=m
 CONFIG_MTD_BLOCK=m
-CONFIG_MTD_BLOCK_RO=m
-CONFIG_FTL=m
-CONFIG_NFTL=m
-CONFIG_NFTL_RW=y
-CONFIG_INFTL=m
-CONFIG_RFD_FTL=m
-CONFIG_SSFDC=m
-CONFIG_SM_FTL=m
-CONFIG_MTD_OOPS=m
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
 CONFIG_MTD_PSTORE=m
-CONFIG_MTD_SWAP=m
-CONFIG_MTD_PARTITIONED_MASTER=y
+# CONFIG_MTD_SWAP is not set
+# CONFIG_MTD_PARTITIONED_MASTER is not set
 
 #
 # RAM/ROM/Flash chip drivers
 #
-CONFIG_MTD_CFI=m
-CONFIG_MTD_JEDECPROBE=m
-CONFIG_MTD_GEN_PROBE=m
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
 CONFIG_MTD_MAP_BANK_WIDTH_1=y
 CONFIG_MTD_MAP_BANK_WIDTH_2=y
 CONFIG_MTD_MAP_BANK_WIDTH_4=y
 CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
-CONFIG_MTD_CFI_INTELEXT=m
-CONFIG_MTD_CFI_AMDSTD=m
-CONFIG_MTD_CFI_STAA=m
-CONFIG_MTD_CFI_UTIL=m
-CONFIG_MTD_RAM=m
-CONFIG_MTD_ROM=m
-CONFIG_MTD_ABSENT=m
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
 # end of RAM/ROM/Flash chip drivers
 
 #
 # Mapping drivers for chip access
 #
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PHYSMAP=m
-# CONFIG_MTD_PHYSMAP_COMPAT is not set
-CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_MTD_PHYSMAP_VERSATILE=y
-CONFIG_MTD_PHYSMAP_GEMINI=y
-CONFIG_MTD_PHYSMAP_GPIO_ADDR=y
-CONFIG_MTD_SBC_GXX=m
-CONFIG_MTD_AMD76XROM=m
-CONFIG_MTD_ICHXROM=m
-CONFIG_MTD_ESB2ROM=m
-CONFIG_MTD_CK804XROM=m
-CONFIG_MTD_SCB2_FLASH=m
-CONFIG_MTD_NETtel=m
-CONFIG_MTD_L440GX=m
-CONFIG_MTD_PCI=m
-CONFIG_MTD_PCMCIA=m
-# CONFIG_MTD_PCMCIA_ANONYMOUS is not set
-CONFIG_MTD_INTEL_VR_NOR=m
-CONFIG_MTD_PLATRAM=m
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
 # end of Mapping drivers for chip access
 
 #
 # Self-contained MTD device drivers
 #
-CONFIG_MTD_PMC551=m
-# CONFIG_MTD_PMC551_BUGFIX is not set
-# CONFIG_MTD_PMC551_DEBUG is not set
-CONFIG_MTD_DATAFLASH=m
-# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
-CONFIG_MTD_DATAFLASH_OTP=y
-CONFIG_MTD_MCHP23K256=m
-CONFIG_MTD_SST25L=m
-CONFIG_MTD_SLRAM=m
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_MCHP23K256 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
 CONFIG_MTD_PHRAM=m
-CONFIG_MTD_MTDRAM=m
-CONFIG_MTDRAM_TOTAL_SIZE=4096
-CONFIG_MTDRAM_ERASE_SIZE=128
+# CONFIG_MTD_MTDRAM is not set
 CONFIG_MTD_BLOCK2MTD=m
 
 #
 # Disk-On-Chip Device Drivers
 #
-CONFIG_MTD_DOCG3=m
-CONFIG_BCH_CONST_M=14
-CONFIG_BCH_CONST_T=4
+# CONFIG_MTD_DOCG3 is not set
 # end of Self-contained MTD device drivers
 
 #
 # NAND
 #
 CONFIG_MTD_NAND_CORE=m
-CONFIG_MTD_ONENAND=m
-# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set
-CONFIG_MTD_ONENAND_GENERIC=m
-CONFIG_MTD_ONENAND_OTP=y
-CONFIG_MTD_ONENAND_2X_PROGRAM=y
+# CONFIG_MTD_ONENAND is not set
 CONFIG_MTD_NAND_ECC_SW_HAMMING=m
 CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC=y
 CONFIG_MTD_RAW_NAND=m
-CONFIG_MTD_NAND_ECC_SW_BCH=y
+# CONFIG_MTD_NAND_ECC_SW_BCH is not set
 
 #
 # Raw/parallel NAND flash controllers
 #
-CONFIG_MTD_NAND_DENALI=m
-CONFIG_MTD_NAND_DENALI_PCI=m
-CONFIG_MTD_NAND_DENALI_DT=m
-CONFIG_MTD_NAND_CAFE=m
-CONFIG_MTD_NAND_MXIC=m
-CONFIG_MTD_NAND_GPIO=m
-CONFIG_MTD_NAND_PLATFORM=m
-CONFIG_MTD_NAND_CADENCE=m
-CONFIG_MTD_NAND_ARASAN=m
+# CONFIG_MTD_NAND_DENALI_PCI is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_MXIC is not set
+# CONFIG_MTD_NAND_GPIO is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_NAND_ARASAN is not set
 
 #
 # Misc
 #
-CONFIG_MTD_SM_COMMON=m
 CONFIG_MTD_NAND_NANDSIM=m
-CONFIG_MTD_NAND_RICOH=m
-CONFIG_MTD_NAND_DISKONCHIP=m
-# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
-CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
-CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y
-CONFIG_MTD_SPI_NAND=m
+# CONFIG_MTD_NAND_RICOH is not set
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_SPI_NAND is not set
+
+#
+# ECC engine support
+#
+CONFIG_MTD_NAND_ECC=y
+# end of ECC engine support
 # end of NAND
 
 #
 # LPDDR & LPDDR2 PCM memory drivers
 #
-CONFIG_MTD_LPDDR=m
-CONFIG_MTD_QINFO_PROBE=m
+# CONFIG_MTD_LPDDR is not set
 # end of LPDDR & LPDDR2 PCM memory drivers
 
-CONFIG_MTD_SPI_NOR=m
-CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
-CONFIG_SPI_INTEL_SPI=m
-CONFIG_SPI_INTEL_SPI_PCI=m
-CONFIG_SPI_INTEL_SPI_PLATFORM=m
+# CONFIG_MTD_SPI_NOR is not set
 CONFIG_MTD_UBI=m
 CONFIG_MTD_UBI_WL_THRESHOLD=4096
 CONFIG_MTD_UBI_BEB_LIMIT=20
-CONFIG_MTD_UBI_FASTMAP=y
-CONFIG_MTD_UBI_GLUEBI=m
-CONFIG_MTD_UBI_BLOCK=y
-CONFIG_MTD_HYPERBUS=m
-CONFIG_DTC=y
-CONFIG_OF=y
-# CONFIG_OF_UNITTEST is not set
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_KOBJ=y
-CONFIG_OF_DYNAMIC=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_NET=y
-CONFIG_OF_MDIO=m
-CONFIG_OF_RESERVED_MEM=y
-CONFIG_OF_RESOLVE=y
-CONFIG_OF_OVERLAY=y
+# CONFIG_MTD_UBI_FASTMAP is not set
+# CONFIG_MTD_UBI_GLUEBI is not set
+# CONFIG_MTD_UBI_BLOCK is not set
+# CONFIG_MTD_HYPERBUS is not set
+# CONFIG_OF is not set
 CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
 CONFIG_PARPORT=m
 CONFIG_PARPORT_PC=m
@@ -2479,7 +2366,7 @@ CONFIG_PNP_DEBUG_MESSAGES=y
 #
 CONFIG_PNPACPI=y
 CONFIG_BLK_DEV=y
-# CONFIG_BLK_DEV_NULL_BLK is not set
+CONFIG_BLK_DEV_NULL_BLK=m
 CONFIG_BLK_DEV_FD=m
 CONFIG_CDROM=m
 # CONFIG_PARIDE is not set
@@ -2489,7 +2376,7 @@ CONFIG_ZRAM_WRITEBACK=y
 # CONFIG_ZRAM_MEMORY_TRACKING is not set
 CONFIG_BLK_DEV_UMEM=m
 CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=0
 CONFIG_BLK_DEV_CRYPTOLOOP=m
 CONFIG_BLK_DEV_DRBD=m
 # CONFIG_DRBD_FAULT_INJECTION is not set
@@ -2595,20 +2482,6 @@ CONFIG_INTEL_MEI_ME=m
 CONFIG_INTEL_MEI_TXE=m
 CONFIG_INTEL_MEI_HDCP=m
 CONFIG_VMWARE_VMCI=m
-
-#
-# Intel MIC & related support
-#
-CONFIG_INTEL_MIC_BUS=m
-CONFIG_SCIF_BUS=m
-CONFIG_VOP_BUS=m
-CONFIG_INTEL_MIC_HOST=m
-CONFIG_INTEL_MIC_CARD=m
-CONFIG_SCIF=m
-CONFIG_MIC_COSM=m
-CONFIG_VOP=m
-# end of Intel MIC & related support
-
 CONFIG_GENWQE=m
 CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY=0
 CONFIG_ECHO=m
@@ -2792,8 +2665,6 @@ CONFIG_SATA_PMP=y
 CONFIG_SATA_AHCI=y
 CONFIG_SATA_MOBILE_LPM_POLICY=3
 CONFIG_SATA_AHCI_PLATFORM=m
-CONFIG_AHCI_CEVA=m
-CONFIG_AHCI_QORIQ=m
 CONFIG_SATA_INIC162X=m
 CONFIG_SATA_ACARD_AHCI=m
 CONFIG_SATA_SIL24=m
@@ -2870,7 +2741,6 @@ CONFIG_PATA_MPIIX=m
 CONFIG_PATA_NS87410=m
 CONFIG_PATA_OPTI=m
 CONFIG_PATA_PCMCIA=m
-# CONFIG_PATA_PLATFORM is not set
 CONFIG_PATA_RZ1000=m
 
 #
@@ -2897,7 +2767,8 @@ CONFIG_BLK_DEV_DM_BUILTIN=y
 CONFIG_BLK_DEV_DM=m
 CONFIG_DM_DEBUG=y
 CONFIG_DM_BUFIO=m
-# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set
+CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING=y
+# CONFIG_DM_DEBUG_BLOCK_STACK_TRACING is not set
 CONFIG_DM_BIO_PRISON=m
 CONFIG_DM_PERSISTENT_DATA=m
 CONFIG_DM_UNSTRIPED=m
@@ -2991,9 +2862,6 @@ CONFIG_NETCONSOLE_DYNAMIC=y
 CONFIG_NETPOLL=y
 CONFIG_NET_POLL_CONTROLLER=y
 CONFIG_NTB_NETDEV=m
-CONFIG_RIONET=m
-CONFIG_RIONET_TX_SIZE=128
-CONFIG_RIONET_RX_SIZE=128
 CONFIG_TUN=m
 CONFIG_TAP=m
 # CONFIG_TUN_VNET_CROSS_LE is not set
@@ -3034,18 +2902,12 @@ CONFIG_ATM_FORE200E_DEBUG=0
 CONFIG_ATM_HE=m
 CONFIG_ATM_HE_USE_SUNI=y
 CONFIG_ATM_SOLOS=m
-CONFIG_CAIF_DRIVERS=y
-CONFIG_CAIF_TTY=m
-CONFIG_CAIF_SPI_SLAVE=m
-CONFIG_CAIF_SPI_SYNC=y
-CONFIG_CAIF_HSI=m
-CONFIG_CAIF_VIRTIO=m
 
 #
 # Distributed Switch Architecture drivers
 #
 CONFIG_B53=m
-# CONFIG_B53_SPI_DRIVER is not set
+CONFIG_B53_SPI_DRIVER=m
 CONFIG_B53_MDIO_DRIVER=m
 CONFIG_B53_MMAP_DRIVER=m
 CONFIG_B53_SRAB_DRIVER=m
@@ -3064,6 +2926,7 @@ CONFIG_NET_DSA_MICROCHIP_KSZ8795_SPI=m
 CONFIG_NET_DSA_MV88E6XXX=m
 CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y
 CONFIG_NET_DSA_MV88E6XXX_PTP=y
+CONFIG_NET_DSA_MSCC_SEVILLE=m
 CONFIG_NET_DSA_AR9331=m
 CONFIG_NET_DSA_SJA1105=m
 CONFIG_NET_DSA_SJA1105_PTP=y
@@ -3157,10 +3020,12 @@ CONFIG_CHELSIO_T4_DCB=y
 CONFIG_CHELSIO_T4_FCOE=y
 CONFIG_CHELSIO_T4VF=m
 CONFIG_CHELSIO_LIB=m
+CONFIG_CHELSIO_INLINE_CRYPTO=y
+CONFIG_CHELSIO_IPSEC_INLINE=m
+CONFIG_CHELSIO_TLS_DEVICE=m
 CONFIG_NET_VENDOR_CISCO=y
 CONFIG_ENIC=m
 CONFIG_NET_VENDOR_CORTINA=y
-CONFIG_GEMINI_ETHERNET=m
 CONFIG_CX_ECAT=m
 CONFIG_DNET=m
 CONFIG_NET_VENDOR_DEC=y
@@ -3189,7 +3054,6 @@ CONFIG_BE2NET_BE3=y
 CONFIG_BE2NET_LANCER=y
 CONFIG_BE2NET_SKYHAWK=y
 CONFIG_NET_VENDOR_EZCHIP=y
-CONFIG_EZCHIP_NPS_MANAGEMENT_ENET=m
 CONFIG_NET_VENDOR_FUJITSU=y
 CONFIG_PCMCIA_FMVJ18X=m
 CONFIG_NET_VENDOR_GOOGLE=y
@@ -3229,6 +3093,8 @@ CONFIG_SKGE=m
 CONFIG_SKGE_GENESIS=y
 CONFIG_SKY2=m
 # CONFIG_SKY2_DEBUG is not set
+CONFIG_PRESTERA=m
+CONFIG_PRESTERA_PCI=m
 CONFIG_NET_VENDOR_MELLANOX=y
 CONFIG_MLX4_EN=m
 CONFIG_MLX4_EN_DCB=y
@@ -3277,7 +3143,6 @@ CONFIG_ENCX24J600=m
 CONFIG_LAN743X=m
 CONFIG_NET_VENDOR_MICROSEMI=y
 CONFIG_MSCC_OCELOT_SWITCH_LIB=m
-CONFIG_MSCC_OCELOT_SWITCH=m
 CONFIG_NET_VENDOR_MYRI=y
 CONFIG_MYRI10GE=m
 CONFIG_MYRI10GE_DCA=y
@@ -3325,9 +3190,6 @@ CONFIG_QED_ISCSI=y
 CONFIG_QED_FCOE=y
 CONFIG_QED_OOO=y
 CONFIG_NET_VENDOR_QUALCOMM=y
-CONFIG_QCA7000=m
-CONFIG_QCA7000_SPI=m
-CONFIG_QCA7000_UART=m
 CONFIG_QCOM_EMAC=m
 CONFIG_RMNET=m
 CONFIG_NET_VENDOR_RDC=y
@@ -3370,7 +3232,6 @@ CONFIG_NET_VENDOR_STMICRO=y
 CONFIG_STMMAC_ETH=m
 # CONFIG_STMMAC_SELFTESTS is not set
 CONFIG_STMMAC_PLATFORM=m
-CONFIG_DWMAC_DWC_QOS_ETH=m
 CONFIG_DWMAC_GENERIC=m
 CONFIG_DWMAC_INTEL=m
 CONFIG_STMMAC_PCI=m
@@ -3409,58 +3270,33 @@ CONFIG_DEFXX_MMIO=y
 CONFIG_SKFP=m
 # CONFIG_HIPPI is not set
 CONFIG_NET_SB1000=m
-CONFIG_MDIO_DEVICE=m
-CONFIG_MDIO_BUS=m
-CONFIG_MDIO_DEVRES=m
-CONFIG_MDIO_BCM_UNIMAC=m
-CONFIG_MDIO_BITBANG=m
-CONFIG_MDIO_BUS_MUX=m
-CONFIG_MDIO_BUS_MUX_GPIO=m
-CONFIG_MDIO_BUS_MUX_MMIOREG=m
-CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m
-CONFIG_MDIO_CAVIUM=m
-CONFIG_MDIO_GPIO=m
-CONFIG_MDIO_HISI_FEMAC=m
-CONFIG_MDIO_I2C=m
-CONFIG_MDIO_IPQ4019=m
-CONFIG_MDIO_IPQ8064=m
-CONFIG_MDIO_MSCC_MIIM=m
-CONFIG_MDIO_MVUSB=m
-CONFIG_MDIO_OCTEON=m
-CONFIG_MDIO_THUNDER=m
-CONFIG_MDIO_XPCS=m
 CONFIG_PHYLINK=m
 CONFIG_PHYLIB=m
 CONFIG_SWPHY=y
 CONFIG_LED_TRIGGER_PHY=y
+CONFIG_FIXED_PHY=m
+CONFIG_SFP=m
 
 #
 # MII PHY device drivers
 #
-CONFIG_SFP=m
-CONFIG_ADIN_PHY=m
 CONFIG_AMD_PHY=m
+CONFIG_ADIN_PHY=m
 CONFIG_AQUANTIA_PHY=m
 CONFIG_AX88796B_PHY=m
-CONFIG_BCM7XXX_PHY=m
-CONFIG_BCM87XX_PHY=m
-CONFIG_BCM_NET_PHYLIB=m
 CONFIG_BROADCOM_PHY=m
 CONFIG_BCM54140_PHY=m
+CONFIG_BCM7XXX_PHY=m
 CONFIG_BCM84881_PHY=m
+CONFIG_BCM87XX_PHY=m
+CONFIG_BCM_NET_PHYLIB=m
 CONFIG_CICADA_PHY=m
 CONFIG_CORTINA_PHY=m
 CONFIG_DAVICOM_PHY=m
-CONFIG_DP83822_PHY=m
-CONFIG_DP83TC811_PHY=m
-CONFIG_DP83848_PHY=m
-CONFIG_DP83867_PHY=m
-CONFIG_DP83869_PHY=m
-CONFIG_FIXED_PHY=m
 CONFIG_ICPLUS_PHY=m
+CONFIG_LXT_PHY=m
 CONFIG_INTEL_XWAY_PHY=m
 CONFIG_LSI_ET1011C_PHY=m
-CONFIG_LXT_PHY=m
 CONFIG_MARVELL_PHY=m
 CONFIG_MARVELL_10G_PHY=m
 CONFIG_MICREL_PHY=m
@@ -3477,9 +3313,37 @@ CONFIG_ROCKCHIP_PHY=m
 CONFIG_SMSC_PHY=m
 CONFIG_STE10XP=m
 CONFIG_TERANETICS_PHY=m
+CONFIG_DP83822_PHY=m
+CONFIG_DP83TC811_PHY=m
+CONFIG_DP83848_PHY=m
+CONFIG_DP83867_PHY=m
+CONFIG_DP83869_PHY=m
 CONFIG_VITESSE_PHY=m
 CONFIG_XILINX_GMII2RGMII=m
 CONFIG_MICREL_KS8995MA=m
+CONFIG_MDIO_DEVICE=m
+CONFIG_MDIO_BUS=m
+CONFIG_MDIO_DEVRES=m
+CONFIG_MDIO_BITBANG=m
+CONFIG_MDIO_BCM_UNIMAC=m
+CONFIG_MDIO_CAVIUM=m
+CONFIG_MDIO_GPIO=m
+CONFIG_MDIO_I2C=m
+CONFIG_MDIO_MVUSB=m
+CONFIG_MDIO_MSCC_MIIM=m
+CONFIG_MDIO_THUNDER=m
+
+#
+# MDIO Multiplexers
+#
+
+#
+# PCS device drivers
+#
+CONFIG_PCS_XPCS=m
+CONFIG_PCS_LYNX=m
+# end of PCS device drivers
+
 CONFIG_PLIP=m
 CONFIG_PPP=m
 CONFIG_PPP_BSDCOMP=m
@@ -3544,7 +3408,6 @@ CONFIG_USB_VL600=m
 CONFIG_USB_NET_CH9200=m
 CONFIG_USB_NET_AQC111=m
 CONFIG_WLAN=y
-# CONFIG_WIRELESS_WDS is not set
 CONFIG_WLAN_VENDOR_ADMTEK=y
 CONFIG_ADM8211=m
 CONFIG_ATH_COMMON=m
@@ -3591,7 +3454,6 @@ CONFIG_WIL6210_DEBUGFS=y
 CONFIG_ATH10K=m
 CONFIG_ATH10K_CE=y
 CONFIG_ATH10K_PCI=m
-CONFIG_ATH10K_AHB=y
 CONFIG_ATH10K_SDIO=m
 CONFIG_ATH10K_USB=m
 CONFIG_ATH10K_DEBUG=y
@@ -3600,6 +3462,13 @@ CONFIG_ATH10K_SPECTRAL=y
 CONFIG_ATH10K_TRACING=y
 CONFIG_WCN36XX=m
 CONFIG_WCN36XX_DEBUGFS=y
+CONFIG_ATH11K=m
+CONFIG_ATH11K_AHB=m
+CONFIG_ATH11K_PCI=m
+CONFIG_ATH11K_DEBUG=y
+CONFIG_ATH11K_DEBUGFS=y
+# CONFIG_ATH11K_TRACING is not set
+CONFIG_ATH11K_SPECTRAL=y
 CONFIG_WLAN_VENDOR_ATMEL=y
 CONFIG_ATMEL=m
 CONFIG_PCI_ATMEL=m
@@ -3835,7 +3704,6 @@ CONFIG_WL1251_SDIO=m
 CONFIG_WL12XX=m
 CONFIG_WL18XX=m
 CONFIG_WLCORE=m
-CONFIG_WLCORE_SPI=m
 CONFIG_WLCORE_SDIO=m
 CONFIG_WILINK_PLATFORM_DATA=y
 CONFIG_WLAN_VENDOR_ZYDAS=y
@@ -3910,7 +3778,7 @@ CONFIG_NVM_PBLK=m
 # Input device support
 #
 CONFIG_INPUT=y
-CONFIG_INPUT_LEDS=m
+CONFIG_INPUT_LEDS=y
 CONFIG_INPUT_FF_MEMLESS=m
 CONFIG_INPUT_POLLDEV=m
 CONFIG_INPUT_SPARSEKMAP=m
@@ -3924,7 +3792,7 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 CONFIG_INPUT_JOYDEV=m
-CONFIG_INPUT_EVDEV=m
+CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_EVBUG is not set
 
 #
@@ -3936,7 +3804,7 @@ CONFIG_KEYBOARD_ADP5520=m
 CONFIG_KEYBOARD_ADP5588=m
 CONFIG_KEYBOARD_ADP5589=m
 CONFIG_KEYBOARD_APPLESPI=m
-CONFIG_KEYBOARD_ATKBD=m
+CONFIG_KEYBOARD_ATKBD=y
 CONFIG_KEYBOARD_QT1050=m
 CONFIG_KEYBOARD_QT1070=m
 CONFIG_KEYBOARD_QT2160=m
@@ -3957,19 +3825,14 @@ CONFIG_KEYBOARD_OPENCORES=m
 CONFIG_KEYBOARD_SAMSUNG=m
 CONFIG_KEYBOARD_STOWAWAY=m
 CONFIG_KEYBOARD_SUNKBD=m
-CONFIG_KEYBOARD_STMPE=m
 CONFIG_KEYBOARD_IQS62X=m
-CONFIG_KEYBOARD_OMAP4=m
-CONFIG_KEYBOARD_TC3589X=m
 CONFIG_KEYBOARD_TM2_TOUCHKEY=m
 CONFIG_KEYBOARD_TWL4030=m
 CONFIG_KEYBOARD_XTKBD=m
 CONFIG_KEYBOARD_CROS_EC=m
-CONFIG_KEYBOARD_CAP11XX=m
-CONFIG_KEYBOARD_BCM=m
 CONFIG_KEYBOARD_MTK_PMIC=m
 CONFIG_INPUT_MOUSE=y
-CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2=y
 CONFIG_MOUSE_PS2_ALPS=y
 CONFIG_MOUSE_PS2_BYD=y
 CONFIG_MOUSE_PS2_LOGIPS2PP=y
@@ -3999,6 +3862,7 @@ CONFIG_MOUSE_SYNAPTICS_USB=m
 CONFIG_INPUT_JOYSTICK=y
 CONFIG_JOYSTICK_ANALOG=m
 CONFIG_JOYSTICK_A3D=m
+CONFIG_JOYSTICK_ADC=m
 CONFIG_JOYSTICK_ADI=m
 CONFIG_JOYSTICK_COBRA=m
 CONFIG_JOYSTICK_GF2K=m
@@ -4048,13 +3912,11 @@ CONFIG_TOUCHSCREEN_AD7879=m
 CONFIG_TOUCHSCREEN_AD7879_I2C=m
 CONFIG_TOUCHSCREEN_AD7879_SPI=m
 CONFIG_TOUCHSCREEN_ADC=m
-CONFIG_TOUCHSCREEN_AR1021_I2C=m
 CONFIG_TOUCHSCREEN_ATMEL_MXT=m
 CONFIG_TOUCHSCREEN_ATMEL_MXT_T37=y
 CONFIG_TOUCHSCREEN_AUO_PIXCIR=m
 CONFIG_TOUCHSCREEN_BU21013=m
 CONFIG_TOUCHSCREEN_BU21029=m
-CONFIG_TOUCHSCREEN_CHIPONE_ICN8318=m
 CONFIG_TOUCHSCREEN_CHIPONE_ICN8505=m
 CONFIG_TOUCHSCREEN_CY8CTMA140=m
 CONFIG_TOUCHSCREEN_CY8CTMG110=m
@@ -4069,7 +3931,6 @@ CONFIG_TOUCHSCREEN_DA9052=m
 CONFIG_TOUCHSCREEN_DYNAPRO=m
 CONFIG_TOUCHSCREEN_HAMPSHIRE=m
 CONFIG_TOUCHSCREEN_EETI=m
-CONFIG_TOUCHSCREEN_EGALAX=m
 CONFIG_TOUCHSCREEN_EGALAX_SERIAL=m
 CONFIG_TOUCHSCREEN_EXC3000=m
 CONFIG_TOUCHSCREEN_FUJITSU=m
@@ -4088,7 +3949,6 @@ CONFIG_TOUCHSCREEN_MCS5000=m
 CONFIG_TOUCHSCREEN_MMS114=m
 CONFIG_TOUCHSCREEN_MELFAS_MIP4=m
 CONFIG_TOUCHSCREEN_MTOUCH=m
-CONFIG_TOUCHSCREEN_IMX6UL_TSC=m
 CONFIG_TOUCHSCREEN_INEXIO=m
 CONFIG_TOUCHSCREEN_MK712=m
 CONFIG_TOUCHSCREEN_PENMOUNT=m
@@ -4137,16 +3997,15 @@ CONFIG_TOUCHSCREEN_SILEAD=m
 CONFIG_TOUCHSCREEN_SIS_I2C=m
 CONFIG_TOUCHSCREEN_ST1232=m
 CONFIG_TOUCHSCREEN_STMFTS=m
-CONFIG_TOUCHSCREEN_STMPE=m
 CONFIG_TOUCHSCREEN_SUR40=m
 CONFIG_TOUCHSCREEN_SURFACE3_SPI=m
 CONFIG_TOUCHSCREEN_SX8654=m
 CONFIG_TOUCHSCREEN_TPS6507X=m
 CONFIG_TOUCHSCREEN_ZET6223=m
 CONFIG_TOUCHSCREEN_ZFORCE=m
-CONFIG_TOUCHSCREEN_COLIBRI_VF50=m
 CONFIG_TOUCHSCREEN_ROHM_BU21023=m
 CONFIG_TOUCHSCREEN_IQS5XX=m
+CONFIG_TOUCHSCREEN_ZINITIX=m
 CONFIG_INPUT_MISC=y
 CONFIG_INPUT_88PM860X_ONKEY=m
 CONFIG_INPUT_88PM80X_ONKEY=m
@@ -4154,11 +4013,9 @@ CONFIG_INPUT_AD714X=m
 CONFIG_INPUT_AD714X_I2C=m
 CONFIG_INPUT_AD714X_SPI=m
 CONFIG_INPUT_ARIZONA_HAPTICS=m
-CONFIG_INPUT_ATMEL_CAPTOUCH=m
 CONFIG_INPUT_BMA150=m
 CONFIG_INPUT_E3X0_BUTTON=m
 CONFIG_INPUT_PCSPKR=m
-CONFIG_INPUT_MAX77650_ONKEY=m
 CONFIG_INPUT_MAX77693_HAPTIC=m
 CONFIG_INPUT_MAX8925_ONKEY=m
 CONFIG_INPUT_MAX8997_HAPTIC=m
@@ -4168,7 +4025,6 @@ CONFIG_INPUT_APANEL=m
 CONFIG_INPUT_GPIO_BEEPER=m
 CONFIG_INPUT_GPIO_DECODER=m
 CONFIG_INPUT_GPIO_VIBRA=m
-CONFIG_INPUT_CPCAP_PWRBUTTON=m
 CONFIG_INPUT_ATLAS_BTNS=m
 CONFIG_INPUT_ATI_REMOTE2=m
 CONFIG_INPUT_KEYSPAN_REMOTE=m
@@ -4178,7 +4034,6 @@ CONFIG_INPUT_YEALINK=m
 CONFIG_INPUT_CM109=m
 CONFIG_INPUT_REGULATOR_HAPTIC=m
 CONFIG_INPUT_RETU_PWRBUTTON=m
-CONFIG_INPUT_TPS65218_PWRBUTTON=m
 CONFIG_INPUT_AXP20X_PEK=m
 CONFIG_INPUT_TWL4030_PWRBUTTON=m
 CONFIG_INPUT_TWL4030_VIBRA=m
@@ -4189,7 +4044,6 @@ CONFIG_INPUT_PCF50633_PMU=m
 CONFIG_INPUT_PCF8574=m
 CONFIG_INPUT_PWM_BEEPER=m
 CONFIG_INPUT_PWM_VIBRA=m
-CONFIG_INPUT_RK805_PWRKEY=m
 CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
 CONFIG_INPUT_DA9052_ONKEY=m
 CONFIG_INPUT_DA9055_ONKEY=m
@@ -4210,7 +4064,6 @@ CONFIG_INPUT_DRV260X_HAPTICS=m
 CONFIG_INPUT_DRV2665_HAPTICS=m
 CONFIG_INPUT_DRV2667_HAPTICS=m
 CONFIG_INPUT_RAVE_SP_PWRBUTTON=m
-CONFIG_INPUT_STPMIC1_ONKEY=m
 CONFIG_RMI4_CORE=m
 CONFIG_RMI4_I2C=m
 CONFIG_RMI4_SPI=m
@@ -4222,25 +4075,25 @@ CONFIG_RMI4_F11=y
 CONFIG_RMI4_F12=y
 CONFIG_RMI4_F30=y
 CONFIG_RMI4_F34=y
+CONFIG_RMI4_F3A=y
 # CONFIG_RMI4_F54 is not set
 CONFIG_RMI4_F55=y
 
 #
 # Hardware I/O ports
 #
-CONFIG_SERIO=m
+CONFIG_SERIO=y
 CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
-CONFIG_SERIO_I8042=m
+CONFIG_SERIO_I8042=y
 CONFIG_SERIO_SERPORT=m
 CONFIG_SERIO_CT82C710=m
 CONFIG_SERIO_PARKBD=m
 CONFIG_SERIO_PCIPS2=m
-CONFIG_SERIO_LIBPS2=m
+CONFIG_SERIO_LIBPS2=y
 CONFIG_SERIO_RAW=m
 CONFIG_SERIO_ALTERA_PS2=m
 CONFIG_SERIO_PS2MULT=m
 CONFIG_SERIO_ARC_PS2=m
-# CONFIG_SERIO_APBPS2 is not set
 CONFIG_HYPERV_KEYBOARD=m
 CONFIG_SERIO_GPIO_PS2=m
 CONFIG_USERIO=m
@@ -4282,10 +4135,9 @@ CONFIG_SERIAL_8250_EXAR=m
 CONFIG_SERIAL_8250_CS=m
 CONFIG_SERIAL_8250_MEN_MCB=m
 CONFIG_SERIAL_8250_NR_UARTS=32
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=32
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_ASPEED_VUART=m
 CONFIG_SERIAL_8250_SHARE_IRQ=y
 # CONFIG_SERIAL_8250_DETECT_IRQ is not set
 CONFIG_SERIAL_8250_RSA=y
@@ -4294,7 +4146,6 @@ CONFIG_SERIAL_8250_DW=m
 CONFIG_SERIAL_8250_RT288X=y
 CONFIG_SERIAL_8250_LPSS=y
 CONFIG_SERIAL_8250_MID=y
-CONFIG_SERIAL_OF_PLATFORM=m
 
 #
 # Non-8250 serial port support
@@ -4306,7 +4157,6 @@ CONFIG_SERIAL_UARTLITE_NR_UARTS=1
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_JSM=m
-CONFIG_SERIAL_SIFIVE=m
 CONFIG_SERIAL_LANTIQ=m
 CONFIG_SERIAL_SCCNXP=m
 CONFIG_SERIAL_SC16IS7XX_CORE=m
@@ -4318,14 +4168,12 @@ CONFIG_SERIAL_ALTERA_UART=m
 CONFIG_SERIAL_ALTERA_UART_MAXPORTS=4
 CONFIG_SERIAL_ALTERA_UART_BAUDRATE=115200
 CONFIG_SERIAL_IFX6X60=m
-CONFIG_SERIAL_XILINX_PS_UART=m
 CONFIG_SERIAL_ARC=m
 CONFIG_SERIAL_ARC_NR_PORTS=1
 CONFIG_SERIAL_RP2=m
 CONFIG_SERIAL_RP2_NR_UARTS=32
 CONFIG_SERIAL_FSL_LPUART=m
 CONFIG_SERIAL_FSL_LINFLEXUART=m
-CONFIG_SERIAL_CONEXANT_DIGICOLOR=m
 CONFIG_SERIAL_MEN_Z135=m
 CONFIG_SERIAL_SPRD=m
 # end of Serial drivers
@@ -4353,9 +4201,8 @@ CONFIG_HVC_XEN=y
 CONFIG_HVC_XEN_FRONTEND=y
 CONFIG_SERIAL_DEV_BUS=y
 CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
-# CONFIG_TTY_PRINTK is not set
 CONFIG_PRINTER=m
-# CONFIG_LP_CONSOLE is not set
+CONFIG_LP_CONSOLE=y
 CONFIG_PPDEV=m
 CONFIG_VIRTIO_CONSOLE=m
 CONFIG_IPMI_HANDLER=m
@@ -4375,7 +4222,7 @@ CONFIG_HW_RANDOM_AMD=m
 CONFIG_HW_RANDOM_BA431=m
 CONFIG_HW_RANDOM_VIA=m
 CONFIG_HW_RANDOM_VIRTIO=m
-CONFIG_HW_RANDOM_CCTRNG=m
+CONFIG_HW_RANDOM_XIPHERA=m
 CONFIG_APPLICOM=m
 
 #
@@ -4391,13 +4238,12 @@ CONFIG_IPWIRELESS=m
 CONFIG_MWAVE=m
 CONFIG_DEVMEM=y
 # CONFIG_DEVKMEM is not set
-CONFIG_NVRAM=m
+CONFIG_NVRAM=y
 CONFIG_RAW_DRIVER=m
-CONFIG_MAX_RAW_DEVS=256
+CONFIG_MAX_RAW_DEVS=8192
 CONFIG_DEVPORT=y
 CONFIG_HPET=y
-CONFIG_HPET_MMAP=y
-CONFIG_HPET_MMAP_DEFAULT=y
+# CONFIG_HPET_MMAP is not set
 CONFIG_HANGCHECK_TIMER=m
 CONFIG_TCG_TPM=m
 CONFIG_HW_RANDOM_TPM=y
@@ -4420,7 +4266,6 @@ CONFIG_TCG_TIS_ST33ZP24_SPI=m
 CONFIG_TELCLOCK=m
 CONFIG_XILLYBUS=m
 CONFIG_XILLYBUS_PCIE=m
-CONFIG_XILLYBUS_OF=m
 # end of Character devices
 
 # CONFIG_RANDOM_TRUST_CPU is not set
@@ -4439,15 +4284,11 @@ CONFIG_I2C_MUX=m
 #
 # Multiplexer I2C Chip support
 #
-CONFIG_I2C_ARB_GPIO_CHALLENGE=m
 CONFIG_I2C_MUX_GPIO=m
-CONFIG_I2C_MUX_GPMUX=m
 CONFIG_I2C_MUX_LTC4306=m
 CONFIG_I2C_MUX_PCA9541=m
 CONFIG_I2C_MUX_PCA954x=m
-CONFIG_I2C_MUX_PINCTRL=m
 CONFIG_I2C_MUX_REG=m
-CONFIG_I2C_DEMUX_PINCTRL=m
 CONFIG_I2C_MUX_MLXCPLD=m
 # end of Multiplexer I2C Chip support
 
@@ -4497,14 +4338,13 @@ CONFIG_I2C_DESIGNWARE_CORE=y
 CONFIG_I2C_DESIGNWARE_SLAVE=y
 CONFIG_I2C_DESIGNWARE_PLATFORM=y
 CONFIG_I2C_DESIGNWARE_BAYTRAIL=y
-CONFIG_I2C_DESIGNWARE_PCI=m
+CONFIG_I2C_DESIGNWARE_PCI=y
 CONFIG_I2C_EMEV2=m
 CONFIG_I2C_GPIO=m
 # CONFIG_I2C_GPIO_FAULT_INJECTOR is not set
 CONFIG_I2C_KEMPLD=m
 CONFIG_I2C_OCORES=m
 CONFIG_I2C_PCA_PLATFORM=m
-CONFIG_I2C_RK3X=m
 CONFIG_I2C_SIMTEC=m
 CONFIG_I2C_XILINX=m
 
@@ -4524,20 +4364,18 @@ CONFIG_I2C_VIPERBOARD=m
 #
 CONFIG_I2C_MLXCPLD=m
 CONFIG_I2C_CROS_EC_TUNNEL=m
-CONFIG_I2C_FSI=m
 # end of I2C Hardware Bus support
 
 CONFIG_I2C_STUB=m
 CONFIG_I2C_SLAVE=y
 CONFIG_I2C_SLAVE_EEPROM=m
+CONFIG_I2C_SLAVE_TESTUNIT=m
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # end of I2C support
 
-CONFIG_I3C=m
-CONFIG_CDNS_I3C_MASTER=m
-CONFIG_DW_I3C_MASTER=m
+# CONFIG_I3C is not set
 CONFIG_SPI=y
 # CONFIG_SPI_DEBUG is not set
 CONFIG_SPI_MASTER=y
@@ -4556,12 +4394,9 @@ CONFIG_SPI_DW_DMA=y
 CONFIG_SPI_DW_PCI=m
 CONFIG_SPI_DW_MMIO=m
 CONFIG_SPI_DLN2=m
-CONFIG_SPI_FSI=m
 CONFIG_SPI_NXP_FLEXSPI=m
 CONFIG_SPI_GPIO=m
 CONFIG_SPI_LM70_LLP=m
-CONFIG_SPI_FSL_LIB=m
-CONFIG_SPI_FSL_SPI=m
 CONFIG_SPI_LANTIQ_SSC=m
 CONFIG_SPI_OC_TINY=m
 CONFIG_SPI_PXA2XX=m
@@ -4590,18 +4425,8 @@ CONFIG_SPI_SLAVE=y
 CONFIG_SPI_SLAVE_TIME=m
 CONFIG_SPI_SLAVE_SYSTEM_CONTROL=m
 CONFIG_SPI_DYNAMIC=y
-CONFIG_SPMI=m
-CONFIG_HSI=m
-CONFIG_HSI_BOARDINFO=y
-
-#
-# HSI controllers
-#
-
-#
-# HSI clients
-#
-CONFIG_HSI_CHAR=m
+# CONFIG_SPMI is not set
+# CONFIG_HSI is not set
 CONFIG_PPS=y
 # CONFIG_PPS_DEBUG is not set
 
@@ -4630,26 +4455,16 @@ CONFIG_PTP_1588_CLOCK_VMW=m
 # end of PTP clock support
 
 CONFIG_PINCTRL=y
-CONFIG_GENERIC_PINCTRL_GROUPS=y
 CONFIG_PINMUX=y
-CONFIG_GENERIC_PINMUX_FUNCTIONS=y
 CONFIG_PINCONF=y
 CONFIG_GENERIC_PINCONF=y
 # CONFIG_DEBUG_PINCTRL is not set
-CONFIG_PINCTRL_AS3722=m
-CONFIG_PINCTRL_AXP209=m
 CONFIG_PINCTRL_AMD=m
 CONFIG_PINCTRL_DA9062=m
 CONFIG_PINCTRL_MCP23S08_I2C=m
 CONFIG_PINCTRL_MCP23S08_SPI=m
 CONFIG_PINCTRL_MCP23S08=m
-CONFIG_PINCTRL_SINGLE=m
 CONFIG_PINCTRL_SX150X=y
-CONFIG_PINCTRL_STMFX=m
-CONFIG_PINCTRL_MAX77620=m
-CONFIG_PINCTRL_PALMAS=m
-CONFIG_PINCTRL_RK805=m
-CONFIG_PINCTRL_OCELOT=y
 CONFIG_PINCTRL_BAYTRAIL=y
 CONFIG_PINCTRL_CHERRYVIEW=y
 CONFIG_PINCTRL_LYNXPOINT=y
@@ -4665,47 +4480,41 @@ CONFIG_PINCTRL_JASPERLAKE=y
 CONFIG_PINCTRL_LEWISBURG=y
 CONFIG_PINCTRL_SUNRISEPOINT=y
 CONFIG_PINCTRL_TIGERLAKE=y
-CONFIG_PINCTRL_LOCHNAGAR=m
+
+#
+# Renesas pinctrl drivers
+#
+# end of Renesas pinctrl drivers
+
 CONFIG_PINCTRL_MADERA=m
 CONFIG_PINCTRL_CS47L15=y
 CONFIG_PINCTRL_CS47L35=y
 CONFIG_PINCTRL_CS47L85=y
 CONFIG_PINCTRL_CS47L90=y
 CONFIG_PINCTRL_CS47L92=y
-CONFIG_PINCTRL_EQUILIBRIUM=m
 CONFIG_GPIOLIB=y
 CONFIG_GPIOLIB_FASTPATH_LIMIT=512
-CONFIG_OF_GPIO=y
 CONFIG_GPIO_ACPI=y
 CONFIG_GPIOLIB_IRQCHIP=y
 # CONFIG_DEBUG_GPIO is not set
 CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_CDEV=y
+CONFIG_GPIO_CDEV_V1=y
+CONFIG_GPIO_GENERIC=m
 CONFIG_GPIO_MAX730X=m
 
 #
 # Memory mapped GPIO drivers
 #
-CONFIG_GPIO_74XX_MMIO=m
-CONFIG_GPIO_ALTERA=m
 CONFIG_GPIO_AMDPT=m
-CONFIG_GPIO_CADENCE=m
 CONFIG_GPIO_DWAPB=m
 CONFIG_GPIO_EXAR=m
-CONFIG_GPIO_FTGPIO010=y
 CONFIG_GPIO_GENERIC_PLATFORM=m
-CONFIG_GPIO_GRGPIO=m
-CONFIG_GPIO_HLWD=m
 CONFIG_GPIO_ICH=m
-CONFIG_GPIO_LOGICVC=m
 CONFIG_GPIO_MB86S7X=m
 CONFIG_GPIO_MENZ127=m
-CONFIG_GPIO_SAMA5D2_PIOBU=m
-CONFIG_GPIO_SIFIVE=y
 CONFIG_GPIO_SIOX=m
-CONFIG_GPIO_SYSCON=m
 CONFIG_GPIO_VX855=m
-CONFIG_GPIO_WCD934X=m
 CONFIG_GPIO_XILINX=m
 CONFIG_GPIO_AMD_FCH=m
 # end of Memory mapped GPIO drivers
@@ -4725,8 +4534,6 @@ CONFIG_GPIO_WS16C48=m
 # I2C GPIO expanders
 #
 CONFIG_GPIO_ADP5588=m
-CONFIG_GPIO_ADNP=m
-CONFIG_GPIO_GW_PLD=m
 CONFIG_GPIO_MAX7300=m
 CONFIG_GPIO_MAX732X=m
 CONFIG_GPIO_PCA953X=m
@@ -4741,8 +4548,6 @@ CONFIG_GPIO_TPIC2810=m
 #
 CONFIG_GPIO_ADP5520=m
 CONFIG_GPIO_ARIZONA=m
-CONFIG_GPIO_BD70528=m
-CONFIG_GPIO_BD71828=m
 CONFIG_GPIO_BD9571MWV=m
 CONFIG_GPIO_CRYSTAL_COVE=m
 CONFIG_GPIO_DA9052=m
@@ -4752,17 +4557,11 @@ CONFIG_GPIO_JANZ_TTL=m
 CONFIG_GPIO_KEMPLD=m
 CONFIG_GPIO_LP3943=m
 CONFIG_GPIO_LP873X=m
-CONFIG_GPIO_LP87565=m
 CONFIG_GPIO_MADERA=m
-CONFIG_GPIO_MAX77620=m
-CONFIG_GPIO_MAX77650=m
 CONFIG_GPIO_MSIC=y
 CONFIG_GPIO_PALMAS=y
 CONFIG_GPIO_RC5T583=y
-CONFIG_GPIO_STMPE=y
-CONFIG_GPIO_TC3589X=y
 CONFIG_GPIO_TPS65086=m
-CONFIG_GPIO_TPS65218=m
 CONFIG_GPIO_TPS6586X=y
 CONFIG_GPIO_TPS65910=y
 CONFIG_GPIO_TPS65912=m
@@ -4785,19 +4584,16 @@ CONFIG_GPIO_ML_IOH=m
 CONFIG_GPIO_PCI_IDIO_16=m
 CONFIG_GPIO_PCIE_IDIO_24=m
 CONFIG_GPIO_RDC321X=m
-CONFIG_GPIO_SODAVILLE=y
 # end of PCI GPIO expanders
 
 #
 # SPI GPIO expanders
 #
-CONFIG_GPIO_74X164=m
 CONFIG_GPIO_MAX3191X=m
 CONFIG_GPIO_MAX7301=m
 CONFIG_GPIO_MC33880=m
 CONFIG_GPIO_PISOSR=m
 CONFIG_GPIO_XRA1403=m
-CONFIG_GPIO_MOXTET=m
 # end of SPI GPIO expanders
 
 #
@@ -4846,20 +4642,9 @@ CONFIG_W1_SLAVE_DS28E04=m
 CONFIG_W1_SLAVE_DS28E17=m
 # end of 1-wire Slaves
 
-CONFIG_POWER_AVS=y
-CONFIG_QCOM_CPR=m
 CONFIG_POWER_RESET=y
-CONFIG_POWER_RESET_AS3722=y
-CONFIG_POWER_RESET_GPIO=y
-CONFIG_POWER_RESET_GPIO_RESTART=y
-CONFIG_POWER_RESET_LTC2952=y
 CONFIG_POWER_RESET_MT6323=y
 CONFIG_POWER_RESET_RESTART=y
-CONFIG_POWER_RESET_SYSCON=y
-CONFIG_POWER_RESET_SYSCON_POWEROFF=y
-CONFIG_REBOOT_MODE=m
-CONFIG_SYSCON_REBOOT_MODE=m
-CONFIG_NVMEM_REBOOT_MODE=m
 CONFIG_POWER_SUPPLY=y
 # CONFIG_POWER_SUPPLY_DEBUG is not set
 CONFIG_POWER_SUPPLY_HWMON=y
@@ -4872,14 +4657,11 @@ CONFIG_WM8350_POWER=m
 CONFIG_TEST_POWER=m
 CONFIG_BATTERY_88PM860X=m
 CONFIG_CHARGER_ADP5061=m
-CONFIG_BATTERY_ACT8945A=m
-CONFIG_BATTERY_CPCAP=m
 CONFIG_BATTERY_CW2015=m
 CONFIG_BATTERY_DS2760=m
 CONFIG_BATTERY_DS2780=m
 CONFIG_BATTERY_DS2781=m
 CONFIG_BATTERY_DS2782=m
-CONFIG_BATTERY_LEGO_EV3=m
 CONFIG_BATTERY_SBS=m
 CONFIG_CHARGER_SBS=m
 CONFIG_MANAGER_SBS=m
@@ -4912,8 +4694,6 @@ CONFIG_CHARGER_GPIO=m
 CONFIG_CHARGER_MANAGER=y
 CONFIG_CHARGER_LT3651=m
 CONFIG_CHARGER_MAX14577=m
-CONFIG_CHARGER_DETECTOR_MAX14656=m
-CONFIG_CHARGER_MAX77650=m
 CONFIG_CHARGER_MAX77693=m
 CONFIG_CHARGER_MAX8997=m
 CONFIG_CHARGER_MAX8998=m
@@ -4924,15 +4704,13 @@ CONFIG_CHARGER_BQ24257=m
 CONFIG_CHARGER_BQ24735=m
 CONFIG_CHARGER_BQ2515X=m
 CONFIG_CHARGER_BQ25890=m
+CONFIG_CHARGER_BQ25980=m
 CONFIG_CHARGER_SMB347=m
 CONFIG_CHARGER_TPS65090=m
-CONFIG_CHARGER_TPS65217=m
 CONFIG_BATTERY_GAUGE_LTC2941=m
 CONFIG_BATTERY_RT5033=m
 CONFIG_CHARGER_RT9455=m
 CONFIG_CHARGER_CROS_USBPD=m
-CONFIG_CHARGER_UCS1002=m
-CONFIG_CHARGER_BD70528=m
 CONFIG_CHARGER_BD99954=m
 CONFIG_CHARGER_WILCO=m
 CONFIG_HWMON=y
@@ -4983,7 +4761,6 @@ CONFIG_SENSORS_I5K_AMB=m
 CONFIG_SENSORS_F71805F=m
 CONFIG_SENSORS_F71882FG=m
 CONFIG_SENSORS_F75375S=m
-CONFIG_SENSORS_GSC=m
 CONFIG_SENSORS_MC13783_ADC=m
 CONFIG_SENSORS_FSCHMD=m
 CONFIG_SENSORS_FTSTEUTATES=m
@@ -4991,7 +4768,6 @@ CONFIG_SENSORS_GL518SM=m
 CONFIG_SENSORS_GL520SM=m
 CONFIG_SENSORS_G760A=m
 CONFIG_SENSORS_G762=m
-CONFIG_SENSORS_GPIO_FAN=m
 CONFIG_SENSORS_HIH6130=m
 CONFIG_SENSORS_IBMAEM=m
 CONFIG_SENSORS_IBMPEX=m
@@ -5002,7 +4778,6 @@ CONFIG_SENSORS_IT87=m
 CONFIG_SENSORS_JC42=m
 CONFIG_SENSORS_POWR1220=m
 CONFIG_SENSORS_LINEAGE=m
-CONFIG_SENSORS_LOCHNAGAR=m
 CONFIG_SENSORS_LTC2945=m
 CONFIG_SENSORS_LTC2947=m
 CONFIG_SENSORS_LTC2947_I2C=m
@@ -5031,6 +4806,7 @@ CONFIG_SENSORS_MCP3021=m
 CONFIG_SENSORS_MLXREG_FAN=m
 CONFIG_SENSORS_TC654=m
 CONFIG_SENSORS_MENF21BMC_HWMON=m
+CONFIG_SENSORS_MR75203=m
 CONFIG_SENSORS_ADCXX=m
 CONFIG_SENSORS_LM63=m
 CONFIG_SENSORS_LM70=m
@@ -5059,6 +4835,7 @@ CONFIG_SENSORS_NPCM7XX=m
 CONFIG_SENSORS_PCF8591=m
 CONFIG_PMBUS=m
 CONFIG_SENSORS_PMBUS=m
+CONFIG_SENSORS_ADM1266=m
 CONFIG_SENSORS_ADM1275=m
 CONFIG_SENSORS_BEL_PFE=m
 CONFIG_SENSORS_IBM_CFFPS=m
@@ -5078,6 +4855,7 @@ CONFIG_SENSORS_MAX20751=m
 CONFIG_SENSORS_MAX31785=m
 CONFIG_SENSORS_MAX34440=m
 CONFIG_SENSORS_MAX8688=m
+CONFIG_SENSORS_MP2975=m
 CONFIG_SENSORS_PXE1610=m
 CONFIG_SENSORS_TPS40422=m
 CONFIG_SENSORS_TPS53679=m
@@ -5085,7 +4863,6 @@ CONFIG_SENSORS_UCD9000=m
 CONFIG_SENSORS_UCD9200=m
 CONFIG_SENSORS_XDPE122=m
 CONFIG_SENSORS_ZL6100=m
-CONFIG_SENSORS_PWM_FAN=m
 CONFIG_SENSORS_SHT15=m
 CONFIG_SENSORS_SHT21=m
 CONFIG_SENSORS_SHT3x=m
@@ -5136,6 +4913,7 @@ CONFIG_SENSORS_W83627EHF=m
 CONFIG_SENSORS_WM831X=m
 CONFIG_SENSORS_WM8350=m
 CONFIG_SENSORS_XGENE=m
+CONFIG_SENSORS_INTEL_M10_BMC_HWMON=m
 
 #
 # ACPI drivers
@@ -5147,7 +4925,6 @@ CONFIG_THERMAL_NETLINK=y
 # CONFIG_THERMAL_STATISTICS is not set
 CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=100
 CONFIG_THERMAL_HWMON=y
-CONFIG_THERMAL_OF=y
 CONFIG_THERMAL_WRITABLE_TRIPS=y
 CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
 # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
@@ -5158,14 +4935,8 @@ CONFIG_THERMAL_GOV_STEP_WISE=y
 CONFIG_THERMAL_GOV_BANG_BANG=y
 CONFIG_THERMAL_GOV_USER_SPACE=y
 CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
-CONFIG_CPU_THERMAL=y
-CONFIG_CPU_FREQ_THERMAL=y
-CONFIG_CPU_IDLE_THERMAL=y
 CONFIG_DEVFREQ_THERMAL=y
 # CONFIG_THERMAL_EMULATION is not set
-CONFIG_THERMAL_MMIO=m
-CONFIG_MAX77620_THERMAL=m
-CONFIG_DA9062_THERMAL=m
 
 #
 # Intel thermal drivers
@@ -5188,7 +4959,6 @@ CONFIG_INTEL_BXT_PMIC_THERMAL=m
 CONFIG_INTEL_PCH_THERMAL=m
 # end of Intel thermal drivers
 
-# CONFIG_TI_SOC_THERMAL is not set
 CONFIG_GENERIC_ADC_THERMAL=m
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_CORE=y
@@ -5212,12 +4982,10 @@ CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
 #
 CONFIG_SOFT_WATCHDOG=m
 # CONFIG_SOFT_WATCHDOG_PRETIMEOUT is not set
-CONFIG_BD70528_WATCHDOG=m
 CONFIG_DA9052_WATCHDOG=m
 CONFIG_DA9055_WATCHDOG=m
 CONFIG_DA9063_WATCHDOG=m
 CONFIG_DA9062_WATCHDOG=m
-CONFIG_GPIO_WATCHDOG=m
 CONFIG_MENF21BMC_WATCHDOG=m
 CONFIG_MENZ069_WATCHDOG=m
 CONFIG_WDAT_WDT=m
@@ -5229,12 +4997,9 @@ CONFIG_RAVE_SP_WATCHDOG=m
 CONFIG_MLX_WDT=m
 CONFIG_CADENCE_WATCHDOG=m
 CONFIG_DW_WATCHDOG=m
-CONFIG_RN5T618_WATCHDOG=m
 CONFIG_TWL4030_WATCHDOG=m
 CONFIG_MAX63XX_WATCHDOG=m
-CONFIG_MAX77620_WATCHDOG=m
 CONFIG_RETU_WATCHDOG=m
-CONFIG_STPMIC1_WATCHDOG=m
 CONFIG_ACQUIRE_WDT=m
 CONFIG_ADVANTECH_WDT=m
 CONFIG_ALIM1535_WDT=m
@@ -5315,13 +5080,9 @@ CONFIG_BCMA_DRIVER_GPIO=y
 # Multifunction device drivers
 #
 CONFIG_MFD_CORE=y
-CONFIG_MFD_ACT8945A=m
 CONFIG_MFD_AS3711=y
-CONFIG_MFD_AS3722=m
 CONFIG_PMIC_ADP5520=y
 CONFIG_MFD_AAT2870_CORE=y
-CONFIG_MFD_ATMEL_FLEXCOM=m
-CONFIG_MFD_ATMEL_HLCDC=m
 CONFIG_MFD_BCM590XX=m
 CONFIG_MFD_BD9571MWV=m
 CONFIG_MFD_AXP20X=m
@@ -5344,12 +5105,10 @@ CONFIG_MFD_DA9062=m
 CONFIG_MFD_DA9063=m
 CONFIG_MFD_DA9150=m
 CONFIG_MFD_DLN2=m
-CONFIG_MFD_GATEWORKS_GSC=m
 CONFIG_MFD_MC13XXX=m
 CONFIG_MFD_MC13XXX_SPI=m
 CONFIG_MFD_MC13XXX_I2C=m
 CONFIG_MFD_MP2629=m
-CONFIG_MFD_HI6421_PMIC=m
 CONFIG_HTC_PASIC3=m
 CONFIG_HTC_I2CPLD=y
 CONFIG_MFD_INTEL_QUARK_I2C_GPIO=m
@@ -5372,9 +5131,6 @@ CONFIG_MFD_88PM800=m
 CONFIG_MFD_88PM805=m
 CONFIG_MFD_88PM860X=y
 CONFIG_MFD_MAX14577=m
-CONFIG_MFD_MAX77620=y
-CONFIG_MFD_MAX77650=m
-CONFIG_MFD_MAX77686=m
 CONFIG_MFD_MAX77693=m
 CONFIG_MFD_MAX77843=y
 CONFIG_MFD_MAX8907=m
@@ -5385,7 +5141,6 @@ CONFIG_MFD_MT6360=m
 CONFIG_MFD_MT6397=m
 CONFIG_MFD_MENF21BMC=m
 CONFIG_EZX_PCAP=y
-CONFIG_MFD_CPCAP=m
 CONFIG_MFD_VIPERBOARD=m
 CONFIG_MFD_RETU=m
 CONFIG_MFD_PCF50633=m
@@ -5395,8 +5150,6 @@ CONFIG_UCB1400_CORE=m
 CONFIG_MFD_RDC321X=m
 CONFIG_MFD_RT5033=m
 CONFIG_MFD_RC5T583=y
-CONFIG_MFD_RK808=m
-CONFIG_MFD_RN5T618=m
 CONFIG_MFD_SEC_CORE=y
 CONFIG_MFD_SI476X_CORE=m
 CONFIG_MFD_SM501=m
@@ -5405,15 +5158,6 @@ CONFIG_MFD_SKY81452=m
 CONFIG_ABX500_CORE=y
 CONFIG_AB3100_CORE=y
 CONFIG_AB3100_OTP=y
-CONFIG_MFD_STMPE=y
-
-#
-# STMicroelectronics STMPE Interface Drivers
-#
-CONFIG_STMPE_I2C=y
-CONFIG_STMPE_SPI=y
-# end of STMicroelectronics STMPE Interface Drivers
-
 CONFIG_MFD_SYSCON=y
 CONFIG_MFD_TI_AM335X_TSCADC=m
 CONFIG_MFD_LP3943=m
@@ -5425,11 +5169,8 @@ CONFIG_TPS65010=m
 CONFIG_TPS6507X=m
 CONFIG_MFD_TPS65086=m
 CONFIG_MFD_TPS65090=y
-CONFIG_MFD_TPS65217=m
 CONFIG_MFD_TPS68470=y
 CONFIG_MFD_TI_LP873X=m
-CONFIG_MFD_TI_LP87565=m
-CONFIG_MFD_TPS65218=m
 CONFIG_MFD_TPS6586X=y
 CONFIG_MFD_TPS65910=y
 CONFIG_MFD_TPS65912=m
@@ -5441,10 +5182,8 @@ CONFIG_MFD_TWL4030_AUDIO=y
 CONFIG_TWL6040_CORE=y
 CONFIG_MFD_WL1273_CORE=m
 CONFIG_MFD_LM3533=m
-CONFIG_MFD_TC3589X=y
 CONFIG_MFD_TQMX86=m
 CONFIG_MFD_VX855=m
-CONFIG_MFD_LOCHNAGAR=y
 CONFIG_MFD_ARIZONA=y
 CONFIG_MFD_ARIZONA_I2C=m
 CONFIG_MFD_ARIZONA_SPI=m
@@ -5460,13 +5199,9 @@ CONFIG_MFD_WM831X_SPI=y
 CONFIG_MFD_WM8350=y
 CONFIG_MFD_WM8350_I2C=y
 CONFIG_MFD_WM8994=m
-CONFIG_MFD_ROHM_BD718XX=m
-CONFIG_MFD_ROHM_BD70528=m
-CONFIG_MFD_ROHM_BD71828=m
-CONFIG_MFD_STPMIC1=m
-CONFIG_MFD_STMFX=m
 CONFIG_MFD_WCD934X=m
 CONFIG_RAVE_SP_CORE=m
+CONFIG_MFD_INTEL_M10_BMC=m
 # end of Multifunction device drivers
 
 CONFIG_REGULATOR=y
@@ -5478,74 +5213,52 @@ CONFIG_REGULATOR_88PG86X=m
 CONFIG_REGULATOR_88PM800=m
 CONFIG_REGULATOR_88PM8607=m
 CONFIG_REGULATOR_ACT8865=m
-CONFIG_REGULATOR_ACT8945A=m
 CONFIG_REGULATOR_AD5398=m
 CONFIG_REGULATOR_AAT2870=m
 CONFIG_REGULATOR_AB3100=m
 CONFIG_REGULATOR_ARIZONA_LDO1=m
 CONFIG_REGULATOR_ARIZONA_MICSUPP=m
 CONFIG_REGULATOR_AS3711=m
-CONFIG_REGULATOR_AS3722=m
 CONFIG_REGULATOR_AXP20X=m
 CONFIG_REGULATOR_BCM590XX=m
-CONFIG_REGULATOR_BD70528=m
-CONFIG_REGULATOR_BD71828=m
-CONFIG_REGULATOR_BD718XX=m
 CONFIG_REGULATOR_BD9571MWV=m
-CONFIG_REGULATOR_CPCAP=m
-CONFIG_REGULATOR_CROS_EC=m
 CONFIG_REGULATOR_DA903X=m
 CONFIG_REGULATOR_DA9052=m
 CONFIG_REGULATOR_DA9055=m
 CONFIG_REGULATOR_DA9062=m
-CONFIG_REGULATOR_DA9063=m
 CONFIG_REGULATOR_DA9210=m
 CONFIG_REGULATOR_DA9211=m
 CONFIG_REGULATOR_FAN53555=m
-CONFIG_REGULATOR_FAN53880=m
 CONFIG_REGULATOR_GPIO=m
-CONFIG_REGULATOR_HI6421=m
-CONFIG_REGULATOR_HI6421V530=m
 CONFIG_REGULATOR_ISL9305=m
 CONFIG_REGULATOR_ISL6271A=m
 CONFIG_REGULATOR_LM363X=m
-CONFIG_REGULATOR_LOCHNAGAR=m
 CONFIG_REGULATOR_LP3971=m
 CONFIG_REGULATOR_LP3972=m
 CONFIG_REGULATOR_LP872X=m
-CONFIG_REGULATOR_LP873X=m
 CONFIG_REGULATOR_LP8755=m
-CONFIG_REGULATOR_LP87565=m
 CONFIG_REGULATOR_LP8788=m
 CONFIG_REGULATOR_LTC3589=m
 CONFIG_REGULATOR_LTC3676=m
 CONFIG_REGULATOR_MAX14577=m
 CONFIG_REGULATOR_MAX1586=m
-CONFIG_REGULATOR_MAX77620=m
-CONFIG_REGULATOR_MAX77650=m
 CONFIG_REGULATOR_MAX8649=m
 CONFIG_REGULATOR_MAX8660=m
 CONFIG_REGULATOR_MAX8907=m
 CONFIG_REGULATOR_MAX8925=m
 CONFIG_REGULATOR_MAX8952=m
-CONFIG_REGULATOR_MAX8973=m
 CONFIG_REGULATOR_MAX8997=m
 CONFIG_REGULATOR_MAX8998=m
-CONFIG_REGULATOR_MAX77686=m
 CONFIG_REGULATOR_MAX77693=m
-CONFIG_REGULATOR_MAX77802=m
 CONFIG_REGULATOR_MAX77826=m
 CONFIG_REGULATOR_MC13XXX_CORE=m
 CONFIG_REGULATOR_MC13783=m
 CONFIG_REGULATOR_MC13892=m
-CONFIG_REGULATOR_MCP16502=m
-CONFIG_REGULATOR_MP5416=m
 CONFIG_REGULATOR_MP8859=m
-CONFIG_REGULATOR_MP886X=m
-CONFIG_REGULATOR_MPQ7920=m
 CONFIG_REGULATOR_MT6311=m
 CONFIG_REGULATOR_MT6323=m
 CONFIG_REGULATOR_MT6358=m
+CONFIG_REGULATOR_MT6360=m
 CONFIG_REGULATOR_MT6397=m
 CONFIG_REGULATOR_PALMAS=m
 CONFIG_REGULATOR_PCA9450=m
@@ -5556,22 +5269,16 @@ CONFIG_REGULATOR_PV88060=m
 CONFIG_REGULATOR_PV88080=m
 CONFIG_REGULATOR_PV88090=m
 CONFIG_REGULATOR_PWM=m
-CONFIG_REGULATOR_QCOM_SPMI=m
-CONFIG_REGULATOR_QCOM_USB_VBUS=m
+CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY=m
 CONFIG_REGULATOR_RC5T583=m
-CONFIG_REGULATOR_RK808=m
-CONFIG_REGULATOR_RN5T618=m
-CONFIG_REGULATOR_ROHM=m
+CONFIG_REGULATOR_RT4801=m
 CONFIG_REGULATOR_RT5033=m
+CONFIG_REGULATOR_RTMV20=m
 CONFIG_REGULATOR_S2MPA01=m
 CONFIG_REGULATOR_S2MPS11=m
 CONFIG_REGULATOR_S5M8767=m
 CONFIG_REGULATOR_SKY81452=m
 CONFIG_REGULATOR_SLG51000=m
-CONFIG_REGULATOR_STPMIC1=m
-CONFIG_REGULATOR_SY8106A=m
-CONFIG_REGULATOR_SY8824X=m
-CONFIG_REGULATOR_SY8827N=m
 CONFIG_REGULATOR_TPS51632=m
 CONFIG_REGULATOR_TPS6105X=m
 CONFIG_REGULATOR_TPS62360=m
@@ -5580,23 +5287,20 @@ CONFIG_REGULATOR_TPS6507X=m
 CONFIG_REGULATOR_TPS65086=m
 CONFIG_REGULATOR_TPS65090=m
 CONFIG_REGULATOR_TPS65132=m
-CONFIG_REGULATOR_TPS65217=m
-CONFIG_REGULATOR_TPS65218=m
 CONFIG_REGULATOR_TPS6524X=m
 CONFIG_REGULATOR_TPS6586X=m
 CONFIG_REGULATOR_TPS65910=m
 CONFIG_REGULATOR_TPS65912=m
 CONFIG_REGULATOR_TPS80031=m
 CONFIG_REGULATOR_TWL4030=m
-CONFIG_REGULATOR_VCTRL=m
 CONFIG_REGULATOR_WM831X=m
 CONFIG_REGULATOR_WM8350=m
 CONFIG_REGULATOR_WM8400=m
 CONFIG_REGULATOR_WM8994=m
-CONFIG_REGULATOR_QCOM_LABIBB=m
-CONFIG_RC_CORE=m
+CONFIG_RC_CORE=y
 CONFIG_RC_MAP=m
 CONFIG_LIRC=y
+CONFIG_BPF_LIRC_MODE2=y
 CONFIG_RC_DECODERS=y
 CONFIG_IR_NEC_DECODER=m
 CONFIG_IR_RC5_DECODER=m
@@ -5612,7 +5316,6 @@ CONFIG_IR_RCMM_DECODER=m
 CONFIG_RC_DEVICES=y
 CONFIG_RC_ATI_REMOTE=m
 CONFIG_IR_ENE=m
-CONFIG_IR_HIX5HD2=m
 CONFIG_IR_IMON=m
 CONFIG_IR_IMON_RAW=m
 CONFIG_IR_MCEUSB=m
@@ -5620,16 +5323,12 @@ CONFIG_IR_ITE_CIR=m
 CONFIG_IR_FINTEK=m
 CONFIG_IR_NUVOTON=m
 CONFIG_IR_REDRAT3=m
-CONFIG_IR_SPI=m
 CONFIG_IR_STREAMZAP=m
 CONFIG_IR_WINBOND_CIR=m
 CONFIG_IR_IGORPLUGUSB=m
 CONFIG_IR_IGUANA=m
 CONFIG_IR_TTUSBIR=m
 CONFIG_RC_LOOPBACK=m
-CONFIG_IR_GPIO_CIR=m
-CONFIG_IR_GPIO_TX=m
-CONFIG_IR_PWM_TX=m
 CONFIG_IR_SERIAL=m
 CONFIG_IR_SERIAL_TRANSMITTER=y
 CONFIG_IR_SIR=m
@@ -5649,7 +5348,7 @@ CONFIG_CEC_SECO_RC=y
 CONFIG_USB_PULSE8_CEC=m
 CONFIG_USB_RAINSHADOW_CEC=m
 CONFIG_MEDIA_SUPPORT=m
-# CONFIG_MEDIA_SUPPORT_FILTER is not set
+CONFIG_MEDIA_SUPPORT_FILTER=y
 CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
 
 #
@@ -5659,18 +5358,14 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y
 CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
 CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
 CONFIG_MEDIA_RADIO_SUPPORT=y
-CONFIG_MEDIA_SDR_SUPPORT=y
+# CONFIG_MEDIA_SDR_SUPPORT is not set
 CONFIG_MEDIA_PLATFORM_SUPPORT=y
-CONFIG_MEDIA_TEST_SUPPORT=y
+# CONFIG_MEDIA_TEST_SUPPORT is not set
 # end of Media device types
 
-#
-# Media core support
-#
 CONFIG_VIDEO_DEV=m
 CONFIG_MEDIA_CONTROLLER=y
 CONFIG_DVB_CORE=m
-# end of Media core support
 
 #
 # Video4Linux options
@@ -5693,11 +5388,6 @@ CONFIG_VIDEOBUF_VMALLOC=m
 # Media controller options
 #
 CONFIG_MEDIA_CONTROLLER_DVB=y
-CONFIG_MEDIA_CONTROLLER_REQUEST_API=y
-
-#
-# Please notice that the enabled Media controller Request API is EXPERIMENTAL
-#
 # end of Media controller options
 
 #
@@ -5706,7 +5396,7 @@ CONFIG_MEDIA_CONTROLLER_REQUEST_API=y
 CONFIG_DVB_MMAP=y
 CONFIG_DVB_NET=y
 CONFIG_DVB_MAX_ADAPTERS=16
-# CONFIG_DVB_DYNAMIC_MINORS is not set
+CONFIG_DVB_DYNAMIC_MINORS=y
 # CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set
 # CONFIG_DVB_ULE_DEBUG is not set
 # end of Digital TV options
@@ -5714,6 +5404,10 @@ CONFIG_DVB_MAX_ADAPTERS=16
 #
 # Media drivers
 #
+
+#
+# Drivers filtered as selected at 'Filter media drivers'
+#
 CONFIG_TTPCI_EEPROM=m
 CONFIG_MEDIA_USB_SUPPORT=y
 
@@ -5870,13 +5564,6 @@ CONFIG_VIDEO_EM28XX_V4L2=m
 CONFIG_VIDEO_EM28XX_ALSA=m
 CONFIG_VIDEO_EM28XX_DVB=m
 CONFIG_VIDEO_EM28XX_RC=m
-
-#
-# Software defined radio USB devices
-#
-CONFIG_USB_AIRSPY=m
-CONFIG_USB_HACKRF=m
-CONFIG_USB_MSI2500=m
 CONFIG_MEDIA_PCI_SUPPORT=y
 
 #
@@ -5996,34 +5683,20 @@ CONFIG_VIDEO_SAA7146_VV=m
 CONFIG_SMS_SIANO_MDTV=m
 CONFIG_SMS_SIANO_RC=y
 # CONFIG_SMS_SIANO_DEBUGFS is not set
-CONFIG_VIDEO_V4L2_TPG=m
 CONFIG_V4L_PLATFORM_DRIVERS=y
 CONFIG_VIDEO_CAFE_CCIC=m
 CONFIG_VIDEO_CADENCE=y
 CONFIG_VIDEO_CADENCE_CSI2RX=m
 CONFIG_VIDEO_CADENCE_CSI2TX=m
 CONFIG_VIDEO_ASPEED=m
-CONFIG_VIDEO_MUX=m
-CONFIG_VIDEO_XILINX=m
-CONFIG_VIDEO_XILINX_CSI2RXSS=m
-CONFIG_VIDEO_XILINX_TPG=m
-CONFIG_VIDEO_XILINX_VTC=m
 CONFIG_V4L_MEM2MEM_DRIVERS=y
 CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m
 CONFIG_DVB_PLATFORM_DRIVERS=y
-CONFIG_SDR_PLATFORM_DRIVERS=y
 
 #
 # MMC/SDIO DVB adapters
 #
 CONFIG_SMS_SDIO_DRV=m
-CONFIG_V4L_TEST_DRIVERS=y
-CONFIG_VIDEO_VIMC=m
-CONFIG_VIDEO_VIVID=m
-CONFIG_VIDEO_VIVID_CEC=y
-CONFIG_VIDEO_VIVID_MAX_DEVS=64
-CONFIG_VIDEO_VIM2M=m
-CONFIG_VIDEO_VICODEC=m
 
 #
 # FireWire (IEEE 1394) Adapters
@@ -6032,6 +5705,8 @@ CONFIG_DVB_FIREDTV=m
 CONFIG_DVB_FIREDTV_INPUT=y
 # end of Media drivers
 
+CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y
+
 #
 # Media ancillary drivers
 #
@@ -6043,109 +5718,39 @@ CONFIG_MEDIA_ATTACH=y
 CONFIG_VIDEO_IR_I2C=m
 
 #
-# Audio decoders, processors and mixers
+# audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers'
 #
 CONFIG_VIDEO_TVAUDIO=m
 CONFIG_VIDEO_TDA7432=m
 CONFIG_VIDEO_TDA9840=m
-CONFIG_VIDEO_TDA1997X=m
 CONFIG_VIDEO_TEA6415C=m
 CONFIG_VIDEO_TEA6420=m
 CONFIG_VIDEO_MSP3400=m
 CONFIG_VIDEO_CS3308=m
 CONFIG_VIDEO_CS5345=m
 CONFIG_VIDEO_CS53L32A=m
-CONFIG_VIDEO_TLV320AIC23B=m
 CONFIG_VIDEO_UDA1342=m
 CONFIG_VIDEO_WM8775=m
 CONFIG_VIDEO_WM8739=m
 CONFIG_VIDEO_VP27SMPX=m
 CONFIG_VIDEO_SONY_BTF_MPX=m
-# end of Audio decoders, processors and mixers
-
-#
-# RDS decoders
-#
 CONFIG_VIDEO_SAA6588=m
-# end of RDS decoders
-
-#
-# Video decoders
-#
-CONFIG_VIDEO_ADV7180=m
-CONFIG_VIDEO_ADV7183=m
-CONFIG_VIDEO_ADV748X=m
-CONFIG_VIDEO_ADV7604=m
-CONFIG_VIDEO_ADV7604_CEC=y
-CONFIG_VIDEO_ADV7842=m
-CONFIG_VIDEO_ADV7842_CEC=y
-CONFIG_VIDEO_BT819=m
-CONFIG_VIDEO_BT856=m
-CONFIG_VIDEO_BT866=m
-CONFIG_VIDEO_KS0127=m
-CONFIG_VIDEO_ML86V7667=m
-CONFIG_VIDEO_SAA7110=m
 CONFIG_VIDEO_SAA711X=m
-CONFIG_VIDEO_TC358743=m
-CONFIG_VIDEO_TC358743_CEC=y
-CONFIG_VIDEO_TVP514X=m
 CONFIG_VIDEO_TVP5150=m
-CONFIG_VIDEO_TVP7002=m
 CONFIG_VIDEO_TW2804=m
 CONFIG_VIDEO_TW9903=m
 CONFIG_VIDEO_TW9906=m
-CONFIG_VIDEO_TW9910=m
-CONFIG_VIDEO_VPX3220=m
-CONFIG_VIDEO_MAX9286=m
 
 #
 # Video and audio decoders
 #
 CONFIG_VIDEO_SAA717X=m
 CONFIG_VIDEO_CX25840=m
-# end of Video decoders
-
-#
-# Video encoders
-#
 CONFIG_VIDEO_SAA7127=m
-CONFIG_VIDEO_SAA7185=m
-CONFIG_VIDEO_ADV7170=m
-CONFIG_VIDEO_ADV7175=m
-CONFIG_VIDEO_ADV7343=m
-CONFIG_VIDEO_ADV7393=m
-CONFIG_VIDEO_AD9389B=m
-CONFIG_VIDEO_AK881X=m
-CONFIG_VIDEO_THS8200=m
-# end of Video encoders
-
-#
-# Video improvement chips
-#
 CONFIG_VIDEO_UPD64031A=m
 CONFIG_VIDEO_UPD64083=m
-# end of Video improvement chips
-
-#
-# Audio/Video compression chips
-#
 CONFIG_VIDEO_SAA6752HS=m
-# end of Audio/Video compression chips
-
-#
-# SDR tuner chips
-#
-CONFIG_SDR_MAX2175=m
-# end of SDR tuner chips
-
-#
-# Miscellaneous helper chips
-#
-CONFIG_VIDEO_THS7303=m
 CONFIG_VIDEO_M52790=m
-CONFIG_VIDEO_I2C=m
-CONFIG_VIDEO_ST_MIPID02=m
-# end of Miscellaneous helper chips
 
 #
 # Camera sensor devices
@@ -6165,8 +5770,6 @@ CONFIG_VIDEO_OV2659=m
 CONFIG_VIDEO_OV2680=m
 CONFIG_VIDEO_OV2685=m
 CONFIG_VIDEO_OV2740=m
-CONFIG_VIDEO_OV5640=m
-CONFIG_VIDEO_OV5645=m
 CONFIG_VIDEO_OV5647=m
 CONFIG_VIDEO_OV6650=m
 CONFIG_VIDEO_OV5670=m
@@ -6224,10 +5827,8 @@ CONFIG_VIDEO_LM3646=m
 # end of Flash devices
 
 #
-# SPI helper chips
+# SPI I2C drivers auto-selected by 'Autoselect ancillary drivers'
 #
-CONFIG_VIDEO_GS1662=m
-# end of SPI helper chips
 
 #
 # Media SPI Adapters
@@ -6238,7 +5839,7 @@ CONFIG_CXD2880_SPI_DRV=m
 CONFIG_MEDIA_TUNER=m
 
 #
-# Customize TV tuners
+# Tuner drivers auto-selected by 'Autoselect ancillary drivers'
 #
 CONFIG_MEDIA_TUNER_SIMPLE=m
 CONFIG_MEDIA_TUNER_TDA18250=m
@@ -6248,7 +5849,6 @@ CONFIG_MEDIA_TUNER_TDA18271=m
 CONFIG_MEDIA_TUNER_TDA9887=m
 CONFIG_MEDIA_TUNER_TEA5761=m
 CONFIG_MEDIA_TUNER_TEA5767=m
-CONFIG_MEDIA_TUNER_MSI001=m
 CONFIG_MEDIA_TUNER_MT20XX=m
 CONFIG_MEDIA_TUNER_MT2060=m
 CONFIG_MEDIA_TUNER_MT2063=m
@@ -6277,10 +5877,9 @@ CONFIG_MEDIA_TUNER_R820T=m
 CONFIG_MEDIA_TUNER_MXL301RF=m
 CONFIG_MEDIA_TUNER_QM1D1C0042=m
 CONFIG_MEDIA_TUNER_QM1D1B0004=m
-# end of Customize TV tuners
 
 #
-# Customise DVB Frontends
+# DVB Frontend drivers auto-selected by 'Autoselect ancillary drivers'
 #
 
 #
@@ -6342,7 +5941,6 @@ CONFIG_DVB_SP8870=m
 CONFIG_DVB_SP887X=m
 CONFIG_DVB_CX22700=m
 CONFIG_DVB_CX22702=m
-CONFIG_DVB_S5H1432=m
 CONFIG_DVB_DRXD=m
 CONFIG_DVB_L64781=m
 CONFIG_DVB_TDA1004X=m
@@ -6353,7 +5951,6 @@ CONFIG_DVB_DIB3000MB=m
 CONFIG_DVB_DIB3000MC=m
 CONFIG_DVB_DIB7000M=m
 CONFIG_DVB_DIB7000P=m
-CONFIG_DVB_DIB9000=m
 CONFIG_DVB_TDA10048=m
 CONFIG_DVB_AF9013=m
 CONFIG_DVB_EC100=m
@@ -6362,12 +5959,10 @@ CONFIG_DVB_CXD2820R=m
 CONFIG_DVB_CXD2841ER=m
 CONFIG_DVB_RTL2830=m
 CONFIG_DVB_RTL2832=m
-CONFIG_DVB_RTL2832_SDR=m
 CONFIG_DVB_SI2168=m
 CONFIG_DVB_AS102_FE=m
 CONFIG_DVB_ZD1301_DEMOD=m
 CONFIG_DVB_GP8PSK_FE=m
-CONFIG_DVB_CXD2880=m
 
 #
 # DVB-C (cable) frontends
@@ -6405,7 +6000,6 @@ CONFIG_DVB_MB86A20S=m
 # ISDB-S (satellite) & ISDB-T (terrestrial) frontends
 #
 CONFIG_DVB_TC90522=m
-CONFIG_DVB_MN88443X=m
 
 #
 # Digital terrestrial only tuners/PLL
@@ -6419,14 +6013,12 @@ CONFIG_DVB_TUNER_DIB0090=m
 #
 CONFIG_DVB_DRX39XYJ=m
 CONFIG_DVB_LNBH25=m
-CONFIG_DVB_LNBH29=m
 CONFIG_DVB_LNBP21=m
 CONFIG_DVB_LNBP22=m
 CONFIG_DVB_ISL6405=m
 CONFIG_DVB_ISL6421=m
 CONFIG_DVB_ISL6423=m
 CONFIG_DVB_A8293=m
-CONFIG_DVB_LGS8GL5=m
 CONFIG_DVB_LGS8GXX=m
 CONFIG_DVB_ATBM8830=m
 CONFIG_DVB_TDA665x=m
@@ -6442,12 +6034,6 @@ CONFIG_DVB_HELENE=m
 #
 CONFIG_DVB_CXD2099=m
 CONFIG_DVB_SP2=m
-# end of Customise DVB Frontends
-
-#
-# Tools to develop new frontends
-#
-CONFIG_DVB_DUMMY_FE=m
 # end of Media ancillary drivers
 
 #
@@ -6469,10 +6055,8 @@ CONFIG_DRM_DP_AUX_CHARDEV=y
 # CONFIG_DRM_DEBUG_SELFTEST is not set
 CONFIG_DRM_KMS_HELPER=m
 CONFIG_DRM_KMS_FB_HELPER=y
-# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set
 CONFIG_DRM_FBDEV_EMULATION=y
 CONFIG_DRM_FBDEV_OVERALLOC=100
-# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
 CONFIG_DRM_LOAD_EDID_FIRMWARE=y
 CONFIG_DRM_DP_CEC=y
 CONFIG_DRM_TTM=m
@@ -6496,7 +6080,6 @@ CONFIG_DRM_I2C_NXP_TDA9950=m
 #
 # ARM devices
 #
-CONFIG_DRM_KOMEDA=m
 # end of ARM devices
 
 CONFIG_DRM_RADEON=m
@@ -6520,7 +6103,7 @@ CONFIG_DRM_AMD_DC=y
 CONFIG_DRM_AMD_DC_DCN=y
 CONFIG_DRM_AMD_DC_DCN3_0=y
 CONFIG_DRM_AMD_DC_HDCP=y
-# CONFIG_DEBUG_KERNEL_DC is not set
+CONFIG_DRM_AMD_DC_SI=y
 # end of Display Engine Configuration
 
 CONFIG_HSA_AMD=y
@@ -6539,25 +6122,6 @@ CONFIG_DRM_I915_COMPRESS_ERROR=y
 CONFIG_DRM_I915_USERPTR=y
 CONFIG_DRM_I915_GVT=y
 CONFIG_DRM_I915_GVT_KVMGT=m
-
-#
-# drm/i915 Debugging
-#
-# CONFIG_DRM_I915_WERROR is not set
-# CONFIG_DRM_I915_DEBUG is not set
-# CONFIG_DRM_I915_DEBUG_MMIO is not set
-# CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set
-# CONFIG_DRM_I915_SW_FENCE_CHECK_DAG is not set
-# CONFIG_DRM_I915_DEBUG_GUC is not set
-# CONFIG_DRM_I915_SELFTEST is not set
-# CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set
-# CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set
-# CONFIG_DRM_I915_DEBUG_RUNTIME_PM is not set
-# end of drm/i915 Debugging
-
-#
-# drm/i915 Profile Guided Optimisation
-#
 CONFIG_DRM_I915_FENCE_TIMEOUT=10000
 CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250
 CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500
@@ -6565,8 +6129,6 @@ CONFIG_DRM_I915_PREEMPT_TIMEOUT=640
 CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT=8000
 CONFIG_DRM_I915_STOP_TIMEOUT=100
 CONFIG_DRM_I915_TIMESLICE_DURATION=1
-# end of drm/i915 Profile Guided Optimisation
-
 CONFIG_DRM_VGEM=m
 CONFIG_DRM_VKMS=m
 CONFIG_DRM_VMWGFX=m
@@ -6577,8 +6139,6 @@ CONFIG_DRM_GMA3600=y
 CONFIG_DRM_UDL=m
 CONFIG_DRM_AST=m
 CONFIG_DRM_MGAG200=m
-CONFIG_DRM_RCAR_DW_HDMI=m
-CONFIG_DRM_RCAR_LVDS=m
 CONFIG_DRM_QXL=m
 CONFIG_DRM_BOCHS=m
 CONFIG_DRM_VIRTIO_GPU=m
@@ -6587,57 +6147,7 @@ CONFIG_DRM_PANEL=y
 #
 # Display Panels
 #
-CONFIG_DRM_PANEL_ARM_VERSATILE=m
-CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596=m
-CONFIG_DRM_PANEL_BOE_HIMAX8279D=m
-CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
-CONFIG_DRM_PANEL_LVDS=m
-CONFIG_DRM_PANEL_SIMPLE=m
-CONFIG_DRM_PANEL_ELIDA_KD35T133=m
-CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m
-CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m
-CONFIG_DRM_PANEL_ILITEK_IL9322=m
-CONFIG_DRM_PANEL_ILITEK_ILI9881C=m
-CONFIG_DRM_PANEL_INNOLUX_P079ZCA=m
-CONFIG_DRM_PANEL_JDI_LT070ME05000=m
-CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04=m
-CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W=m
-CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829=m
-CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
-CONFIG_DRM_PANEL_LG_LB035Q02=m
-CONFIG_DRM_PANEL_LG_LG4573=m
-CONFIG_DRM_PANEL_NEC_NL8048HL11=m
-CONFIG_DRM_PANEL_NOVATEK_NT35510=m
-CONFIG_DRM_PANEL_NOVATEK_NT39016=m
-CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO=m
-CONFIG_DRM_PANEL_ORISETECH_OTM8009A=m
-CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS=m
-CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m
 CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
-CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
-CONFIG_DRM_PANEL_RAYDIUM_RM68200=m
-CONFIG_DRM_PANEL_RONBO_RB070D30=m
-CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=m
-CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m
-CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m
-CONFIG_DRM_PANEL_SAMSUNG_S6E63M0=m
-CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01=m
-CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
-CONFIG_DRM_PANEL_SEIKO_43WVF1G=m
-CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m
-CONFIG_DRM_PANEL_SHARP_LS037V7DW01=m
-CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m
-CONFIG_DRM_PANEL_SITRONIX_ST7701=m
-CONFIG_DRM_PANEL_SITRONIX_ST7703=m
-CONFIG_DRM_PANEL_SITRONIX_ST7789V=m
-CONFIG_DRM_PANEL_SONY_ACX424AKP=m
-CONFIG_DRM_PANEL_SONY_ACX565AKM=m
-CONFIG_DRM_PANEL_TPO_TD028TTEC1=m
-CONFIG_DRM_PANEL_TPO_TD043MTEA1=m
-CONFIG_DRM_PANEL_TPO_TPG110=m
-CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
-CONFIG_DRM_PANEL_VISIONOX_RM69299=m
-CONFIG_DRM_PANEL_XINPENG_XPP055C272=m
 # end of Display Panels
 
 CONFIG_DRM_BRIDGE=y
@@ -6646,42 +6156,11 @@ CONFIG_DRM_PANEL_BRIDGE=y
 #
 # Display Interface Bridges
 #
-CONFIG_DRM_CDNS_DSI=m
-CONFIG_DRM_CHRONTEL_CH7033=m
-CONFIG_DRM_DISPLAY_CONNECTOR=m
-CONFIG_DRM_LVDS_CODEC=m
-CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW=m
-CONFIG_DRM_NWL_MIPI_DSI=m
-CONFIG_DRM_NXP_PTN3460=m
-CONFIG_DRM_PARADE_PS8622=m
-CONFIG_DRM_PARADE_PS8640=m
-CONFIG_DRM_SIL_SII8620=m
-CONFIG_DRM_SII902X=m
-CONFIG_DRM_SII9234=m
-CONFIG_DRM_SIMPLE_BRIDGE=m
-CONFIG_DRM_THINE_THC63LVD1024=m
-CONFIG_DRM_TOSHIBA_TC358764=m
-CONFIG_DRM_TOSHIBA_TC358767=m
-CONFIG_DRM_TOSHIBA_TC358768=m
-CONFIG_DRM_TI_TFP410=m
-CONFIG_DRM_TI_SN65DSI86=m
-CONFIG_DRM_TI_TPD12S015=m
-CONFIG_DRM_ANALOGIX_ANX6345=m
 CONFIG_DRM_ANALOGIX_ANX78XX=m
 CONFIG_DRM_ANALOGIX_DP=m
-CONFIG_DRM_I2C_ADV7511=m
-CONFIG_DRM_I2C_ADV7511_AUDIO=y
-CONFIG_DRM_I2C_ADV7511_CEC=y
-CONFIG_DRM_DW_HDMI=m
-CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
-CONFIG_DRM_DW_HDMI_I2S_AUDIO=m
-CONFIG_DRM_DW_HDMI_CEC=m
 # end of Display Interface Bridges
 
 # CONFIG_DRM_ETNAVIV is not set
-CONFIG_DRM_ARCPGU=m
-CONFIG_DRM_MXS=y
-CONFIG_DRM_MXSFB=m
 CONFIG_DRM_CIRRUS_QEMU=m
 CONFIG_DRM_GM12U320=m
 CONFIG_TINYDRM_HX8357D=m
@@ -6715,8 +6194,7 @@ CONFIG_FB_SYS_IMAGEBLIT=m
 # CONFIG_FB_FOREIGN_ENDIAN is not set
 CONFIG_FB_SYS_FOPS=m
 CONFIG_FB_DEFERRED_IO=y
-CONFIG_FB_BACKLIGHT=m
-CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FB_MODE_HELPERS is not set
 CONFIG_FB_TILEBLITTING=y
 
 #
@@ -6740,7 +6218,6 @@ CONFIG_FB_EFI=y
 # CONFIG_FB_RIVA is not set
 # CONFIG_FB_I740 is not set
 # CONFIG_FB_LE80578 is not set
-# CONFIG_FB_INTEL is not set
 # CONFIG_FB_MATROX is not set
 # CONFIG_FB_RADEON is not set
 # CONFIG_FB_ATY128 is not set
@@ -6768,7 +6245,6 @@ CONFIG_XEN_FBDEV_FRONTEND=m
 # CONFIG_FB_MB862XX is not set
 CONFIG_FB_HYPERV=m
 CONFIG_FB_SIMPLE=y
-# CONFIG_FB_SSD1307 is not set
 # CONFIG_FB_SM712 is not set
 # end of Frame buffer Devices
 
@@ -6789,6 +6265,7 @@ CONFIG_LCD_LMS501KF03=m
 CONFIG_LCD_HX8357=m
 CONFIG_LCD_OTM3225A=m
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_KTD253=m
 CONFIG_BACKLIGHT_LM3533=m
 CONFIG_BACKLIGHT_PWM=m
 CONFIG_BACKLIGHT_DA903X=m
@@ -6810,14 +6287,12 @@ CONFIG_BACKLIGHT_LP855X=m
 CONFIG_BACKLIGHT_LP8788=m
 CONFIG_BACKLIGHT_PANDORA=m
 CONFIG_BACKLIGHT_SKY81452=m
-CONFIG_BACKLIGHT_TPS65217=m
 CONFIG_BACKLIGHT_AS3711=m
 CONFIG_BACKLIGHT_GPIO=m
 CONFIG_BACKLIGHT_LV5207LP=m
 CONFIG_BACKLIGHT_BD6107=m
 CONFIG_BACKLIGHT_ARCXCNN=m
 CONFIG_BACKLIGHT_RAVE_SP=m
-CONFIG_BACKLIGHT_LED=m
 # end of Backlight & LCD device support
 
 CONFIG_VIDEOMODE_HELPERS=y
@@ -6981,7 +6456,7 @@ CONFIG_SND_HDA_INTEL=m
 CONFIG_SND_HDA_HWDEP=y
 CONFIG_SND_HDA_RECONFIG=y
 CONFIG_SND_HDA_INPUT_BEEP=y
-CONFIG_SND_HDA_INPUT_BEEP_MODE=1
+CONFIG_SND_HDA_INPUT_BEEP_MODE=0
 CONFIG_SND_HDA_PATCH_LOADER=y
 CONFIG_SND_HDA_CODEC_REALTEK=m
 CONFIG_SND_HDA_CODEC_ANALOG=m
@@ -6996,7 +6471,7 @@ CONFIG_SND_HDA_CODEC_CA0132_DSP=y
 CONFIG_SND_HDA_CODEC_CMEDIA=m
 CONFIG_SND_HDA_CODEC_SI3054=m
 CONFIG_SND_HDA_GENERIC=m
-CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0
+CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1
 CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM=y
 # end of HD-Audio
 
@@ -7053,7 +6528,6 @@ CONFIG_SND_SOC_AMD_RV_RT5682_MACH=m
 CONFIG_SND_SOC_AMD_RENOIR=m
 CONFIG_SND_SOC_AMD_RENOIR_MACH=m
 CONFIG_SND_ATMEL_SOC=m
-CONFIG_SND_SOC_MIKROE_PROTO=m
 CONFIG_SND_BCM63XX_I2S_WHISTLER=m
 CONFIG_SND_DESIGNWARE_I2S=m
 CONFIG_SND_DESIGNWARE_PCM=y
@@ -7084,13 +6558,8 @@ CONFIG_SND_SOC_IMG_SPDIF_IN=m
 CONFIG_SND_SOC_IMG_SPDIF_OUT=m
 CONFIG_SND_SOC_IMG_PISTACHIO_INTERNAL_DAC=m
 CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y
-CONFIG_SND_SST_IPC=m
-CONFIG_SND_SST_IPC_PCI=m
-CONFIG_SND_SST_IPC_ACPI=m
-CONFIG_SND_SOC_INTEL_SST_ACPI=m
 CONFIG_SND_SOC_INTEL_SST=m
-CONFIG_SND_SOC_INTEL_SST_FIRMWARE=m
-CONFIG_SND_SOC_INTEL_HASWELL=m
+CONFIG_SND_SOC_INTEL_CATPT=m
 CONFIG_SND_SST_ATOM_HIFI2_PLATFORM=m
 CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI=m
 CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI=m
@@ -7109,7 +6578,7 @@ CONFIG_SND_SOC_INTEL_SKYLAKE_SSP_CLK=m
 CONFIG_SND_SOC_INTEL_SKYLAKE_COMMON=m
 CONFIG_SND_SOC_ACPI_INTEL_MATCH=m
 CONFIG_SND_SOC_INTEL_MACH=y
-# CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES is not set
+CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES=y
 CONFIG_SND_SOC_INTEL_HASWELL_MACH=m
 CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH=m
 CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH=m
@@ -7146,13 +6615,12 @@ CONFIG_SND_SOC_INTEL_CML_LP_DA7219_MAX98357A_MACH=m
 CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH=m
 CONFIG_SND_SOC_INTEL_SOF_DA7219_MAX98373_MACH=m
 CONFIG_SND_SOC_INTEL_EHL_RT5660_MACH=m
+CONFIG_SND_SOC_INTEL_SOUNDWIRE_SOF_MACH=m
 CONFIG_SND_SOC_MTK_BTCVSD=m
 CONFIG_SND_SOC_SOF_TOPLEVEL=y
 CONFIG_SND_SOC_SOF_PCI=m
 CONFIG_SND_SOC_SOF_ACPI=m
-CONFIG_SND_SOC_SOF_OF=m
 # CONFIG_SND_SOC_SOF_DEBUG_PROBES is not set
-# CONFIG_SND_SOC_SOF_DEVELOPER_SUPPORT is not set
 CONFIG_SND_SOC_SOF=m
 CONFIG_SND_SOC_SOF_PROBE_WORK_QUEUE=y
 CONFIG_SND_SOC_SOF_INTEL_TOPLEVEL=y
@@ -7161,6 +6629,7 @@ CONFIG_SND_SOC_SOF_INTEL_PCI=m
 CONFIG_SND_SOC_SOF_INTEL_HIFI_EP_IPC=m
 CONFIG_SND_SOC_SOF_INTEL_ATOM_HIFI_EP=m
 CONFIG_SND_SOC_SOF_INTEL_COMMON=m
+# CONFIG_SND_SOC_SOF_BROADWELL_SUPPORT is not set
 CONFIG_SND_SOC_SOF_MERRIFIELD_SUPPORT=y
 CONFIG_SND_SOC_SOF_MERRIFIELD=m
 CONFIG_SND_SOC_SOF_APOLLOLAKE_SUPPORT=y
@@ -7188,6 +6657,9 @@ CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC=y
 # CONFIG_SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1 is not set
 CONFIG_SND_SOC_SOF_HDA_LINK_BASELINE=m
 CONFIG_SND_SOC_SOF_HDA=m
+CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE_LINK=y
+CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE=m
+CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE=m
 CONFIG_SND_SOC_SOF_XTENSA=m
 
 #
@@ -7227,7 +6699,6 @@ CONFIG_SND_SOC_AK5558=m
 CONFIG_SND_SOC_ALC5623=m
 CONFIG_SND_SOC_BD28623=m
 # CONFIG_SND_SOC_BT_SCO is not set
-CONFIG_SND_SOC_CPCAP=m
 CONFIG_SND_SOC_CROS_EC_CODEC=m
 CONFIG_SND_SOC_CS35L32=m
 CONFIG_SND_SOC_CS35L33=m
@@ -7240,6 +6711,7 @@ CONFIG_SND_SOC_CS42L51_I2C=m
 CONFIG_SND_SOC_CS42L52=m
 CONFIG_SND_SOC_CS42L56=m
 CONFIG_SND_SOC_CS42L73=m
+CONFIG_SND_SOC_CS4234=m
 CONFIG_SND_SOC_CS4265=m
 CONFIG_SND_SOC_CS4270=m
 CONFIG_SND_SOC_CS4271=m
@@ -7266,7 +6738,6 @@ CONFIG_SND_SOC_GTM601=m
 CONFIG_SND_SOC_HDAC_HDMI=m
 CONFIG_SND_SOC_HDAC_HDA=m
 CONFIG_SND_SOC_INNO_RK3036=m
-CONFIG_SND_SOC_LOCHNAGAR_SC=m
 CONFIG_SND_SOC_MAX98088=m
 CONFIG_SND_SOC_MAX98090=m
 CONFIG_SND_SOC_MAX98357A=m
@@ -7278,7 +6749,6 @@ CONFIG_SND_SOC_MAX98373_I2C=m
 CONFIG_SND_SOC_MAX98373_SDW=m
 CONFIG_SND_SOC_MAX98390=m
 CONFIG_SND_SOC_MAX9860=m
-CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
 CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
 CONFIG_SND_SOC_PCM1681=m
 CONFIG_SND_SOC_PCM1789=m
@@ -7305,6 +6775,7 @@ CONFIG_SND_SOC_RT286=m
 CONFIG_SND_SOC_RT298=m
 CONFIG_SND_SOC_RT1011=m
 CONFIG_SND_SOC_RT1015=m
+CONFIG_SND_SOC_RT1308=m
 CONFIG_SND_SOC_RT1308_SDW=m
 CONFIG_SND_SOC_RT5514=m
 CONFIG_SND_SOC_RT5514_SPI=m
@@ -7345,6 +6816,7 @@ CONFIG_SND_SOC_STA350=m
 CONFIG_SND_SOC_STI_SAS=m
 CONFIG_SND_SOC_TAS2552=m
 CONFIG_SND_SOC_TAS2562=m
+CONFIG_SND_SOC_TAS2764=m
 CONFIG_SND_SOC_TAS2770=m
 CONFIG_SND_SOC_TAS5086=m
 CONFIG_SND_SOC_TAS571X=m
@@ -7408,7 +6880,6 @@ CONFIG_SND_SOC_TPA6130A2=m
 
 CONFIG_SND_SIMPLE_CARD_UTILS=m
 CONFIG_SND_SIMPLE_CARD=m
-CONFIG_SND_AUDIO_GRAPH_CARD=m
 CONFIG_SND_X86=y
 CONFIG_HDMI_LPE_AUDIO=m
 CONFIG_SND_SYNTH_EMUX=m
@@ -7418,11 +6889,11 @@ CONFIG_AC97_BUS=m
 #
 # HID support
 #
-CONFIG_HID=m
+CONFIG_HID=y
 CONFIG_HID_BATTERY_STRENGTH=y
 CONFIG_HIDRAW=y
 CONFIG_UHID=m
-CONFIG_HID_GENERIC=m
+CONFIG_HID_GENERIC=y
 
 #
 # Special HID drivers
@@ -7461,6 +6932,7 @@ CONFIG_HID_GLORIOUS=m
 CONFIG_HID_HOLTEK=m
 CONFIG_HOLTEK_FF=y
 CONFIG_HID_GOOGLE_HAMMER=m
+CONFIG_HID_VIVALDI=m
 CONFIG_HID_GT683R=m
 CONFIG_HID_KEYTOUCH=m
 CONFIG_HID_KYE=m
@@ -7546,13 +7018,6 @@ CONFIG_HID_MCP2221=m
 CONFIG_USB_HID=m
 CONFIG_HID_PID=y
 CONFIG_USB_HIDDEV=y
-
-#
-# USB HID Boot Protocol drivers
-#
-# CONFIG_USB_KBD is not set
-# CONFIG_USB_MOUSE is not set
-# end of USB HID Boot Protocol drivers
 # end of USB HID support
 
 #
@@ -7584,10 +7049,10 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 # Miscellaneous USB options
 #
 CONFIG_USB_DEFAULT_PERSIST=y
-CONFIG_USB_DYNAMIC_MINORS=y
+# CONFIG_USB_FEW_INIT_RETRIES is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_PRODUCTLIST is not set
-# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set
 CONFIG_USB_LEDS_TRIGGER_USBPORT=m
 CONFIG_USB_AUTOSUSPEND_DELAY=2
 CONFIG_USB_MON=m
@@ -7596,26 +7061,25 @@ CONFIG_USB_MON=m
 # USB Host Controller Drivers
 #
 CONFIG_USB_C67X00_HCD=m
-CONFIG_USB_XHCI_HCD=m
+CONFIG_USB_XHCI_HCD=y
 # CONFIG_USB_XHCI_DBGCAP is not set
 CONFIG_USB_XHCI_PCI=m
 CONFIG_USB_XHCI_PCI_RENESAS=m
 CONFIG_USB_XHCI_PLATFORM=m
-CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
 CONFIG_USB_EHCI_TT_NEWSCHED=y
-CONFIG_USB_EHCI_PCI=m
+CONFIG_USB_EHCI_PCI=y
 CONFIG_USB_EHCI_FSL=m
 CONFIG_USB_EHCI_HCD_PLATFORM=m
 CONFIG_USB_OXU210HP_HCD=m
 CONFIG_USB_ISP116X_HCD=m
 CONFIG_USB_FOTG210_HCD=m
 CONFIG_USB_MAX3421_HCD=m
-CONFIG_USB_OHCI_HCD=m
-CONFIG_USB_OHCI_HCD_PCI=m
-# CONFIG_USB_OHCI_HCD_SSB is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PCI=y
 CONFIG_USB_OHCI_HCD_PLATFORM=m
-CONFIG_USB_UHCI_HCD=m
+CONFIG_USB_UHCI_HCD=y
 CONFIG_USB_U132_HCD=m
 CONFIG_USB_SL811_HCD=m
 # CONFIG_USB_SL811_HCD_ISO is not set
@@ -7668,62 +7132,13 @@ CONFIG_USBIP_VHCI_HCD=m
 CONFIG_USBIP_VHCI_HC_PORTS=8
 CONFIG_USBIP_VHCI_NR_HCS=1
 CONFIG_USBIP_HOST=m
-CONFIG_USBIP_VUDC=m
 # CONFIG_USBIP_DEBUG is not set
-CONFIG_USB_CDNS3=m
-CONFIG_USB_CDNS3_GADGET=y
-CONFIG_USB_CDNS3_HOST=y
-CONFIG_USB_CDNS3_PCI_WRAP=m
-CONFIG_USB_MUSB_HDRC=m
-# CONFIG_USB_MUSB_HOST is not set
-# CONFIG_USB_MUSB_GADGET is not set
-CONFIG_USB_MUSB_DUAL_ROLE=y
-
-#
-# Platform Glue Layer
-#
-
-#
-# MUSB DMA mode
-#
-# CONFIG_MUSB_PIO_ONLY is not set
-CONFIG_USB_DWC3=m
-CONFIG_USB_DWC3_ULPI=y
-# CONFIG_USB_DWC3_HOST is not set
-# CONFIG_USB_DWC3_GADGET is not set
-CONFIG_USB_DWC3_DUAL_ROLE=y
-
-#
-# Platform Glue Driver Support
-#
-CONFIG_USB_DWC3_PCI=m
-CONFIG_USB_DWC3_HAPS=m
-CONFIG_USB_DWC3_OF_SIMPLE=m
-CONFIG_USB_DWC2=m
-# CONFIG_USB_DWC2_HOST is not set
-
-#
-# Gadget/Dual-role mode requires USB Gadget support to be enabled
-#
-# CONFIG_USB_DWC2_PERIPHERAL is not set
-CONFIG_USB_DWC2_DUAL_ROLE=y
-CONFIG_USB_DWC2_PCI=m
-# CONFIG_USB_DWC2_DEBUG is not set
-# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set
-CONFIG_USB_CHIPIDEA=m
-CONFIG_USB_CHIPIDEA_UDC=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_CHIPIDEA_PCI=m
-CONFIG_USB_CHIPIDEA_MSM=m
-CONFIG_USB_CHIPIDEA_IMX=m
-CONFIG_USB_CHIPIDEA_GENERIC=m
-CONFIG_USB_CHIPIDEA_TEGRA=m
-CONFIG_USB_ISP1760=m
-CONFIG_USB_ISP1760_HCD=y
-CONFIG_USB_ISP1761_UDC=y
-# CONFIG_USB_ISP1760_HOST_ROLE is not set
-# CONFIG_USB_ISP1760_GADGET_ROLE is not set
-CONFIG_USB_ISP1760_DUAL_ROLE=y
+# CONFIG_USB_CDNS3 is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_DWC3 is not set
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_CHIPIDEA is not set
+# CONFIG_USB_ISP1760 is not set
 
 #
 # USB port drivers
@@ -7803,7 +7218,6 @@ CONFIG_USB_FTDI_ELAN=m
 CONFIG_USB_APPLEDISPLAY=m
 CONFIG_APPLE_MFI_FASTCHARGE=m
 CONFIG_USB_SISUSBVGA=m
-CONFIG_USB_SISUSBVGA_CON=y
 CONFIG_USB_LD=m
 CONFIG_USB_TRANCEVIBRATOR=m
 CONFIG_USB_IOWARRIOR=m
@@ -7834,127 +7248,13 @@ CONFIG_TAHVO_USB=m
 CONFIG_USB_ISP1301=m
 # end of USB Physical Layer drivers
 
-CONFIG_USB_GADGET=m
-# CONFIG_USB_GADGET_DEBUG is not set
-# CONFIG_USB_GADGET_DEBUG_FILES is not set
-# CONFIG_USB_GADGET_DEBUG_FS is not set
-CONFIG_USB_GADGET_VBUS_DRAW=2
-CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
-CONFIG_U_SERIAL_CONSOLE=y
-
-#
-# USB Peripheral Controller
-#
-CONFIG_USB_FOTG210_UDC=m
-CONFIG_USB_GR_UDC=m
-CONFIG_USB_R8A66597=m
-CONFIG_USB_PXA27X=m
-CONFIG_USB_MV_UDC=m
-CONFIG_USB_MV_U3D=m
-CONFIG_USB_SNP_CORE=m
-CONFIG_USB_SNP_UDC_PLAT=m
-CONFIG_USB_M66592=m
-CONFIG_USB_BDC_UDC=m
-
-#
-# Platform Support
-#
-CONFIG_USB_BDC_PCI=m
-CONFIG_USB_AMD5536UDC=m
-CONFIG_USB_NET2272=m
-CONFIG_USB_NET2272_DMA=y
-CONFIG_USB_NET2280=m
-CONFIG_USB_GOKU=m
-CONFIG_USB_EG20T=m
-CONFIG_USB_GADGET_XILINX=m
-CONFIG_USB_MAX3420_UDC=m
-CONFIG_USB_DUMMY_HCD=m
-# end of USB Peripheral Controller
-
-CONFIG_USB_LIBCOMPOSITE=m
-CONFIG_USB_F_ACM=m
-CONFIG_USB_F_SS_LB=m
-CONFIG_USB_U_SERIAL=m
-CONFIG_USB_U_ETHER=m
-CONFIG_USB_U_AUDIO=m
-CONFIG_USB_F_SERIAL=m
-CONFIG_USB_F_OBEX=m
-CONFIG_USB_F_NCM=m
-CONFIG_USB_F_ECM=m
-CONFIG_USB_F_PHONET=m
-CONFIG_USB_F_EEM=m
-CONFIG_USB_F_SUBSET=m
-CONFIG_USB_F_RNDIS=m
-CONFIG_USB_F_MASS_STORAGE=m
-CONFIG_USB_F_FS=m
-CONFIG_USB_F_UAC1=m
-CONFIG_USB_F_UAC1_LEGACY=m
-CONFIG_USB_F_UAC2=m
-CONFIG_USB_F_UVC=m
-CONFIG_USB_F_MIDI=m
-CONFIG_USB_F_HID=m
-CONFIG_USB_F_PRINTER=m
-CONFIG_USB_F_TCM=m
-CONFIG_USB_CONFIGFS=m
-CONFIG_USB_CONFIGFS_SERIAL=y
-CONFIG_USB_CONFIGFS_ACM=y
-CONFIG_USB_CONFIGFS_OBEX=y
-CONFIG_USB_CONFIGFS_NCM=y
-CONFIG_USB_CONFIGFS_ECM=y
-CONFIG_USB_CONFIGFS_ECM_SUBSET=y
-CONFIG_USB_CONFIGFS_RNDIS=y
-CONFIG_USB_CONFIGFS_EEM=y
-CONFIG_USB_CONFIGFS_PHONET=y
-CONFIG_USB_CONFIGFS_MASS_STORAGE=y
-CONFIG_USB_CONFIGFS_F_LB_SS=y
-CONFIG_USB_CONFIGFS_F_FS=y
-CONFIG_USB_CONFIGFS_F_UAC1=y
-CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y
-CONFIG_USB_CONFIGFS_F_UAC2=y
-CONFIG_USB_CONFIGFS_F_MIDI=y
-CONFIG_USB_CONFIGFS_F_HID=y
-CONFIG_USB_CONFIGFS_F_UVC=y
-CONFIG_USB_CONFIGFS_F_PRINTER=y
-CONFIG_USB_CONFIGFS_F_TCM=y
-
-#
-# USB Gadget precomposed configurations
-#
-CONFIG_USB_ZERO=m
-CONFIG_USB_AUDIO=m
-# CONFIG_GADGET_UAC1 is not set
-CONFIG_USB_ETH=m
-CONFIG_USB_ETH_RNDIS=y
-CONFIG_USB_ETH_EEM=y
-CONFIG_USB_G_NCM=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_FUNCTIONFS=m
-CONFIG_USB_FUNCTIONFS_ETH=y
-CONFIG_USB_FUNCTIONFS_RNDIS=y
-CONFIG_USB_FUNCTIONFS_GENERIC=y
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_GADGET_TARGET=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_MIDI_GADGET=m
-CONFIG_USB_G_PRINTER=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_NOKIA=m
-CONFIG_USB_G_ACM_MS=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_RNDIS=y
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_USB_G_HID=m
-CONFIG_USB_G_DBGP=m
-# CONFIG_USB_G_DBGP_PRINTK is not set
-CONFIG_USB_G_DBGP_SERIAL=y
-CONFIG_USB_G_WEBCAM=m
-CONFIG_USB_RAW_GADGET=m
-# end of USB Gadget precomposed configurations
-
+# CONFIG_USB_GADGET is not set
 CONFIG_TYPEC=m
 CONFIG_TYPEC_TCPM=m
 CONFIG_TYPEC_TCPCI=m
 CONFIG_TYPEC_RT1711H=m
+CONFIG_TYPEC_MT6360=m
+CONFIG_TYPEC_TCPCI_MAXIM=m
 CONFIG_TYPEC_FUSB302=m
 CONFIG_TYPEC_WCOVE=m
 CONFIG_TYPEC_UCSI=m
@@ -7962,6 +7262,7 @@ CONFIG_UCSI_CCG=m
 CONFIG_UCSI_ACPI=m
 CONFIG_TYPEC_HD3SS3220=m
 CONFIG_TYPEC_TPS6598X=m
+CONFIG_TYPEC_STUSB160X=m
 
 #
 # USB Type-C Multiplexer/DeMultiplexer Switch support
@@ -7980,9 +7281,6 @@ CONFIG_TYPEC_NVIDIA_ALTMODE=m
 CONFIG_USB_ROLE_SWITCH=m
 CONFIG_USB_ROLES_INTEL_XHCI=m
 CONFIG_MMC=m
-CONFIG_PWRSEQ_EMMC=m
-CONFIG_PWRSEQ_SD8787=m
-CONFIG_PWRSEQ_SIMPLE=m
 CONFIG_MMC_BLOCK=m
 CONFIG_MMC_BLOCK_MINORS=8
 CONFIG_SDIO_UART=m
@@ -7998,13 +7296,7 @@ CONFIG_MMC_SDHCI_PCI=m
 CONFIG_MMC_RICOH_MMC=y
 CONFIG_MMC_SDHCI_ACPI=m
 CONFIG_MMC_SDHCI_PLTFM=m
-CONFIG_MMC_SDHCI_OF_ARASAN=m
-CONFIG_MMC_SDHCI_OF_ASPEED=m
-CONFIG_MMC_SDHCI_OF_AT91=m
-CONFIG_MMC_SDHCI_OF_DWCMSHC=m
-CONFIG_MMC_SDHCI_CADENCE=m
 CONFIG_MMC_SDHCI_F_SDH30=m
-CONFIG_MMC_SDHCI_MILBEAUT=m
 CONFIG_MMC_WBSD=m
 CONFIG_MMC_ALCOR=m
 CONFIG_MMC_TIFM_SD=m
@@ -8022,9 +7314,6 @@ CONFIG_MMC_HSQ=m
 CONFIG_MMC_TOSHIBA_PCI=m
 CONFIG_MMC_MTK=m
 CONFIG_MMC_SDHCI_XENON=m
-CONFIG_MMC_SDHCI_OMAP=m
-CONFIG_MMC_SDHCI_AM654=m
-CONFIG_MMC_SDHCI_EXTERNAL_DMA=y
 CONFIG_MEMSTICK=m
 # CONFIG_MEMSTICK_DEBUG is not set
 
@@ -8053,21 +7342,12 @@ CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y
 # LED drivers
 #
 CONFIG_LEDS_88PM860X=m
-CONFIG_LEDS_AAT1290=m
-CONFIG_LEDS_AN30259A=m
 CONFIG_LEDS_APU=m
 CONFIG_LEDS_AS3645A=m
-CONFIG_LEDS_AW2013=m
-CONFIG_LEDS_BCM6328=m
-CONFIG_LEDS_BCM6358=m
-CONFIG_LEDS_CPCAP=m
-CONFIG_LEDS_CR0014114=m
-CONFIG_LEDS_EL15203000=m
 CONFIG_LEDS_LM3530=m
 CONFIG_LEDS_LM3532=m
 CONFIG_LEDS_LM3533=m
 CONFIG_LEDS_LM3642=m
-CONFIG_LEDS_LM3692X=m
 CONFIG_LEDS_LM3601X=m
 CONFIG_LEDS_MT6323=m
 CONFIG_LEDS_PCA9532=m
@@ -8075,9 +7355,8 @@ CONFIG_LEDS_PCA9532_GPIO=y
 CONFIG_LEDS_GPIO=m
 CONFIG_LEDS_LP3944=m
 CONFIG_LEDS_LP3952=m
-# CONFIG_LEDS_LP55XX_COMMON is not set
+CONFIG_LEDS_LP50XX=m
 CONFIG_LEDS_LP8788=m
-CONFIG_LEDS_LP8860=m
 CONFIG_LEDS_CLEVO_MAIL=m
 CONFIG_LEDS_PCA955X=m
 CONFIG_LEDS_PCA955X_GPIO=y
@@ -8091,32 +7370,23 @@ CONFIG_LEDS_PWM=m
 CONFIG_LEDS_REGULATOR=m
 CONFIG_LEDS_BD2802=m
 CONFIG_LEDS_INTEL_SS4200=m
-CONFIG_LEDS_LT3593=m
 CONFIG_LEDS_ADP5520=m
 CONFIG_LEDS_MC13783=m
 CONFIG_LEDS_TCA6507=m
 CONFIG_LEDS_TLC591XX=m
-CONFIG_LEDS_MAX77650=m
-CONFIG_LEDS_MAX77693=m
 CONFIG_LEDS_MAX8997=m
 CONFIG_LEDS_LM355x=m
 CONFIG_LEDS_MENF21BMC=m
-CONFIG_LEDS_KTD2692=m
-CONFIG_LEDS_IS31FL319X=m
-CONFIG_LEDS_IS31FL32XX=m
 
 #
 # LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)
 #
 CONFIG_LEDS_BLINKM=m
-CONFIG_LEDS_SYSCON=y
 CONFIG_LEDS_MLXCPLD=m
 CONFIG_LEDS_MLXREG=m
 CONFIG_LEDS_USER=m
 CONFIG_LEDS_NIC78BX=m
-CONFIG_LEDS_SPI_BYTE=m
 CONFIG_LEDS_TI_LMU_COMMON=m
-CONFIG_LEDS_LM3697=m
 CONFIG_LEDS_LM36274=m
 CONFIG_LEDS_TPS6105X=m
 CONFIG_LEDS_SGM3140=m
@@ -8256,25 +7526,20 @@ CONFIG_RTC_DRV_88PM80X=m
 CONFIG_RTC_DRV_ABB5ZES3=m
 CONFIG_RTC_DRV_ABEOZ9=m
 CONFIG_RTC_DRV_ABX80X=m
-CONFIG_RTC_DRV_AS3722=m
 CONFIG_RTC_DRV_DS1307=m
 CONFIG_RTC_DRV_DS1307_CENTURY=y
 CONFIG_RTC_DRV_DS1374=m
 CONFIG_RTC_DRV_DS1374_WDT=y
 CONFIG_RTC_DRV_DS1672=m
-CONFIG_RTC_DRV_HYM8563=m
 CONFIG_RTC_DRV_LP8788=m
 CONFIG_RTC_DRV_MAX6900=m
 CONFIG_RTC_DRV_MAX8907=m
 CONFIG_RTC_DRV_MAX8925=m
 CONFIG_RTC_DRV_MAX8998=m
 CONFIG_RTC_DRV_MAX8997=m
-CONFIG_RTC_DRV_MAX77686=m
-CONFIG_RTC_DRV_RK808=m
 CONFIG_RTC_DRV_RS5C372=m
 CONFIG_RTC_DRV_ISL1208=m
 CONFIG_RTC_DRV_ISL12022=m
-CONFIG_RTC_DRV_ISL12026=m
 CONFIG_RTC_DRV_X1205=m
 CONFIG_RTC_DRV_PCF8523=m
 CONFIG_RTC_DRV_PCF85063=m
@@ -8283,15 +7548,12 @@ CONFIG_RTC_DRV_PCF8563=m
 CONFIG_RTC_DRV_PCF8583=m
 CONFIG_RTC_DRV_M41T80=m
 CONFIG_RTC_DRV_M41T80_WDT=y
-CONFIG_RTC_DRV_BD70528=m
 CONFIG_RTC_DRV_BQ32K=m
-CONFIG_RTC_DRV_TWL4030=m
 CONFIG_RTC_DRV_PALMAS=m
 CONFIG_RTC_DRV_TPS6586X=m
 CONFIG_RTC_DRV_TPS65910=m
 CONFIG_RTC_DRV_TPS80031=m
 CONFIG_RTC_DRV_RC5T583=m
-CONFIG_RTC_DRV_RC5T619=m
 CONFIG_RTC_DRV_S35390A=m
 CONFIG_RTC_DRV_FM3130=m
 CONFIG_RTC_DRV_RX8010=m
@@ -8299,6 +7561,7 @@ CONFIG_RTC_DRV_RX8581=m
 CONFIG_RTC_DRV_RX8025=m
 CONFIG_RTC_DRV_EM3027=m
 CONFIG_RTC_DRV_RV3028=m
+CONFIG_RTC_DRV_RV3032=m
 CONFIG_RTC_DRV_RV8803=m
 CONFIG_RTC_DRV_S5M=m
 CONFIG_RTC_DRV_SD3078=m
@@ -8362,19 +7625,15 @@ CONFIG_RTC_DRV_WM831X=m
 CONFIG_RTC_DRV_WM8350=m
 CONFIG_RTC_DRV_PCF50633=m
 CONFIG_RTC_DRV_AB3100=m
-CONFIG_RTC_DRV_ZYNQMP=m
 CONFIG_RTC_DRV_CROS_EC=m
 
 #
 # on-CPU RTC drivers
 #
-CONFIG_RTC_DRV_CADENCE=m
 CONFIG_RTC_DRV_FTRTC010=m
 CONFIG_RTC_DRV_PCAP=m
 CONFIG_RTC_DRV_MC13XXX=m
 CONFIG_RTC_DRV_MT6397=m
-CONFIG_RTC_DRV_R7301=m
-CONFIG_RTC_DRV_CPCAP=m
 
 #
 # HID Sensor RTC drivers
@@ -8390,20 +7649,16 @@ CONFIG_DMADEVICES=y
 CONFIG_DMA_ENGINE=y
 CONFIG_DMA_VIRTUAL_CHANNELS=y
 CONFIG_DMA_ACPI=y
-CONFIG_DMA_OF=y
 CONFIG_ALTERA_MSGDMA=m
-CONFIG_DW_AXI_DMAC=m
-CONFIG_FSL_EDMA=m
 CONFIG_INTEL_IDMA64=m
 CONFIG_INTEL_IDXD=m
 CONFIG_INTEL_IOATDMA=m
-CONFIG_INTEL_MIC_X100_DMA=m
 CONFIG_PLX_DMA=m
 CONFIG_XILINX_ZYNQMP_DPDMA=m
 CONFIG_QCOM_HIDMA_MGMT=m
 CONFIG_QCOM_HIDMA=m
 CONFIG_DW_DMAC_CORE=y
-CONFIG_DW_DMAC=y
+CONFIG_DW_DMAC=m
 CONFIG_DW_DMAC_PCI=y
 CONFIG_DW_EDMA=m
 CONFIG_DW_EDMA_PCIE=m
@@ -8427,6 +7682,7 @@ CONFIG_UDMABUF=y
 # CONFIG_DMABUF_SELFTESTS is not set
 CONFIG_DMABUF_HEAPS=y
 CONFIG_DMABUF_HEAPS_SYSTEM=y
+CONFIG_DMABUF_HEAPS_CMA=y
 # end of DMABUF options
 
 CONFIG_DCA=m
@@ -8438,7 +7694,6 @@ CONFIG_KS0108_DELAY=2
 CONFIG_CFAG12864B=m
 CONFIG_CFAG12864B_RATE=20
 CONFIG_IMG_ASCII_LCD=m
-CONFIG_HT16K33=m
 CONFIG_PARPORT_PANEL=m
 CONFIG_PANEL_PARPORT=0
 CONFIG_PANEL_PROFILE=5
@@ -8473,6 +7728,7 @@ CONFIG_VFIO_MDEV_DEVICE=m
 CONFIG_IRQ_BYPASS_MANAGER=m
 CONFIG_VIRT_DRIVERS=y
 CONFIG_VBOXGUEST=m
+CONFIG_NITRO_ENCLAVES=m
 CONFIG_VIRTIO=y
 CONFIG_VIRTIO_MENU=y
 CONFIG_VIRTIO_PCI=m
@@ -8484,6 +7740,7 @@ CONFIG_VIRTIO_MEM=m
 CONFIG_VIRTIO_INPUT=m
 CONFIG_VIRTIO_MMIO=m
 CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
+CONFIG_VIRTIO_DMA_SHARED_BUFFER=m
 CONFIG_VDPA=m
 CONFIG_VDPA_SIM=m
 CONFIG_IFCVF=m
@@ -8546,97 +7803,7 @@ CONFIG_XEN_UNPOPULATED_ALLOC=y
 # CONFIG_GREYBUS is not set
 CONFIG_STAGING=y
 CONFIG_PRISM2_USB=m
-CONFIG_COMEDI=m
-# CONFIG_COMEDI_DEBUG is not set
-CONFIG_COMEDI_DEFAULT_BUF_SIZE_KB=2048
-CONFIG_COMEDI_DEFAULT_BUF_MAXSIZE_KB=20480
-CONFIG_COMEDI_MISC_DRIVERS=y
-CONFIG_COMEDI_BOND=m
-CONFIG_COMEDI_TEST=m
-CONFIG_COMEDI_PARPORT=m
-# CONFIG_COMEDI_ISA_DRIVERS is not set
-CONFIG_COMEDI_PCI_DRIVERS=m
-CONFIG_COMEDI_8255_PCI=m
-CONFIG_COMEDI_ADDI_WATCHDOG=m
-CONFIG_COMEDI_ADDI_APCI_1032=m
-CONFIG_COMEDI_ADDI_APCI_1500=m
-CONFIG_COMEDI_ADDI_APCI_1516=m
-CONFIG_COMEDI_ADDI_APCI_1564=m
-CONFIG_COMEDI_ADDI_APCI_16XX=m
-CONFIG_COMEDI_ADDI_APCI_2032=m
-CONFIG_COMEDI_ADDI_APCI_2200=m
-CONFIG_COMEDI_ADDI_APCI_3120=m
-CONFIG_COMEDI_ADDI_APCI_3501=m
-CONFIG_COMEDI_ADDI_APCI_3XXX=m
-CONFIG_COMEDI_ADL_PCI6208=m
-CONFIG_COMEDI_ADL_PCI7X3X=m
-CONFIG_COMEDI_ADL_PCI8164=m
-CONFIG_COMEDI_ADL_PCI9111=m
-CONFIG_COMEDI_ADL_PCI9118=m
-CONFIG_COMEDI_ADV_PCI1710=m
-CONFIG_COMEDI_ADV_PCI1720=m
-CONFIG_COMEDI_ADV_PCI1723=m
-CONFIG_COMEDI_ADV_PCI1724=m
-CONFIG_COMEDI_ADV_PCI1760=m
-CONFIG_COMEDI_ADV_PCI_DIO=m
-CONFIG_COMEDI_AMPLC_DIO200_PCI=m
-CONFIG_COMEDI_AMPLC_PC236_PCI=m
-CONFIG_COMEDI_AMPLC_PC263_PCI=m
-CONFIG_COMEDI_AMPLC_PCI224=m
-CONFIG_COMEDI_AMPLC_PCI230=m
-CONFIG_COMEDI_CONTEC_PCI_DIO=m
-CONFIG_COMEDI_DAS08_PCI=m
-CONFIG_COMEDI_DT3000=m
-CONFIG_COMEDI_DYNA_PCI10XX=m
-CONFIG_COMEDI_GSC_HPDI=m
-CONFIG_COMEDI_MF6X4=m
-CONFIG_COMEDI_ICP_MULTI=m
-CONFIG_COMEDI_DAQBOARD2000=m
-CONFIG_COMEDI_JR3_PCI=m
-CONFIG_COMEDI_KE_COUNTER=m
-CONFIG_COMEDI_CB_PCIDAS64=m
-CONFIG_COMEDI_CB_PCIDAS=m
-CONFIG_COMEDI_CB_PCIDDA=m
-CONFIG_COMEDI_CB_PCIMDAS=m
-CONFIG_COMEDI_CB_PCIMDDA=m
-CONFIG_COMEDI_ME4000=m
-CONFIG_COMEDI_ME_DAQ=m
-CONFIG_COMEDI_NI_6527=m
-CONFIG_COMEDI_NI_65XX=m
-CONFIG_COMEDI_NI_660X=m
-CONFIG_COMEDI_NI_670X=m
-CONFIG_COMEDI_NI_LABPC_PCI=m
-CONFIG_COMEDI_NI_PCIDIO=m
-CONFIG_COMEDI_NI_PCIMIO=m
-CONFIG_COMEDI_RTD520=m
-CONFIG_COMEDI_S626=m
-CONFIG_COMEDI_MITE=m
-CONFIG_COMEDI_NI_TIOCMD=m
-CONFIG_COMEDI_PCMCIA_DRIVERS=m
-CONFIG_COMEDI_CB_DAS16_CS=m
-CONFIG_COMEDI_DAS08_CS=m
-CONFIG_COMEDI_NI_DAQ_700_CS=m
-CONFIG_COMEDI_NI_DAQ_DIO24_CS=m
-CONFIG_COMEDI_NI_LABPC_CS=m
-CONFIG_COMEDI_NI_MIO_CS=m
-CONFIG_COMEDI_QUATECH_DAQP_CS=m
-CONFIG_COMEDI_USB_DRIVERS=m
-CONFIG_COMEDI_DT9812=m
-CONFIG_COMEDI_NI_USB6501=m
-CONFIG_COMEDI_USBDUX=m
-CONFIG_COMEDI_USBDUXFAST=m
-CONFIG_COMEDI_USBDUXSIGMA=m
-CONFIG_COMEDI_VMK80XX=m
-CONFIG_COMEDI_8254=m
-CONFIG_COMEDI_8255=m
-CONFIG_COMEDI_8255_SA=m
-CONFIG_COMEDI_KCOMEDILIB=m
-CONFIG_COMEDI_AMPLC_DIO200=m
-CONFIG_COMEDI_AMPLC_PC236=m
-CONFIG_COMEDI_DAS08=m
-CONFIG_COMEDI_NI_LABPC=m
-CONFIG_COMEDI_NI_TIO=m
-CONFIG_COMEDI_NI_ROUTING=m
+# CONFIG_COMEDI is not set
 CONFIG_RTL8192U=m
 CONFIG_RTLLIB=m
 CONFIG_RTLLIB_CRYPTO_CCMP=m
@@ -8717,23 +7884,22 @@ CONFIG_STAGING_MEDIA=y
 CONFIG_INTEL_ATOMISP=y
 CONFIG_VIDEO_ATOMISP=m
 CONFIG_VIDEO_ATOMISP_ISP2401=y
-CONFIG_VIDEO_ATOMISP_OV5693=m
 CONFIG_VIDEO_ATOMISP_OV2722=m
 CONFIG_VIDEO_ATOMISP_GC2235=m
 CONFIG_VIDEO_ATOMISP_MSRLIST_HELPER=m
 CONFIG_VIDEO_ATOMISP_MT9M114=m
 CONFIG_VIDEO_ATOMISP_GC0310=m
 CONFIG_VIDEO_ATOMISP_OV2680=m
+CONFIG_VIDEO_ATOMISP_OV5693=m
 CONFIG_VIDEO_ATOMISP_LM3554=m
+# CONFIG_VIDEO_ZORAN is not set
 CONFIG_VIDEO_IPU3_IMGU=m
-CONFIG_VIDEO_USBVISION=m
 
 #
 # Android
 #
 # end of Android
 
-CONFIG_STAGING_BOARD=y
 CONFIG_LTE_GDM724X=m
 CONFIG_FIREWIRE_SERIAL=m
 CONFIG_FWTTY_MAX_TOTAL_PORTS=64
@@ -8745,11 +7911,9 @@ CONFIG_UNISYS_VISORINPUT=m
 CONFIG_UNISYS_VISORHBA=m
 # CONFIG_FB_TFT is not set
 CONFIG_MOST_COMPONENTS=m
-CONFIG_MOST_CDEV=m
 CONFIG_MOST_NET=m
 CONFIG_MOST_SOUND=m
 CONFIG_MOST_VIDEO=m
-CONFIG_MOST_DIM2=m
 CONFIG_MOST_I2C=m
 CONFIG_KS7010=m
 CONFIG_PI433=m
@@ -8761,11 +7925,7 @@ CONFIG_STAGING_GASKET_FRAMEWORK=m
 CONFIG_STAGING_APEX_DRIVER=m
 # end of Gasket devices
 
-CONFIG_XIL_AXIS_FIFO=m
 CONFIG_FIELDBUS_DEV=m
-CONFIG_HMS_ANYBUSS_BUS=m
-CONFIG_ARCX_ANYBUS_CONTROLLER=m
-CONFIG_HMS_PROFINET=m
 CONFIG_KPC2000=y
 CONFIG_KPC2000_CORE=m
 CONFIG_KPC2000_SPI=m
@@ -8879,14 +8039,12 @@ CONFIG_INTEL_SCU_PLATFORM=m
 CONFIG_INTEL_SCU_IPC_UTIL=m
 CONFIG_INTEL_TELEMETRY=m
 CONFIG_PMC_ATOM=y
-CONFIG_MFD_CROS_EC=m
 CONFIG_CHROME_PLATFORMS=y
 CONFIG_CHROMEOS_LAPTOP=m
 CONFIG_CHROMEOS_PSTORE=m
 CONFIG_CHROMEOS_TBMC=m
 CONFIG_CROS_EC=m
 CONFIG_CROS_EC_I2C=m
-CONFIG_CROS_EC_RPMSG=m
 CONFIG_CROS_EC_ISHTP=m
 CONFIG_CROS_EC_SPI=m
 CONFIG_CROS_EC_LPC=m
@@ -8894,7 +8052,6 @@ CONFIG_CROS_EC_PROTO=y
 CONFIG_CROS_KBD_LED_BACKLIGHT=m
 CONFIG_CROS_EC_CHARDEV=m
 CONFIG_CROS_EC_LIGHTBAR=m
-CONFIG_CROS_EC_VBC=m
 CONFIG_CROS_EC_DEBUGFS=m
 CONFIG_CROS_EC_SENSORHUB=m
 CONFIG_CROS_EC_SYSFS=m
@@ -8913,46 +8070,29 @@ CONFIG_CLKDEV_LOOKUP=y
 CONFIG_HAVE_CLK_PREPARE=y
 CONFIG_COMMON_CLK=y
 CONFIG_COMMON_CLK_WM831X=m
-CONFIG_CLK_HSDK=y
-CONFIG_COMMON_CLK_MAX77686=m
 CONFIG_COMMON_CLK_MAX9485=m
-CONFIG_COMMON_CLK_RK808=m
 CONFIG_COMMON_CLK_SI5341=m
 CONFIG_COMMON_CLK_SI5351=m
-CONFIG_COMMON_CLK_SI514=m
 CONFIG_COMMON_CLK_SI544=m
-CONFIG_COMMON_CLK_SI570=m
 CONFIG_COMMON_CLK_CDCE706=m
-CONFIG_COMMON_CLK_CDCE925=m
 CONFIG_COMMON_CLK_CS2000_CP=m
 CONFIG_COMMON_CLK_S2MPS11=m
 CONFIG_CLK_TWL6040=m
-CONFIG_COMMON_CLK_LOCHNAGAR=m
 CONFIG_COMMON_CLK_PALMAS=m
 CONFIG_COMMON_CLK_PWM=m
-CONFIG_COMMON_CLK_VC5=m
-CONFIG_COMMON_CLK_BD718XX=m
-CONFIG_COMMON_CLK_FIXED_MMIO=y
-CONFIG_CLK_LGM_CGU=y
 CONFIG_HWSPINLOCK=y
 
 #
 # Clock Source drivers
 #
-CONFIG_TIMER_OF=y
-CONFIG_TIMER_PROBE=y
 CONFIG_CLKEVT_I8253=y
 CONFIG_I8253_LOCK=y
 CONFIG_CLKBLD_I8253=y
-CONFIG_CLKSRC_MMIO=y
-CONFIG_MICROCHIP_PIT64B=y
 # end of Clock Source drivers
 
 CONFIG_MAILBOX=y
-CONFIG_PLATFORM_MHU=m
 CONFIG_PCC=y
 CONFIG_ALTERA_MBOX=m
-CONFIG_MAILBOX_TEST=m
 CONFIG_IOMMU_IOVA=y
 CONFIG_IOASID=y
 CONFIG_IOMMU_API=y
@@ -8965,7 +8105,6 @@ CONFIG_IOMMU_SUPPORT=y
 
 # CONFIG_IOMMU_DEBUGFS is not set
 # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
-CONFIG_OF_IOMMU=y
 CONFIG_IOMMU_DMA=y
 CONFIG_AMD_IOMMU=y
 CONFIG_AMD_IOMMU_V2=y
@@ -8974,7 +8113,7 @@ CONFIG_INTEL_IOMMU=y
 CONFIG_INTEL_IOMMU_SVM=y
 # CONFIG_INTEL_IOMMU_DEFAULT_ON is not set
 CONFIG_INTEL_IOMMU_FLOPPY_WA=y
-# CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON is not set
+CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON=y
 CONFIG_IRQ_REMAP=y
 CONFIG_HYPERV_IOMMU=y
 
@@ -9003,6 +8142,7 @@ CONFIG_SOUNDWIRE=m
 CONFIG_SOUNDWIRE_CADENCE=m
 CONFIG_SOUNDWIRE_INTEL=m
 CONFIG_SOUNDWIRE_QCOM=m
+CONFIG_SOUNDWIRE_GENERIC_ALLOCATION=m
 
 #
 # SOC (System On Chip) specific Drivers
@@ -9036,6 +8176,7 @@ CONFIG_SOUNDWIRE_QCOM=m
 #
 # Qualcomm SoC drivers
 #
+CONFIG_QCOM_QMI_HELPERS=m
 # end of Qualcomm SoC drivers
 
 CONFIG_SOC_TI=y
@@ -9119,7 +8260,6 @@ CONFIG_BMC150_ACCEL_I2C=m
 CONFIG_BMC150_ACCEL_SPI=m
 CONFIG_DA280=m
 CONFIG_DA311=m
-CONFIG_DMARD06=m
 CONFIG_DMARD09=m
 CONFIG_DMARD10=m
 CONFIG_HID_SENSOR_ACCEL_3D=m
@@ -9176,10 +8316,8 @@ CONFIG_ADI_AXI_ADC=m
 CONFIG_AXP20X_ADC=m
 CONFIG_AXP288_ADC=m
 CONFIG_CC10001_ADC=m
-CONFIG_CPCAP_ADC=m
 CONFIG_DA9150_GPADC=m
 CONFIG_DLN2_ADC=m
-CONFIG_ENVELOPE_DETECTOR=m
 CONFIG_HI8435=m
 CONFIG_HX711=m
 CONFIG_INA2XX_ADC=m
@@ -9202,13 +8340,6 @@ CONFIG_MEN_Z188_ADC=m
 CONFIG_MP2629_ADC=m
 CONFIG_NAU7802=m
 CONFIG_PALMAS_GPADC=m
-CONFIG_QCOM_VADC_COMMON=m
-CONFIG_QCOM_SPMI_IADC=m
-CONFIG_QCOM_SPMI_VADC=m
-CONFIG_QCOM_SPMI_ADC5=m
-CONFIG_RN5T618_ADC=m
-CONFIG_SD_ADC_MODULATOR=m
-CONFIG_STMPE_ADC=m
 CONFIG_TI_ADC081C=m
 CONFIG_TI_ADC0832=m
 CONFIG_TI_ADC084S021=m
@@ -9218,14 +8349,10 @@ CONFIG_TI_ADC128S052=m
 CONFIG_TI_ADC161S626=m
 CONFIG_TI_ADS1015=m
 CONFIG_TI_ADS7950=m
-CONFIG_TI_ADS8344=m
-CONFIG_TI_ADS8688=m
-CONFIG_TI_ADS124S08=m
 CONFIG_TI_AM335X_ADC=m
 CONFIG_TI_TLC4541=m
 CONFIG_TWL4030_MADC=m
 CONFIG_TWL6030_GPADC=m
-CONFIG_VF610_ADC=m
 CONFIG_VIPERBOARD_ADC=m
 CONFIG_XILINX_XADC=m
 # end of Analog to digital converters
@@ -9233,7 +8360,6 @@ CONFIG_XILINX_XADC=m
 #
 # Analog Front Ends
 #
-CONFIG_IIO_RESCALE=m
 # end of Analog Front Ends
 
 #
@@ -9311,20 +8437,17 @@ CONFIG_AD5770R=m
 CONFIG_AD5791=m
 CONFIG_AD7303=m
 CONFIG_AD8801=m
-CONFIG_DPOT_DAC=m
 CONFIG_DS4424=m
 CONFIG_LTC1660=m
 CONFIG_LTC2632=m
 CONFIG_M62332=m
 CONFIG_MAX517=m
-CONFIG_MAX5821=m
 CONFIG_MCP4725=m
 CONFIG_MCP4922=m
 CONFIG_TI_DAC082S085=m
 CONFIG_TI_DAC5571=m
 CONFIG_TI_DAC7311=m
 CONFIG_TI_DAC7612=m
-CONFIG_VF610_DAC=m
 # end of Digital to analog converters
 
 #
@@ -9358,6 +8481,7 @@ CONFIG_ADIS16080=m
 CONFIG_ADIS16130=m
 CONFIG_ADIS16136=m
 CONFIG_ADIS16260=m
+CONFIG_ADXRS290=m
 CONFIG_ADXRS450=m
 CONFIG_BMG160=m
 CONFIG_BMG160_I2C=m
@@ -9394,6 +8518,7 @@ CONFIG_MAX30102=m
 CONFIG_AM2315=m
 CONFIG_DHT11=m
 CONFIG_HDC100X=m
+CONFIG_HDC2010=m
 CONFIG_HID_SENSOR_HUMIDITY=m
 CONFIG_HTS221=m
 CONFIG_HTS221_I2C=m
@@ -9426,7 +8551,6 @@ CONFIG_INV_MPU6050_SPI=m
 CONFIG_IIO_ST_LSM6DSX=m
 CONFIG_IIO_ST_LSM6DSX_I2C=m
 CONFIG_IIO_ST_LSM6DSX_SPI=m
-CONFIG_IIO_ST_LSM6DSX_I3C=m
 # end of Inertial measurement units
 
 CONFIG_IIO_ADIS_LIB=m
@@ -9442,12 +8566,12 @@ CONFIG_AL3010=m
 CONFIG_AL3320A=m
 CONFIG_APDS9300=m
 CONFIG_APDS9960=m
+CONFIG_AS73211=m
 CONFIG_BH1750=m
 CONFIG_BH1780=m
 CONFIG_CM32181=m
 CONFIG_CM3232=m
 CONFIG_CM3323=m
-CONFIG_CM3605=m
 CONFIG_CM36651=m
 CONFIG_IIO_CROS_EC_LIGHT_PROX=m
 CONFIG_GP2AP002=m
@@ -9492,7 +8616,6 @@ CONFIG_ZOPT2201=m
 #
 # Magnetometer sensors
 #
-CONFIG_AK8974=m
 CONFIG_AK8975=m
 CONFIG_AK09911=m
 CONFIG_BMC150_MAGN=m
@@ -9515,7 +8638,6 @@ CONFIG_SENSORS_RM3100_SPI=m
 #
 # Multiplexers
 #
-CONFIG_IIO_MUX=m
 # end of Multiplexers
 
 #
@@ -9648,46 +8770,24 @@ CONFIG_NTB_SWITCHTEC=m
 # CONFIG_NTB_PERF is not set
 # CONFIG_NTB_MSI_TEST is not set
 CONFIG_NTB_TRANSPORT=m
-CONFIG_VME_BUS=y
-
-#
-# VME Bridge Drivers
-#
-CONFIG_VME_CA91CX42=m
-CONFIG_VME_TSI148=m
-# CONFIG_VME_FAKE is not set
-
-#
-# VME Board Drivers
-#
-CONFIG_VMIVME_7805=m
-
-#
-# VME Device Drivers
-#
-CONFIG_VME_USER=m
+# CONFIG_VME_BUS is not set
 CONFIG_PWM=y
 CONFIG_PWM_SYSFS=y
 # CONFIG_PWM_DEBUG is not set
-CONFIG_PWM_ATMEL_HLCDC_PWM=m
 CONFIG_PWM_CRC=y
 CONFIG_PWM_CROS_EC=m
-CONFIG_PWM_FSL_FTM=m
 CONFIG_PWM_IQS620A=m
 CONFIG_PWM_LP3943=m
 CONFIG_PWM_LPSS=m
 CONFIG_PWM_LPSS_PCI=m
 CONFIG_PWM_LPSS_PLATFORM=m
 CONFIG_PWM_PCA9685=m
-CONFIG_PWM_STMPE=y
 CONFIG_PWM_TWL=m
 CONFIG_PWM_TWL_LED=m
 
 #
 # IRQ chip support
 #
-CONFIG_IRQCHIP=y
-CONFIG_AL_FIC=y
 CONFIG_MADERA_IRQ=m
 # end of IRQ chip support
 
@@ -9696,32 +8796,21 @@ CONFIG_BOARD_TPCI200=m
 CONFIG_SERIAL_IPOCTAL=m
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RESET_BRCMSTB_RESCAL=y
-CONFIG_RESET_INTEL_GW=y
 CONFIG_RESET_TI_SYSCON=m
 
 #
 # PHY Subsystem
 #
 CONFIG_GENERIC_PHY=y
-CONFIG_GENERIC_PHY_MIPI_DPHY=y
+CONFIG_USB_LGM_PHY=m
 CONFIG_BCM_KONA_USB2_PHY=m
-CONFIG_PHY_CADENCE_TORRENT=m
-CONFIG_PHY_CADENCE_DPHY=m
-CONFIG_PHY_CADENCE_SIERRA=m
-CONFIG_PHY_CADENCE_SALVO=m
-CONFIG_PHY_FSL_IMX8MQ_USB=m
-CONFIG_PHY_MIXEL_MIPI_DPHY=m
 CONFIG_PHY_PXA_28NM_HSIC=m
 CONFIG_PHY_PXA_28NM_USB2=m
 CONFIG_PHY_CPCAP_USB=m
-CONFIG_PHY_MAPPHONE_MDM6600=m
-CONFIG_PHY_OCELOT_SERDES=m
 CONFIG_PHY_QCOM_USB_HS=m
 CONFIG_PHY_QCOM_USB_HSIC=m
-CONFIG_PHY_SAMSUNG_USB2=m
 CONFIG_PHY_TUSB1210=m
-CONFIG_PHY_INTEL_COMBO=y
-CONFIG_PHY_INTEL_EMMC=m
+CONFIG_PHY_INTEL_LGM_EMMC=m
 # end of PHY Subsystem
 
 CONFIG_POWERCAP=y
@@ -9741,6 +8830,7 @@ CONFIG_RAS=y
 CONFIG_RAS_CEC=y
 # CONFIG_RAS_CEC_DEBUG is not set
 CONFIG_USB4=m
+# CONFIG_USB4_DEBUGFS_WRITE is not set
 
 #
 # Android
@@ -9757,17 +8847,16 @@ CONFIG_BTT=y
 CONFIG_ND_PFN=m
 CONFIG_NVDIMM_PFN=y
 CONFIG_NVDIMM_DAX=y
-CONFIG_OF_PMEM=m
 CONFIG_DAX_DRIVER=y
 CONFIG_DAX=y
 CONFIG_DEV_DAX=m
 CONFIG_DEV_DAX_PMEM=m
 CONFIG_DEV_DAX_HMEM=m
+CONFIG_DEV_DAX_HMEM_DEVICES=y
 CONFIG_DEV_DAX_KMEM=m
 CONFIG_DEV_DAX_PMEM_COMPAT=m
 CONFIG_NVMEM=y
 CONFIG_NVMEM_SYSFS=y
-CONFIG_NVMEM_SPMI_SDAM=m
 CONFIG_RAVE_SP_EEPROM=m
 
 #
@@ -9792,17 +8881,14 @@ CONFIG_INTEL_TH_PTI=m
 
 CONFIG_FPGA=m
 CONFIG_ALTERA_PR_IP_CORE=m
-CONFIG_ALTERA_PR_IP_CORE_PLAT=m
 CONFIG_FPGA_MGR_ALTERA_PS_SPI=m
 CONFIG_FPGA_MGR_ALTERA_CVP=m
 CONFIG_FPGA_MGR_XILINX_SPI=m
-CONFIG_FPGA_MGR_ICE40_SPI=m
 CONFIG_FPGA_MGR_MACHXO2_SPI=m
 CONFIG_FPGA_BRIDGE=m
 CONFIG_ALTERA_FREEZE_BRIDGE=m
 CONFIG_XILINX_PR_DECOUPLER=m
 CONFIG_FPGA_REGION=m
-CONFIG_OF_FPGA_REGION=m
 CONFIG_FPGA_DFL=m
 CONFIG_FPGA_DFL_FME=m
 CONFIG_FPGA_DFL_FME_MGR=m
@@ -9810,14 +8896,6 @@ CONFIG_FPGA_DFL_FME_BRIDGE=m
 CONFIG_FPGA_DFL_FME_REGION=m
 CONFIG_FPGA_DFL_AFU=m
 CONFIG_FPGA_DFL_PCI=m
-CONFIG_FSI=m
-CONFIG_FSI_NEW_DEV_NODE=y
-CONFIG_FSI_MASTER_GPIO=m
-CONFIG_FSI_MASTER_HUB=m
-CONFIG_FSI_MASTER_ASPEED=m
-CONFIG_FSI_SCOM=m
-CONFIG_FSI_SBEFIFO=m
-CONFIG_FSI_OCC=m
 CONFIG_TEE=m
 
 #
@@ -9834,7 +8912,6 @@ CONFIG_MULTIPLEXER=m
 CONFIG_MUX_ADG792A=m
 CONFIG_MUX_ADGS1408=m
 CONFIG_MUX_GPIO=m
-CONFIG_MUX_MMIO=m
 # end of Multiplexer drivers
 
 CONFIG_PM_OPP=y
@@ -9845,10 +8922,9 @@ CONFIG_SLIMBUS=m
 CONFIG_SLIM_QCOM_CTRL=m
 CONFIG_INTERCONNECT=y
 CONFIG_COUNTER=m
-CONFIG_FTM_QUADDEC=m
-CONFIG_MICROCHIP_TCB_CAPTURE=m
 CONFIG_MOST=m
 CONFIG_MOST_USB_HDM=m
+CONFIG_MOST_CDEV=m
 # end of Device Drivers
 
 #
@@ -9879,6 +8955,7 @@ CONFIG_JFS_SECURITY=y
 # CONFIG_JFS_DEBUG is not set
 CONFIG_JFS_STATISTICS=y
 CONFIG_XFS_FS=m
+CONFIG_XFS_SUPPORT_V4=y
 CONFIG_XFS_QUOTA=y
 CONFIG_XFS_POSIX_ACL=y
 CONFIG_XFS_RT=y
@@ -9942,12 +9019,12 @@ CONFIG_QUOTA_TREE=m
 CONFIG_QFMT_V1=m
 CONFIG_QFMT_V2=m
 CONFIG_QUOTACTL=y
-CONFIG_QUOTACTL_COMPAT=y
 CONFIG_AUTOFS4_FS=y
 CONFIG_AUTOFS_FS=y
 CONFIG_FUSE_FS=m
 CONFIG_CUSE=m
 CONFIG_VIRTIO_FS=m
+CONFIG_FUSE_DAX=y
 CONFIG_OVERLAY_FS=m
 CONFIG_OVERLAY_FS_REDIRECT_DIR=y
 # CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW is not set
@@ -9960,9 +9037,9 @@ CONFIG_OVERLAY_FS_METACOPY=y
 #
 CONFIG_FSCACHE=m
 CONFIG_FSCACHE_STATS=y
-CONFIG_FSCACHE_HISTOGRAM=y
+# CONFIG_FSCACHE_HISTOGRAM is not set
 # CONFIG_FSCACHE_DEBUG is not set
-# CONFIG_FSCACHE_OBJECT_LIST is not set
+CONFIG_FSCACHE_OBJECT_LIST=y
 CONFIG_CACHEFILES=m
 # CONFIG_CACHEFILES_DEBUG is not set
 # CONFIG_CACHEFILES_HISTOGRAM is not set
@@ -9984,13 +9061,11 @@ CONFIG_FAT_FS=m
 CONFIG_MSDOS_FS=m
 CONFIG_VFAT_FS=m
 CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
 CONFIG_FAT_DEFAULT_UTF8=y
 CONFIG_EXFAT_FS=m
 CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
-CONFIG_NTFS_FS=m
-# CONFIG_NTFS_DEBUG is not set
-CONFIG_NTFS_RW=y
+# CONFIG_NTFS_FS is not set
 # end of DOS/FAT/EXFAT/NT Filesystems
 
 #
@@ -10058,8 +9133,8 @@ CONFIG_SQUASHFS=m
 # CONFIG_SQUASHFS_FILE_CACHE is not set
 CONFIG_SQUASHFS_FILE_DIRECT=y
 # CONFIG_SQUASHFS_DECOMP_SINGLE is not set
-CONFIG_SQUASHFS_DECOMP_MULTI=y
-# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set
+# CONFIG_SQUASHFS_DECOMP_MULTI is not set
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
 CONFIG_SQUASHFS_XATTR=y
 CONFIG_SQUASHFS_ZLIB=y
 CONFIG_SQUASHFS_LZ4=y
@@ -10097,7 +9172,7 @@ CONFIG_PSTORE_COMPRESS_DEFAULT="zstd"
 # CONFIG_PSTORE_CONSOLE is not set
 # CONFIG_PSTORE_PMSG is not set
 # CONFIG_PSTORE_FTRACE is not set
-CONFIG_PSTORE_RAM=y
+CONFIG_PSTORE_RAM=m
 CONFIG_PSTORE_ZONE=m
 CONFIG_PSTORE_BLK=m
 CONFIG_PSTORE_BLK_BLKDEV=""
@@ -10135,6 +9210,7 @@ CONFIG_NFS_FSCACHE=y
 CONFIG_NFS_USE_KERNEL_DNS=y
 CONFIG_NFS_DEBUG=y
 # CONFIG_NFS_DISABLE_UDP_SUPPORT is not set
+# CONFIG_NFS_V4_2_READ_PLUS is not set
 CONFIG_NFSD=m
 CONFIG_NFSD_V2_ACL=y
 CONFIG_NFSD_V3=y
@@ -10187,7 +9263,7 @@ CONFIG_9P_FS_POSIX_ACL=y
 CONFIG_9P_FS_SECURITY=y
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_CODEPAGE_737=m
 CONFIG_NLS_CODEPAGE_775=m
 CONFIG_NLS_CODEPAGE_850=m
@@ -10210,7 +9286,7 @@ CONFIG_NLS_CODEPAGE_874=m
 CONFIG_NLS_ISO8859_8=m
 CONFIG_NLS_CODEPAGE_1250=m
 CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
+CONFIG_NLS_ASCII=y
 CONFIG_NLS_ISO8859_1=m
 CONFIG_NLS_ISO8859_2=m
 CONFIG_NLS_ISO8859_3=m
@@ -10237,7 +9313,7 @@ CONFIG_NLS_MAC_ROMANIAN=m
 CONFIG_NLS_MAC_TURKISH=m
 CONFIG_NLS_UTF8=m
 CONFIG_DLM=m
-# CONFIG_DLM_DEBUG is not set
+CONFIG_DLM_DEBUG=y
 CONFIG_UNICODE=y
 # CONFIG_UNICODE_NORMALIZATION_SELFTEST is not set
 CONFIG_IO_WQ=y
@@ -10253,7 +9329,7 @@ CONFIG_TRUSTED_KEYS=m
 CONFIG_ENCRYPTED_KEYS=m
 CONFIG_KEY_DH_OPERATIONS=y
 CONFIG_KEY_NOTIFICATIONS=y
-# CONFIG_SECURITY_DMESG_RESTRICT is not set
+CONFIG_SECURITY_DMESG_RESTRICT=y
 CONFIG_SECURITY=y
 CONFIG_SECURITYFS=y
 CONFIG_SECURITY_NETWORK=y
@@ -10266,7 +9342,6 @@ CONFIG_LSM_MMAP_MIN_ADDR=65536
 CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
 CONFIG_HARDENED_USERCOPY=y
 CONFIG_HARDENED_USERCOPY_FALLBACK=y
-# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set
 CONFIG_FORTIFY_SOURCE=y
 # CONFIG_STATIC_USERMODEHELPER is not set
 CONFIG_SECURITY_SELINUX=y
@@ -10342,7 +9417,7 @@ CONFIG_CRYPTO=y
 #
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
-CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD=m
 CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_SKCIPHER=y
 CONFIG_CRYPTO_SKCIPHER2=y
@@ -10350,7 +9425,7 @@ CONFIG_CRYPTO_HASH=y
 CONFIG_CRYPTO_HASH2=y
 CONFIG_CRYPTO_RNG=y
 CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_RNG_DEFAULT=y
+CONFIG_CRYPTO_RNG_DEFAULT=m
 CONFIG_CRYPTO_AKCIPHER2=y
 CONFIG_CRYPTO_AKCIPHER=y
 CONFIG_CRYPTO_KPP2=y
@@ -10360,8 +9435,8 @@ CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 CONFIG_CRYPTO_USER=m
 CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
-CONFIG_CRYPTO_GF128MUL=y
-CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_NULL=m
 CONFIG_CRYPTO_NULL2=y
 CONFIG_CRYPTO_PCRYPT=m
 CONFIG_CRYPTO_CRYPTD=m
@@ -10379,6 +9454,7 @@ CONFIG_CRYPTO_DH=y
 CONFIG_CRYPTO_ECC=m
 CONFIG_CRYPTO_ECDH=m
 CONFIG_CRYPTO_ECRDSA=m
+CONFIG_CRYPTO_SM2=m
 CONFIG_CRYPTO_CURVE25519=m
 CONFIG_CRYPTO_CURVE25519_X86=m
 
@@ -10386,11 +9462,11 @@ CONFIG_CRYPTO_CURVE25519_X86=m
 # Authenticated Encryption with Associated Data
 #
 CONFIG_CRYPTO_CCM=m
-CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_GCM=m
 CONFIG_CRYPTO_CHACHA20POLY1305=m
 CONFIG_CRYPTO_AEGIS128=m
 CONFIG_CRYPTO_AEGIS128_AESNI_SSE2=m
-CONFIG_CRYPTO_SEQIV=y
+CONFIG_CRYPTO_SEQIV=m
 CONFIG_CRYPTO_ECHAINIV=m
 
 #
@@ -10433,7 +9509,7 @@ CONFIG_CRYPTO_BLAKE2S=m
 CONFIG_CRYPTO_BLAKE2S_X86=m
 CONFIG_CRYPTO_CRCT10DIF=y
 CONFIG_CRYPTO_CRCT10DIF_PCLMUL=m
-CONFIG_CRYPTO_GHASH=y
+CONFIG_CRYPTO_GHASH=m
 CONFIG_CRYPTO_POLY1305=m
 CONFIG_CRYPTO_POLY1305_X86_64=m
 CONFIG_CRYPTO_MD4=m
@@ -10462,8 +9538,6 @@ CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m
 CONFIG_CRYPTO_AES=y
 CONFIG_CRYPTO_AES_TI=m
 CONFIG_CRYPTO_AES_NI_INTEL=m
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_ARC4=m
 CONFIG_CRYPTO_BLOWFISH=m
 CONFIG_CRYPTO_BLOWFISH_COMMON=m
 CONFIG_CRYPTO_BLOWFISH_X86_64=m
@@ -10479,17 +9553,14 @@ CONFIG_CRYPTO_CAST6_AVX_X86_64=m
 CONFIG_CRYPTO_DES=m
 CONFIG_CRYPTO_DES3_EDE_X86_64=m
 CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_KHAZAD=m
 CONFIG_CRYPTO_SALSA20=m
 CONFIG_CRYPTO_CHACHA20=m
 CONFIG_CRYPTO_CHACHA20_X86_64=m
-CONFIG_CRYPTO_SEED=m
 CONFIG_CRYPTO_SERPENT=m
 CONFIG_CRYPTO_SERPENT_SSE2_X86_64=m
 CONFIG_CRYPTO_SERPENT_AVX_X86_64=m
 CONFIG_CRYPTO_SERPENT_AVX2_X86_64=m
 CONFIG_CRYPTO_SM4=m
-CONFIG_CRYPTO_TEA=m
 CONFIG_CRYPTO_TWOFISH=m
 CONFIG_CRYPTO_TWOFISH_COMMON=m
 CONFIG_CRYPTO_TWOFISH_X86_64=m
@@ -10510,18 +9581,20 @@ CONFIG_CRYPTO_ZSTD=y
 # Random Number Generation
 #
 CONFIG_CRYPTO_ANSI_CPRNG=m
-CONFIG_CRYPTO_DRBG_MENU=y
+CONFIG_CRYPTO_DRBG_MENU=m
 CONFIG_CRYPTO_DRBG_HMAC=y
 CONFIG_CRYPTO_DRBG_HASH=y
 CONFIG_CRYPTO_DRBG_CTR=y
-CONFIG_CRYPTO_DRBG=y
+CONFIG_CRYPTO_DRBG=m
 CONFIG_CRYPTO_JITTERENTROPY=y
 CONFIG_CRYPTO_USER_API=m
 CONFIG_CRYPTO_USER_API_HASH=m
 CONFIG_CRYPTO_USER_API_SKCIPHER=m
 CONFIG_CRYPTO_USER_API_RNG=m
+# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set
 CONFIG_CRYPTO_USER_API_AEAD=m
-# CONFIG_CRYPTO_STATS is not set
+# CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE is not set
+CONFIG_CRYPTO_STATS=y
 CONFIG_CRYPTO_HASH_INFO=y
 
 #
@@ -10568,11 +9641,8 @@ CONFIG_CRYPTO_DEV_QAT_C62XVF=m
 CONFIG_CRYPTO_DEV_NITROX=m
 CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m
 CONFIG_CRYPTO_DEV_CHELSIO=m
-CONFIG_CHELSIO_IPSEC_INLINE=y
-CONFIG_CHELSIO_TLS_DEVICE=y
 CONFIG_CRYPTO_DEV_VIRTIO=m
 CONFIG_CRYPTO_DEV_SAFEXCEL=m
-CONFIG_CRYPTO_DEV_CCREE=m
 CONFIG_CRYPTO_DEV_AMLOGIC_GXL=m
 CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG=y
 CONFIG_ASYMMETRIC_KEY_TYPE=y
@@ -10603,7 +9673,7 @@ CONFIG_BINARY_PRINTF=y
 # Library routines
 #
 CONFIG_RAID6_PQ=m
-CONFIG_RAID6_PQ_BENCHMARK=y
+# CONFIG_RAID6_PQ_BENCHMARK is not set
 CONFIG_LINEAR_RANGES=y
 CONFIG_PACKING=y
 CONFIG_BITREVERSE=y
@@ -10664,11 +9734,9 @@ CONFIG_DECOMPRESS_LZO=y
 CONFIG_DECOMPRESS_LZ4=y
 CONFIG_DECOMPRESS_ZSTD=y
 CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_REED_SOLOMON=y
+CONFIG_REED_SOLOMON=m
 CONFIG_REED_SOLOMON_ENC8=y
 CONFIG_REED_SOLOMON_DEC8=y
-CONFIG_REED_SOLOMON_DEC16=y
-CONFIG_BCH=m
 CONFIG_TEXTSEARCH=y
 CONFIG_TEXTSEARCH_KMP=m
 CONFIG_TEXTSEARCH_BM=m
@@ -10684,14 +9752,23 @@ CONFIG_DMA_OPS=y
 CONFIG_NEED_SG_DMA_LENGTH=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_ARCH_DMA_ADDR_T_64BIT=y
-CONFIG_DMA_DECLARE_COHERENT=y
 CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y
-CONFIG_DMA_VIRT_OPS=y
 CONFIG_SWIOTLB=y
 CONFIG_DMA_COHERENT_POOL=y
+CONFIG_DMA_CMA=y
+# CONFIG_DMA_PERNUMA_CMA is not set
+
+#
+# Default contiguous memory area size:
+#
+CONFIG_CMA_SIZE_MBYTES=0
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
+# CONFIG_CMA_SIZE_SEL_MIN is not set
+# CONFIG_CMA_SIZE_SEL_MAX is not set
+CONFIG_CMA_ALIGNMENT=8
 # CONFIG_DMA_API_DEBUG is not set
 CONFIG_SGL_ALLOC=y
-CONFIG_IOMMU_HELPER=y
 CONFIG_CHECK_SIGNATURE=y
 CONFIG_CPU_RMAP=y
 CONFIG_DQL=y
@@ -10703,7 +9780,6 @@ CONFIG_CLZ_TAB=y
 CONFIG_IRQ_POLL=y
 CONFIG_MPILIB=y
 CONFIG_DIMLIB=y
-CONFIG_LIBFDT=y
 CONFIG_OID_REGISTRY=y
 CONFIG_UCS2_STRING=y
 CONFIG_HAVE_GENERIC_VDSO=y
@@ -10723,6 +9799,7 @@ CONFIG_FONT_8x16=y
 # CONFIG_FONT_SUN8x16 is not set
 # CONFIG_FONT_SUN12x22 is not set
 CONFIG_FONT_TER16x32=y
+# CONFIG_FONT_6x8 is not set
 CONFIG_SG_POOL=y
 CONFIG_ARCH_HAS_PMEM_API=y
 CONFIG_MEMREGION=y
@@ -10749,7 +9826,7 @@ CONFIG_PRINTK_TIME=y
 CONFIG_CONSOLE_LOGLEVEL_DEFAULT=4
 CONFIG_CONSOLE_LOGLEVEL_QUIET=1
 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
-# CONFIG_BOOT_PRINTK_DELAY is not set
+CONFIG_BOOT_PRINTK_DELAY=y
 CONFIG_DYNAMIC_DEBUG=y
 CONFIG_DYNAMIC_DEBUG_CORE=y
 CONFIG_SYMBOLIC_ERRNAME=y
@@ -10766,14 +9843,13 @@ CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_INFO_DWARF4=y
 CONFIG_DEBUG_INFO_BTF=y
 # CONFIG_GDB_SCRIPTS is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=2048
 CONFIG_STRIP_ASM_SYMS=y
 # CONFIG_READABLE_ASM is not set
 # CONFIG_HEADERS_INSTALL is not set
 # CONFIG_DEBUG_SECTION_MISMATCH is not set
 CONFIG_SECTION_MISMATCH_WARN_ONLY=y
-# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set
 CONFIG_STACK_VALIDATION=y
 # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # end of Compile-time checks and compiler options
@@ -10797,7 +9873,7 @@ CONFIG_HAVE_ARCH_KCSAN=y
 # end of Generic Kernel Debugging Instruments
 
 CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_MISC=y
+# CONFIG_DEBUG_MISC is not set
 
 #
 # Memory Debugging
@@ -10809,7 +9885,7 @@ CONFIG_PAGE_POISONING=y
 CONFIG_PAGE_POISONING_NO_SANITY=y
 CONFIG_PAGE_POISONING_ZERO=y
 # CONFIG_DEBUG_PAGE_REF is not set
-# CONFIG_DEBUG_RODATA_TEST is not set
+CONFIG_DEBUG_RODATA_TEST=y
 CONFIG_ARCH_HAS_DEBUG_WX=y
 CONFIG_DEBUG_WX=y
 CONFIG_GENERIC_PTDUMP=y
@@ -10823,7 +9899,10 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_SCHED_STACK_END_CHECK=y
 CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y
-# CONFIG_DEBUG_VM is not set
+CONFIG_DEBUG_VM=y
+# CONFIG_DEBUG_VM_VMACACHE is not set
+# CONFIG_DEBUG_VM_RB is not set
+# CONFIG_DEBUG_VM_PGFLAGS is not set
 # CONFIG_DEBUG_VM_PGTABLE is not set
 CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
 # CONFIG_DEBUG_VIRTUAL is not set
@@ -10836,7 +9915,7 @@ CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y
 # CONFIG_KASAN is not set
 # end of Memory Debugging
 
-# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DEBUG_SHIRQ=y
 
 #
 # Debug Oops, Lockups and Hangs
@@ -10870,7 +9949,7 @@ CONFIG_SCHEDSTATS=y
 # end of Scheduler Debugging
 
 # CONFIG_DEBUG_TIMEKEEPING is not set
-CONFIG_DEBUG_PREEMPT=y
+# CONFIG_DEBUG_PREEMPT is not set
 
 #
 # Lock Debugging (spinlocks, mutexes, etc...)
@@ -10888,6 +9967,8 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_LOCK_TORTURE_TEST is not set
 # CONFIG_WW_MUTEX_SELFTEST is not set
+# CONFIG_SCF_TORTURE_TEST is not set
+# CONFIG_CSD_LOCK_WAIT_DEBUG is not set
 # end of Lock Debugging (spinlocks, mutexes, etc...)
 
 CONFIG_STACKTRACE=y
@@ -10909,12 +9990,13 @@ CONFIG_STACKTRACE=y
 #
 # RCU Debugging
 #
-# CONFIG_RCU_PERF_TEST is not set
+# CONFIG_RCU_SCALE_TEST is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_REF_SCALE_TEST is not set
 CONFIG_RCU_CPU_STALL_TIMEOUT=60
 # CONFIG_RCU_TRACE is not set
 # CONFIG_RCU_EQS_DEBUG is not set
+# CONFIG_RCU_STRICT_GRACE_PERIOD is not set
 # end of RCU Debugging
 
 # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
@@ -10942,7 +10024,7 @@ CONFIG_TRACING=y
 CONFIG_GENERIC_TRACER=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
-# CONFIG_BOOTTIME_TRACING is not set
+CONFIG_BOOTTIME_TRACING=y
 CONFIG_FUNCTION_TRACER=y
 CONFIG_FUNCTION_GRAPH_TRACER=y
 CONFIG_DYNAMIC_FTRACE=y
@@ -10994,15 +10076,15 @@ CONFIG_IO_STRICT_DEVMEM=y
 #
 CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
+CONFIG_EARLY_PRINTK_USB=y
 # CONFIG_X86_VERBOSE_BOOTUP is not set
 CONFIG_EARLY_PRINTK=y
-# CONFIG_EARLY_PRINTK_DBGP is not set
-# CONFIG_EARLY_PRINTK_USB_XDBC is not set
+CONFIG_EARLY_PRINTK_DBGP=y
+CONFIG_EARLY_PRINTK_USB_XDBC=y
 # CONFIG_EFI_PGT_DUMP is not set
 # CONFIG_DEBUG_TLBFLUSH is not set
-# CONFIG_IOMMU_DEBUG is not set
 CONFIG_HAVE_MMIOTRACE_SUPPORT=y
-# CONFIG_X86_DECODER_SELFTEST is not set
+CONFIG_X86_DECODER_SELFTEST=y
 CONFIG_IO_DELAY_0X80=y
 # CONFIG_IO_DELAY_0XED is not set
 # CONFIG_IO_DELAY_UDELAY is not set
@@ -11015,7 +10097,6 @@ CONFIG_DEBUG_BOOT_PARAMS=y
 # CONFIG_PUNIT_ATOM_DEBUG is not set
 CONFIG_UNWINDER_ORC=y
 # CONFIG_UNWINDER_FRAME_POINTER is not set
-# CONFIG_UNWINDER_GUESS is not set
 # end of x86 Debugging
 
 #
@@ -11029,7 +10110,7 @@ CONFIG_ARCH_HAS_KCOV=y
 CONFIG_CC_HAS_SANCOV_TRACE_PC=y
 # CONFIG_KCOV is not set
 CONFIG_RUNTIME_TESTING_MENU=y
-CONFIG_LKDTM=m
+# CONFIG_LKDTM is not set
 # CONFIG_TEST_LIST_SORT is not set
 # CONFIG_TEST_MIN_HEAP is not set
 # CONFIG_TEST_SORT is not set
@@ -11039,15 +10120,14 @@ CONFIG_LKDTM=m
 # CONFIG_REED_SOLOMON_TEST is not set
 # CONFIG_INTERVAL_TREE_TEST is not set
 # CONFIG_PERCPU_TEST is not set
-# CONFIG_ATOMIC64_SELFTEST is not set
-# CONFIG_ASYNC_RAID6_TEST is not set
+CONFIG_ATOMIC64_SELFTEST=y
+CONFIG_ASYNC_RAID6_TEST=m
 # CONFIG_TEST_HEXDUMP is not set
 # CONFIG_TEST_STRING_HELPERS is not set
 # CONFIG_TEST_STRSCPY is not set
-# CONFIG_TEST_KSTRTOX is not set
+CONFIG_TEST_KSTRTOX=y
 # CONFIG_TEST_PRINTF is not set
 # CONFIG_TEST_BITMAP is not set
-# CONFIG_TEST_BITFIELD is not set
 # CONFIG_TEST_UUID is not set
 # CONFIG_TEST_XARRAY is not set
 # CONFIG_TEST_OVERFLOW is not set
diff --git a/sphinx-workaround.patch b/sphinx-workaround.patch
deleted file mode 100644
index 1aa3f1c8f66e..000000000000
--- a/sphinx-workaround.patch
+++ /dev/null
@@ -1,13 +0,0 @@
-diff --git i/Documentation/conf.py w/Documentation/conf.py
-index 3c7bdf4cd31f..9a0ced58a3e9 100644
---- i/Documentation/conf.py
-+++ w/Documentation/conf.py
-@@ -36,7 +36,7 @@ needs_sphinx = '1.3'
- # Add any Sphinx extension module names here, as strings. They can be
- # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
- # ones.
--extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include', 'cdomain',
-+extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include',
-               'kfigure', 'sphinx.ext.ifconfig', 'automarkup',
-               'maintainers_include']
-