diff options
| author | Xiretza | 2021-06-04 10:39:27 +0200 |
|---|---|---|
| committer | Xiretza | 2021-06-04 10:39:27 +0200 |
| commit | 4500f951f368dc4db86c61cea17b1d1787ae8c58 (patch) | |
| tree | 86afb7992d74c9e27fc4cd8555fc47b796f1fb0c /PKGBUILD | |
| parent | 6bf02512e2354b97c938d6756029ea5a9e1c7df9 (diff) | |
| download | aur-vtr-git.tar.gz | |
Remove patches
Diffstat (limited to 'PKGBUILD')
| -rw-r--r-- | PKGBUILD | 10 |
1 files changed, 3 insertions, 7 deletions
@@ -3,7 +3,7 @@ _pkgname=vtr-verilog-to-routing pkgname=vtr-git -pkgver=8.0.0.r3658.g448b8e124 +pkgver=8.0.0.r3718.g265904830 pkgrel=1 pkgdesc='Open Source CAD Flow for FPGA Research' arch=(x86_64) @@ -13,11 +13,8 @@ makedepends=('git' 'cmake') depends=('gcc-libs') provides=("${pkgname%%-git}=$pkgver") conflicts=("${pkgname%%-git}") -source=('git+https://github.com/verilog-to-routing/vtr-verilog-to-routing' - '0001-aligned_allocator-add-operator.patch' -) -sha256sums=('SKIP' - '6d360513c8b10738c77dfe8a91421ba47f5fcdfba9d083ef42caf0802215fdb9') +source=('git+https://github.com/verilog-to-routing/vtr-verilog-to-routing') +sha256sums=('SKIP') pkgver() { cd "$_pkgname" @@ -28,7 +25,6 @@ pkgver() { prepare() { cd "$_pkgname" - patch -p1 < "$srcdir/0001-aligned_allocator-add-operator.patch" } build() { |