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Diffstat (limited to '.SRCINFO')
| -rw-r--r-- | .SRCINFO | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/.SRCINFO b/.SRCINFO new file mode 100644 index 000000000000..f8f556aee1ea --- /dev/null +++ b/.SRCINFO @@ -0,0 +1,18 @@ +pkgbase = cocotb + pkgdesc = Coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python + pkgver = r2445.e9490fab + pkgrel = 1 + url = https://github.com/cocotb + arch = any + license = BSD + makedepends = git + depends = python + optdepends = iverilog: for simulating verilog designs + optdepends = ghdl: for simulating VHDL designs + provides = cocotb + conflicts = cocotb + options = !emptydirs + source = git+https://github.com/cocotb/cocotb + md5sums = SKIP + +pkgname = cocotb |