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-rw-r--r--0001-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch65
1 files changed, 65 insertions, 0 deletions
diff --git a/0001-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch b/0001-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch
new file mode 100644
index 000000000000..9f690c908a9c
--- /dev/null
+++ b/0001-drm-i915-dp-Program-source-OUI-on-eDP-panels.patch
@@ -0,0 +1,65 @@
+From 14fd04fb1db60cd5028425a3cdb2041adfdbb6a2 Mon Sep 17 00:00:00 2001
+From: Lyude Paul <lyude@redhat.com>
+Date: Fri, 26 Jun 2020 17:53:48 -0400
+Subject: [PATCH 1/2] drm/i915/dp: Program source OUI on eDP panels
+
+Since we're about to start adding support for Intel's magic HDR
+backlight interface over DPCD, we need to ensure we're properly
+programming this field so that Intel specific sink services are exposed.
+Otherwise, 0x300-0x3ff will just read zeroes.
+
+We also take care not to reprogram the source OUI if it already matches
+what we expect. This is just to be careful so that we don't accidentally
+take the panel out of any backlight control modes we found it in.
+
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+---
+ drivers/gpu/drm/i915/display/intel_dp.c | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
+index 5e228d202e4d..9231a0ef6270 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp.c
++++ b/drivers/gpu/drm/i915/display/intel_dp.c
+@@ -4408,6 +4408,25 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)
+ }
+ }
+
++static void
++intel_edp_init_source_oui(struct intel_dp *intel_dp)
++{
++ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
++ u8 oui[] = { 0x00, 0xaa, 0x01 };
++ u8 buf[3] = { 0 };
++
++ if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf,
++ sizeof(buf)) < 0)
++ drm_err(&i915->drm, "Failed to read source OUI\n");
++
++ if (memcmp(oui, buf, sizeof(oui)) == 0)
++ return;
++
++ if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui,
++ sizeof(oui)) < 0)
++ drm_err(&i915->drm, "Failed to write source OUI\n");
++}
++
+ static bool
+ intel_edp_init_dpcd(struct intel_dp *intel_dp)
+ {
+@@ -4485,6 +4504,12 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
+ if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+ intel_dp_get_dsc_sink_cap(intel_dp);
+
++ /*
++ * Program our source OUI so we can make various Intel-specific AUX
++ * services available (such as HDR backlight controls)
++ */
++ intel_edp_init_source_oui(intel_dp);
++
+ return true;
+ }
+
+--
+2.27.0
+