diff options
Diffstat (limited to '0026-selftests-sgx-Introduce-TCS-initialization-enclave-o.patch')
| -rw-r--r-- | 0026-selftests-sgx-Introduce-TCS-initialization-enclave-o.patch | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/0026-selftests-sgx-Introduce-TCS-initialization-enclave-o.patch b/0026-selftests-sgx-Introduce-TCS-initialization-enclave-o.patch new file mode 100644 index 000000000000..90cded650823 --- /dev/null +++ b/0026-selftests-sgx-Introduce-TCS-initialization-enclave-o.patch @@ -0,0 +1,101 @@ +From 8144b5b0b7ada1d19f79a080aab412eb7cf04fa8 Mon Sep 17 00:00:00 2001 +From: Reinette Chatre <reinette.chatre@intel.com> +Date: Mon, 7 Feb 2022 16:45:48 -0800 +Subject: [PATCH 26/34] selftests/sgx: Introduce TCS initialization enclave + operation + +The Thread Control Structure (TCS) contains meta-data used by the +hardware to save and restore thread specific information when +entering/exiting the enclave. A TCS can be added to an initialized +enclave by first adding a new regular enclave page, initializing the +content of the new page from within the enclave, and then changing that +page's type to a TCS. + +Support the initialization of a TCS from within the enclave. +The variable information needed that should be provided from outside +the enclave is the address of the TCS, address of the State Save Area +(SSA), and the entry point that the thread should use to enter the +enclave. With this information provided all needed fields of a TCS +can be initialized. + +Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> +--- + tools/testing/selftests/sgx/defines.h | 8 +++++++ + tools/testing/selftests/sgx/test_encl.c | 30 +++++++++++++++++++++++++ + 2 files changed, 38 insertions(+) + +diff --git a/tools/testing/selftests/sgx/defines.h b/tools/testing/selftests/sgx/defines.h +index b638eb98c80c..d8587c971941 100644 +--- a/tools/testing/selftests/sgx/defines.h ++++ b/tools/testing/selftests/sgx/defines.h +@@ -26,6 +26,7 @@ enum encl_op_type { + ENCL_OP_NOP, + ENCL_OP_EACCEPT, + ENCL_OP_EMODPE, ++ ENCL_OP_INIT_TCS_PAGE, + ENCL_OP_MAX, + }; + +@@ -68,4 +69,11 @@ struct encl_op_emodpe { + uint64_t flags; + }; + ++struct encl_op_init_tcs_page { ++ struct encl_op_header header; ++ uint64_t tcs_page; ++ uint64_t ssa; ++ uint64_t entry; ++}; ++ + #endif /* DEFINES_H */ +diff --git a/tools/testing/selftests/sgx/test_encl.c b/tools/testing/selftests/sgx/test_encl.c +index 5b6c65331527..c0d6397295e3 100644 +--- a/tools/testing/selftests/sgx/test_encl.c ++++ b/tools/testing/selftests/sgx/test_encl.c +@@ -57,6 +57,35 @@ static void *memcpy(void *dest, const void *src, size_t n) + return dest; + } + ++static void *memset(void *dest, int c, size_t n) ++{ ++ size_t i; ++ ++ for (i = 0; i < n; i++) ++ ((char *)dest)[i] = c; ++ ++ return dest; ++} ++ ++static void do_encl_init_tcs_page(void *_op) ++{ ++ struct encl_op_init_tcs_page *op = _op; ++ void *tcs = (void *)op->tcs_page; ++ uint32_t val_32; ++ ++ memset(tcs, 0, 16); /* STATE and FLAGS */ ++ memcpy(tcs + 16, &op->ssa, 8); /* OSSA */ ++ memset(tcs + 24, 0, 4); /* CSSA */ ++ val_32 = 1; ++ memcpy(tcs + 28, &val_32, 4); /* NSSA */ ++ memcpy(tcs + 32, &op->entry, 8); /* OENTRY */ ++ memset(tcs + 40, 0, 24); /* AEP, OFSBASE, OGSBASE */ ++ val_32 = 0xFFFFFFFF; ++ memcpy(tcs + 64, &val_32, 4); /* FSLIMIT */ ++ memcpy(tcs + 68, &val_32, 4); /* GSLIMIT */ ++ memset(tcs + 72, 0, 4024); /* Reserved */ ++} ++ + static void do_encl_op_put_to_buf(void *op) + { + struct encl_op_put_to_buf *op2 = op; +@@ -100,6 +129,7 @@ void encl_body(void *rdi, void *rsi) + do_encl_op_nop, + do_encl_eaccept, + do_encl_emodpe, ++ do_encl_init_tcs_page, + }; + + struct encl_op_header *op = (struct encl_op_header *)rdi; +-- +2.35.1 + |