diff options
Diffstat (limited to '0028-mmc-mtk-sd-Clear-interrupts-when-cqe-off-disable.patch')
| -rw-r--r-- | 0028-mmc-mtk-sd-Clear-interrupts-when-cqe-off-disable.patch | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/0028-mmc-mtk-sd-Clear-interrupts-when-cqe-off-disable.patch b/0028-mmc-mtk-sd-Clear-interrupts-when-cqe-off-disable.patch new file mode 100644 index 000000000000..e2a9459eb7f4 --- /dev/null +++ b/0028-mmc-mtk-sd-Clear-interrupts-when-cqe-off-disable.patch @@ -0,0 +1,58 @@ +From 1c137c46d16e33b71ef92daf1882d5443fa2ec93 Mon Sep 17 00:00:00 2001 +From: Wenbin Mei <wenbin.mei@mediatek.com> +Date: Thu, 28 Jul 2022 16:00:48 +0800 +Subject: [PATCH 28/73] mmc: mtk-sd: Clear interrupts when cqe off/disable + +[ Upstream commit cc5d1692600613e72f32af60e27330fe0c79f4fe ] + +Currently we don't clear MSDC interrupts when cqe off/disable, which led +to the data complete interrupt will be reserved for the next command. +If the next command with data transfer after cqe off/disable, we process +the CMD ready interrupt and trigger DMA start for data, but the data +complete interrupt is already exists, then SW assume that the data transfer +is complete, SW will trigger DMA stop, but the data may not be transmitted +yet or is transmitting, so we may encounter the following error: +mtk-msdc 11230000.mmc: CMD bus busy detected. + +Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com> +Fixes: 88bd652b3c74 ("mmc: mediatek: command queue support") +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/20220728080048.21336-1-wenbin.mei@mediatek.com +Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> +Signed-off-by: Sasha Levin <sashal@kernel.org> +--- + drivers/mmc/host/mtk-sd.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c +index 9da4489dc345..378a26a1825c 100644 +--- a/drivers/mmc/host/mtk-sd.c ++++ b/drivers/mmc/host/mtk-sd.c +@@ -2414,6 +2414,9 @@ static void msdc_cqe_disable(struct mmc_host *mmc, bool recovery) + /* disable busy check */ + sdr_clr_bits(host->base + MSDC_PATCH_BIT1, MSDC_PB1_BUSY_CHECK_SEL); + ++ val = readl(host->base + MSDC_INT); ++ writel(val, host->base + MSDC_INT); ++ + if (recovery) { + sdr_set_field(host->base + MSDC_DMA_CTRL, + MSDC_DMA_CTRL_STOP, 1); +@@ -2871,11 +2874,14 @@ static int __maybe_unused msdc_suspend(struct device *dev) + { + struct mmc_host *mmc = dev_get_drvdata(dev); + int ret; ++ u32 val; + + if (mmc->caps2 & MMC_CAP2_CQE) { + ret = cqhci_suspend(mmc); + if (ret) + return ret; ++ val = readl(((struct msdc_host *)mmc_priv(mmc))->base + MSDC_INT); ++ writel(val, ((struct msdc_host *)mmc_priv(mmc))->base + MSDC_INT); + } + + return pm_runtime_force_suspend(dev); +-- +2.37.3 + |