diff options
Diffstat (limited to '0055-drm-amd-display-Fix-pixel-clock-programming.patch')
| -rw-r--r-- | 0055-drm-amd-display-Fix-pixel-clock-programming.patch | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/0055-drm-amd-display-Fix-pixel-clock-programming.patch b/0055-drm-amd-display-Fix-pixel-clock-programming.patch deleted file mode 100644 index 569598780a71..000000000000 --- a/0055-drm-amd-display-Fix-pixel-clock-programming.patch +++ /dev/null @@ -1,48 +0,0 @@ -From db0669c9731b849dee3dcaa6a0b4a891a0055338 Mon Sep 17 00:00:00 2001 -From: Ilya Bakoulin <Ilya.Bakoulin@amd.com> -Date: Tue, 26 Jul 2022 16:19:38 -0400 -Subject: [PATCH 55/73] drm/amd/display: Fix pixel clock programming - -[ Upstream commit 04fb918bf421b299feaee1006e82921d7d381f18 ] - -[Why] -Some pixel clock values could cause HDMI TMDS SSCPs to be misaligned -between different HDMI lanes when using YCbCr420 10-bit pixel format. - -BIOS functions for transmitter/encoder control take pixel clock in kHz -increments, whereas the function for setting the pixel clock is in 100Hz -increments. Setting pixel clock to a value that is not on a kHz boundary -will cause the issue. - -[How] -Round pixel clock down to nearest kHz in 10/12-bpc cases. - -Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> -Acked-by: Brian Chang <Brian.Chang@amd.com> -Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> -Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> -Signed-off-by: Sasha Levin <sashal@kernel.org> ---- - drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c -index 845aa8a1027d..c4040adb88b0 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c -+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c -@@ -545,9 +545,11 @@ static void dce112_get_pix_clk_dividers_helper ( - switch (pix_clk_params->color_depth) { - case COLOR_DEPTH_101010: - actual_pixel_clock_100hz = (actual_pixel_clock_100hz * 5) >> 2; -+ actual_pixel_clock_100hz -= actual_pixel_clock_100hz % 10; - break; - case COLOR_DEPTH_121212: - actual_pixel_clock_100hz = (actual_pixel_clock_100hz * 6) >> 2; -+ actual_pixel_clock_100hz -= actual_pixel_clock_100hz % 10; - break; - case COLOR_DEPTH_161616: - actual_pixel_clock_100hz = actual_pixel_clock_100hz * 2; --- -2.37.3 - |