diff options
Diffstat (limited to '0072-arm64-cacheinfo-Fix-incorrect-assignment-of-signed-e.patch')
| -rw-r--r-- | 0072-arm64-cacheinfo-Fix-incorrect-assignment-of-signed-e.patch | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/0072-arm64-cacheinfo-Fix-incorrect-assignment-of-signed-e.patch b/0072-arm64-cacheinfo-Fix-incorrect-assignment-of-signed-e.patch new file mode 100644 index 000000000000..89ceb0132ccd --- /dev/null +++ b/0072-arm64-cacheinfo-Fix-incorrect-assignment-of-signed-e.patch @@ -0,0 +1,80 @@ +From a754ee1c66bd0a23e613f0bf865053b29cb90e16 Mon Sep 17 00:00:00 2001 +From: Sudeep Holla <sudeep.holla@arm.com> +Date: Mon, 8 Aug 2022 09:46:40 +0100 +Subject: [PATCH 72/73] arm64: cacheinfo: Fix incorrect assignment of signed + error value to unsigned fw_level + +commit e75d18cecbb3805895d8ed64da4f78575ec96043 upstream. + +Though acpi_find_last_cache_level() always returned signed value and the +document states it will return any errors caused by lack of a PPTT table, +it never returned negative values before. + +Commit 0c80f9e165f8 ("ACPI: PPTT: Leave the table mapped for the runtime usage") +however changed it by returning -ENOENT if no PPTT was found. The value +returned from acpi_find_last_cache_level() is then assigned to unsigned +fw_level. + +It will result in the number of cache leaves calculated incorrectly as +a huge value which will then cause the following warning from __alloc_pages +as the order would be great than MAX_ORDER because of incorrect and huge +cache leaves value. + + | WARNING: CPU: 0 PID: 1 at mm/page_alloc.c:5407 __alloc_pages+0x74/0x314 + | Modules linked in: + | CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.19.0-10393-g7c2a8d3ac4c0 #73 + | pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) + | pc : __alloc_pages+0x74/0x314 + | lr : alloc_pages+0xe8/0x318 + | Call trace: + | __alloc_pages+0x74/0x314 + | alloc_pages+0xe8/0x318 + | kmalloc_order_trace+0x68/0x1dc + | __kmalloc+0x240/0x338 + | detect_cache_attributes+0xe0/0x56c + | update_siblings_masks+0x38/0x284 + | store_cpu_topology+0x78/0x84 + | smp_prepare_cpus+0x48/0x134 + | kernel_init_freeable+0xc4/0x14c + | kernel_init+0x2c/0x1b4 + | ret_from_fork+0x10/0x20 + +Fix the same by changing fw_level to be signed integer and return the +error from init_cache_level() early in case of error. + +Reported-and-Tested-by: Bruno Goncalves <bgoncalv@redhat.com> +Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> +Link: https://lore.kernel.org/r/20220808084640.3165368-1-sudeep.holla@arm.com +Signed-off-by: Will Deacon <will@kernel.org> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + arch/arm64/kernel/cacheinfo.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/kernel/cacheinfo.c b/arch/arm64/kernel/cacheinfo.c +index 587543c6c51c..97c42be71338 100644 +--- a/arch/arm64/kernel/cacheinfo.c ++++ b/arch/arm64/kernel/cacheinfo.c +@@ -45,7 +45,8 @@ static void ci_leaf_init(struct cacheinfo *this_leaf, + + int init_cache_level(unsigned int cpu) + { +- unsigned int ctype, level, leaves, fw_level; ++ unsigned int ctype, level, leaves; ++ int fw_level; + struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); + + for (level = 1, leaves = 0; level <= MAX_CACHE_LEVEL; level++) { +@@ -63,6 +64,9 @@ int init_cache_level(unsigned int cpu) + else + fw_level = acpi_find_last_cache_level(cpu); + ++ if (fw_level < 0) ++ return fw_level; ++ + if (level < fw_level) { + /* + * some external caches not specified in CLIDR_EL1 +-- +2.37.3 + |