diff options
Diffstat (limited to '0102-drm_i915_psr_Use_full_update_In_case_of_area_calculation_fails.patch')
| -rw-r--r-- | 0102-drm_i915_psr_Use_full_update_In_case_of_area_calculation_fails.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/0102-drm_i915_psr_Use_full_update_In_case_of_area_calculation_fails.patch b/0102-drm_i915_psr_Use_full_update_In_case_of_area_calculation_fails.patch new file mode 100644 index 000000000000..b7cedda240a4 --- /dev/null +++ b/0102-drm_i915_psr_Use_full_update_In_case_of_area_calculation_fails.patch @@ -0,0 +1,61 @@ + From e72ac6b3c5b94f3e7894c973a3ea7f64dc65e1e8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jouni=20H=C3=B6gander?= <jouni.hogander@intel.com> +Date: Fri, 13 May 2022 17:28:10 +0300 +Subject: [PATCH] drm/i915/psr: Use full update In case of area calculation + fails +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Currently we have some corner cases where area calculation fails. For +these sel fetch area calculation ends up having update area as y1 = 0, +y2 = 4. Instead of these values safer option is full update. + +One of such for example is big fb with offset. We don't have usable +offset in psr2_sel_fetch_update. Currently it's open what is the +proper way to fix this corner case. Use full update for now. + +v2: Commit message modified +v3: Print out debug info once when area calculation fails +v4: Use drm_info_once +v5: pipeA -> "pipe %c", pipe_name(crtc-pipe) + +Cc: José Roberto de Souza <jose.souza@intel.com> +Cc: Mika Kahola <mika.kahola@intel.com> +Signed-off-by: Jouni Högander <jouni.hogander@intel.com> +Reviewed-by: José Roberto de Souza <jose.souza@intel.com> +--- + drivers/gpu/drm/i915/display/intel_psr.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c +index 06db407e2749f7..fecdaaeac39e08 100644 +--- a/drivers/gpu/drm/i915/display/intel_psr.c ++++ b/drivers/gpu/drm/i915/display/intel_psr.c +@@ -1685,6 +1685,7 @@ static bool psr2_sel_fetch_pipe_state_supported(const struct intel_crtc_state *c + int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, + struct intel_crtc *crtc) + { ++ struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + struct drm_rect pipe_clip = { .x1 = 0, .y1 = -1, .x2 = INT_MAX, .y2 = -1 }; + struct intel_plane_state *new_plane_state, *old_plane_state; +@@ -1770,6 +1771,19 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, + clip_area_update(&pipe_clip, &damaged_area); + } + ++ /* ++ * TODO: For now we are just using full update in case ++ * selective fetch area calculation fails. To optimize this we ++ * should identify cases where this happens and fix the area ++ * calculation for those. ++ */ ++ if (pipe_clip.y1 == -1) { ++ drm_info_once(&dev_priv->drm, ++ "Selective fetch area calculation failed in pipe %c\n", ++ pipe_name(crtc->pipe)); ++ full_update = true; ++ } ++ + if (full_update) + goto skip_sel_fetch_set_loop; |