1 files changed, 36 insertions, 0 deletions
diff --git a/0105-drm_amdgpu_use_DRM_SCHED_FENCE_DONT_PIPELINE_for_VM_updates.patch b/0105-drm_amdgpu_use_DRM_SCHED_FENCE_DONT_PIPELINE_for_VM_updates.patch
new file mode 100644
index 000000000000..85a53aad1b2f
--- /dev/null
+++ b/0105-drm_amdgpu_use_DRM_SCHED_FENCE_DONT_PIPELINE_for_VM_updates.patch
@@ -0,0 +1,36 @@
+From 2b078fa1fdcbd43a042ff49ad70f6ab2a22dffb3 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Fri, 7 Oct 2022 10:59:58 +0200
+Subject: [PATCH] drm/amdgpu: use DRM_SCHED_FENCE_DONT_PIPELINE for VM updates
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Make sure that we always have a CPU round trip to let the submission
+code correctly decide if a TLB flush is necessary or not.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
+index 718db7d98e5a30..25ad3c7fa24bea 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
+@@ -115,8 +115,15 @@ static int amdgpu_vm_sdma_commit(struct amdgpu_vm_update_params *p,
+ 		amdgpu_bo_fence(p->vm->root.bo, f, true);
+ 	}
+
+-	if (fence && !p->immediate)
++	if (fence && !p->immediate) {
++		/*
++		 * Most hw generations now have a separate queue for page table
++		 * updates, but when the queue is shared with userspace we need
++		 * the extra CPU round trip to correctly flush the TLB.
++		 */
++		set_bit(DRM_SCHED_FENCE_DONT_PIPELINE, &f->flags);
+ 		swap(*fence, f);
++	}
+ 	dma_fence_put(f);
+ 	return 0;