1 files changed, 78 insertions, 0 deletions
diff --git a/meson-gxl-s905d-phicomm-n1.dts b/meson-gxl-s905d-phicomm-n1.dts
new file mode 100644
index 000000000000..2224f637d75a
--- /dev/null
+++ b/meson-gxl-s905d-phicomm-n1.dts
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 He Yangxuan
+ */
+
+/dts-v1/;
+
+#include "meson-gxl-s905d-p230.dts"
+
+/ {
+	compatible = "phicomm,n1", "amlogic,s905d", "amlogic,meson-gxl";
+	model = "Phicomm N1";
+
+	cvbs-connector {
+		status = "disabled";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		status {
+			label = "n1:white:status";
+			gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+	};
+};
+
+
+&ethmac {
+	pinctrl-0 = <&eth_pins>;
+	pinctrl-names = "default";
+
+	/* Select external PHY by default */
+	phy-handle = <&eth_phy0>;
+
+	amlogic,tx-delay-ns = <2>;
+
+	/* External PHY reset is shared with internal PHY Led signals */
+	snps,reset-gpio = <&gpio GPIOZ_14 0>;
+	snps,reset-delays-us = <0 10000 1000000>;
+	snps,reset-active-low;
+
+	/* External PHY is in RGMII */
+	phy-mode = "rgmii";
+
+        mdio {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+		compatible = "snps,dwmac-mdio";
+		phandle = <0x1a>;
+
+		eth_phy0: ethernet-phy@0 {
+			reg = <0x0>;
+			phandle = <0x1d>;
+		};
+	};
+};
+
+/* This UART is connected to the Bluetooth module */
+&uart_A {
+	status = "okay";
+	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
+	pinctrl-names = "default";
+	uart-has-rtscts;
+
+	bluetooth {
+		compatible = "brcm,bcm43438-bt";
+		shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+		max-speed = <2000000>;
+		clocks = <&wifi32k>;
+		clock-names = "lpo";
+	};
+};
+
+&cvbs_vdac_port {
+	status = "disabled";
+};
+\ No newline at end of file