From 9010972a9691d468eb68ab85c73c80bb572a5334 Mon Sep 17 00:00:00 2001 From: Ukhellfire Date: Thu, 24 Mar 2022 22:21:00 +0000 Subject: [PATCH] Fix H6 emmc We have the wrong MMC CAP voltage for the emmc on this board --- drivers/mmc/host/sunxi-mmc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index dd1c2a610..9a641c7d2 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c @@ -1221,5 +1221,6 @@ static const struct of_device_id sunxi_mmc_of_match[] = { { .compatible = "allwinner,sun50i-a64-mmc", .data = &sun50i_a64_cfg }, { .compatible = "allwinner,sun50i-a64-emmc", .data = &sun50i_a64_emmc_cfg }, + { .compatible = "allwinner,sun50i-h6-emmc", .data = &sun50i_a64_emmc_cfg }, { .compatible = "allwinner,sun50i-a100-mmc", .data = &sun50i_a100_cfg }, { .compatible = "allwinner,sun50i-a100-emmc", .data = &sun50i_a100_emmc_cfg }, { /* sentinel */ } @@ -1434,7 +1435,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev) MMC_CAP_SDIO_IRQ; /* - * Some H5 devices do not have signal traces precise enough to + * Some H5 and H6 devices do not have signal traces precise enough to * use HS DDR mode for their eMMC chips. * * We still enable HS DDR modes for all the other controller @@ -1443,4 +1444,6 @@ static int sunxi_mmc_probe(struct platform_device *pdev) if ((host->cfg->clk_delays || host->use_new_timings) && !of_device_is_compatible(pdev->dev.of_node, - "allwinner,sun50i-h5-emmc")) + "allwinner,sun50i-h5-emmc") && + !of_device_is_compatible(pdev->dev.of_node, + "allwinner,sun50i-h6-emmc")) mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;