From f2ec21c0b73d37ce252afc4d74072f80fe336edf Mon Sep 17 00:00:00 2001 From: Scott B Date: Thu, 30 Sep 2021 04:11:49 -0700 Subject: [PATCH] v5.14.9 s0ix patch 2021-09-30 Squashed commit of the following: commit 0c5d3b01b4d999992439ca9f749e202cc0cc8578 Author: Sanket Goswami Date: Tue Sep 21 17:30:20 2021 +0530 platform/x86: amd-pmc: Add a message to print resume time info Add a message to print the resume time information obtained from the smu_metrics structure. Signed-off-by: Shyam Sundar S K Signed-off-by: Sanket Goswami commit bae72b8e72aac7590d2677830926d960e72edade Author: Sanket Goswami Date: Tue Sep 21 17:29:10 2021 +0530 platform/x86: amd-pmc: Send command to dump data after clearing OS_HINT It was reported that the resume stats received from the firmware are always zero. This happens because the SMU expects the driver to send the command to dump the log data after clearing the OS_HINT. Adjust the order of the commands sent to SMU. Signed-off-by: Shyam Sundar S K Signed-off-by: Sanket Goswami commit 6e5d6b64bff6e2a863cae9b22c5f5a8f7f7462ff Author: Sanket Goswami Date: Thu Sep 16 18:11:30 2021 +0530 platform/x86: amd-pmc: Check s0i3 cycle status As the PM firmware returns the status of the last s0i3 in the smu_metrics structure, the existing name "s0i3_cyclecount" seems to be a misnomer. Change it accordingly to "s0i3_last_entry_status". Signed-off-by: Sanket Goswami Acked-by: Shyam Sundar S K commit fdf1b62b3ad1a54a041ebf49ba9b081deb8a6634 Author: Sanket Goswami Date: Thu Sep 16 18:10:02 2021 +0530 platform/x86: amd-pmc: Export Idlemask values based on the APU IdleMask is the metric used by the PM firmware to know the status of each of the Hardware IP blocks monitored by the PM firmware. Knowing this value is key to get the information of s2idle suspend/resume status. This value is mapped to PMC scratch registers, retrieve them accordingly based on the CPU family and the underlying firmware support. Co-developed-by: Shyam Sundar S K Signed-off-by: Shyam Sundar S K Signed-off-by: Sanket Goswami Acked-by: Shyam Sundar S K Reviewed-by: Mario Limonciello commit 994c36c63556c54eaa3f02ea8b7e5b28fc1836cf Author: Mario Limonciello Date: Wed Sep 15 16:52:16 2021 -0500 ACPI: processor idle: Allow playing dead in C3 commit 1a022e3f1be1 ("idle, x86: Allow off-lined CPU to enter deeper C states") originally allowed offlined CPUs to play dead up to ACPI C2. Although this improves power consumption of offlined CPUs, it does not allow the CPUs to get into the deepest state on AMD platforms blocking s0i3 entry. BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1708 Signed-off-by: Mario Limonciello commit ffa37ed37e917dfa225598dcef8a86324784a4ff Author: Basavaraj Natikar Date: Tue Aug 31 17:36:12 2021 +0530 pinctrl: amd: Add irq field data pinctrl_amd use gpiochip_get_data() to get their local state containers back from the gpiochip passed as amd_gpio chip data. Hence added irq field data to get directly using amd_gpio chip data. Signed-off-by: Basavaraj Natikar commit b6c769a9687c626c8e068215035975b57fe954e8 Author: Basavaraj Natikar Date: Tue Aug 31 17:36:13 2021 +0530 pinctrl: amd: Handle wake-up interrupt Enable/disable power management wakeup mode, which is disabled by default. enable_irq_wake enables wakes the system from sleep. Hence added enable/disable irq_wake to handle wake-up interrupt. Signed-off-by: Basavaraj Natikar commit 1fef466dd8e750ea6c86803277226cfee04df5d5 Author: Scott B <28817345+foundObjects@users.noreply.github.com> Date: Wed Jul 21 18:10:28 2021 -0700 DEBUG: amd-pmc smu register dump for diagnostics patch this per Mario's request: https://gitlab.freedesktop.org/drm/amd/-/issues/1629#note_1000332 commit 497175cc42db2ec66a9c17687c15eb8c45644c2c Author: Scott B <28817345+foundObjects@users.noreply.github.com> Date: Tue Jul 20 23:33:01 2021 -0700 drm/amd/pm: Add information about SMU12 firmware version hacky manual import of: https://lists.freedesktop.org/archives/amd-gfx/2021-July/066835.html This information is useful for root causing issues with S0ix. Signed-off-by: Mario Limonciello commit 07447fae7c12ba3d9c014cfbb69ebda8fe0b4239 Author: Scott B <28817345+foundObjects@users.noreply.github.com> Date: Tue Jul 20 23:31:31 2021 -0700 drm/amd/pm: Add information about SMU11 firmware version hacky manual import of: https://lists.freedesktop.org/archives/amd-gfx/2021-July/066834.html This information is useful for root causing issues with S0ix. Signed-off-by: Mario Limonciello --- drivers/acpi/processor_idle.c | 3 +- .../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 3 + .../gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c | 3 + drivers/pinctrl/pinctrl-amd.c | 19 ++-- drivers/pinctrl/pinctrl-amd.h | 1 + drivers/platform/x86/amd-pmc.c | 90 +++++++++++++++++-- 6 files changed, 108 insertions(+), 11 deletions(-) diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index 095c8aca141e..1b6529396371 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c @@ -789,7 +789,8 @@ static int acpi_processor_setup_cstates(struct acpi_processor *pr) state->enter = acpi_idle_enter; state->flags = 0; - if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) { + if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2 + || cx->type == ACPI_STATE_C3) { state->enter_dead = acpi_idle_play_dead; drv->safe_state_index = count; } diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c index 0a5d46ac9ccd..626d7c2bdf66 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c @@ -272,6 +272,9 @@ int smu_v11_0_check_fw_version(struct smu_context *smu) break; } + dev_info(smu->adev->dev, "smu fw reported version = 0x%08x (%d.%d.%d)\n", + smu_version, smu_major, smu_minor, smu_debug); + /* * 1. if_version mismatch is not critical as our fw is designed * to be backward compatible. diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c index d60b8c5e8715..00ebc381a605 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c @@ -88,6 +88,9 @@ int smu_v12_0_check_fw_version(struct smu_context *smu) if (smu->is_apu) adev->pm.fw_version = smu_version; + dev_info(smu->adev->dev, "smu fw reported version = 0x%08x (%d.%d.%d)\n", + smu_version, smu_major, smu_minor, smu_debug); + /* * 1. if_version mismatch is not critical as our fw is designed * to be backward compatible. diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 5b764740b829..d19974aceb2e 100644 --- a/drivers/pinctrl/pinctrl-amd.c +++ b/drivers/pinctrl/pinctrl-amd.c @@ -445,6 +445,7 @@ static int amd_gpio_irq_set_wake(struct irq_data *d, unsigned int on) struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct amd_gpio *gpio_dev = gpiochip_get_data(gc); u32 wake_mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3); + int err; raw_spin_lock_irqsave(&gpio_dev->lock, flags); pin_reg = readl(gpio_dev->base + (d->hwirq)*4); @@ -457,6 +458,15 @@ static int amd_gpio_irq_set_wake(struct irq_data *d, unsigned int on) writel(pin_reg, gpio_dev->base + (d->hwirq)*4); raw_spin_unlock_irqrestore(&gpio_dev->lock, flags); + if (on) + err = enable_irq_wake(gpio_dev->irq); + else + err = disable_irq_wake(gpio_dev->irq); + + if (err) + dev_err(&gpio_dev->pdev->dev, "failed to %s wake-up interrupt\n", + on ? "enable" : "disable"); + return 0; } @@ -904,7 +914,6 @@ static struct pinctrl_desc amd_pinctrl_desc = { static int amd_gpio_probe(struct platform_device *pdev) { int ret = 0; - int irq_base; struct resource *res; struct amd_gpio *gpio_dev; struct gpio_irq_chip *girq; @@ -927,9 +936,9 @@ static int amd_gpio_probe(struct platform_device *pdev) if (!gpio_dev->base) return -ENOMEM; - irq_base = platform_get_irq(pdev, 0); - if (irq_base < 0) - return irq_base; + gpio_dev->irq = platform_get_irq(pdev, 0); + if (gpio_dev->irq < 0) + return gpio_dev->irq; #ifdef CONFIG_PM_SLEEP gpio_dev->saved_regs = devm_kcalloc(&pdev->dev, amd_pinctrl_desc.npins, @@ -989,7 +998,7 @@ static int amd_gpio_probe(struct platform_device *pdev) goto out2; } - ret = devm_request_irq(&pdev->dev, irq_base, amd_gpio_irq_handler, + ret = devm_request_irq(&pdev->dev, gpio_dev->irq, amd_gpio_irq_handler, IRQF_SHARED, KBUILD_MODNAME, gpio_dev); if (ret) goto out2; diff --git a/drivers/pinctrl/pinctrl-amd.h b/drivers/pinctrl/pinctrl-amd.h index 95e763424042..1d4317073654 100644 --- a/drivers/pinctrl/pinctrl-amd.h +++ b/drivers/pinctrl/pinctrl-amd.h @@ -98,6 +98,7 @@ struct amd_gpio { struct resource *res; struct platform_device *pdev; u32 *saved_regs; + int irq; }; /* KERNCZ configuration*/ diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c index d6a7c896ac86..81b000241648 100644 --- a/drivers/platform/x86/amd-pmc.c +++ b/drivers/platform/x86/amd-pmc.c @@ -29,6 +29,10 @@ #define AMD_PMC_REGISTER_RESPONSE 0x980 #define AMD_PMC_REGISTER_ARGUMENT 0x9BC +/* PMC Scratch Registers */ +#define AMD_PMC_SCRATCH_REG_CZN 0x94 +#define AMD_PMC_SCRATCH_REG_YC 0xD14 + /* Base address of SMU for mapping physical address to virtual address */ #define AMD_PMC_SMU_INDEX_ADDRESS 0xB8 #define AMD_PMC_SMU_INDEX_DATA 0xBC @@ -110,6 +114,10 @@ struct amd_pmc_dev { u32 base_addr; u32 cpu_id; u32 active_ips; +/* SMU version information */ + u16 major; + u16 minor; + u16 rev; struct device *dev; struct mutex lock; /* generic mutex lock */ #if IS_ENABLED(CONFIG_DEBUG_FS) @@ -133,7 +141,7 @@ static inline void amd_pmc_reg_write(struct amd_pmc_dev *dev, int reg_offset, u3 struct smu_metrics { u32 table_version; u32 hint_count; - u32 s0i3_cyclecount; + u32 s0i3_last_entry_status; u32 timein_s0i2; u64 timeentering_s0i3_lastcapture; u64 timeentering_s0i3_totaltime; @@ -162,9 +170,12 @@ static int smu_fw_info_show(struct seq_file *s, void *unused) seq_puts(s, "\n=== SMU Statistics ===\n"); seq_printf(s, "Table Version: %d\n", table.table_version); seq_printf(s, "Hint Count: %d\n", table.hint_count); - seq_printf(s, "S0i3 Cycle Count: %d\n", table.s0i3_cyclecount); + seq_printf(s, "Last S0i3 Status: %s\n", table.s0i3_last_entry_status ? "Success" : + "Unknown/Fail"); seq_printf(s, "Time (in us) to S0i3: %lld\n", table.timeentering_s0i3_lastcapture); seq_printf(s, "Time (in us) in S0i3: %lld\n", table.timein_s0i3_lastcapture); + seq_printf(s, "Time (in us) to resume from S0i3: %lld\n", + table.timeto_resume_to_os_lastcapture); seq_puts(s, "\n=== Active time (in us) ===\n"); for (idx = 0 ; idx < SOC_SUBSYSTEM_IP_MAX ; idx++) { @@ -201,6 +212,66 @@ static int s0ix_stats_show(struct seq_file *s, void *unused) } DEFINE_SHOW_ATTRIBUTE(s0ix_stats); +static int amd_pmc_get_smu_version(struct amd_pmc_dev *dev) +{ + int rc; + u32 val; + + rc = amd_pmc_send_cmd(dev, 0, &val, SMU_MSG_GETSMUVERSION, 1); + if (rc) + return rc; + + dev->major = (val >> 16) & GENMASK(15, 0); + dev->minor = (val >> 8) & GENMASK(7, 0); + dev->rev = (val >> 0) & GENMASK(7, 0); + + dev_dbg(dev->dev, "SMU version is %u.%u.%u\n", dev->major, dev->minor, dev->rev); + + return 0; +} + +static int amd_pmc_idlemask_read(struct amd_pmc_dev *pdev, struct device *dev, + struct seq_file *s) +{ + u32 val; + + switch (pdev->cpu_id) { + case AMD_CPU_ID_CZN: + val = amd_pmc_reg_read(pdev, AMD_PMC_SCRATCH_REG_CZN); + break; + case AMD_CPU_ID_YC: + val = amd_pmc_reg_read(pdev, AMD_PMC_SCRATCH_REG_YC); + break; + default: + return -EINVAL; + } + + if (dev) + dev_dbg(pdev->dev, "SMU idlemask s0i3: 0x%x\n", val); + + if (s) + seq_printf(s, "SMU idlemask : 0x%x\n", val); + + return 0; +} + +static int amd_pmc_idlemask_show(struct seq_file *s, void *unused) +{ + struct amd_pmc_dev *dev = s->private; + int rc; + + if (dev->major > 56 || (dev->major >= 55 && dev->minor >= 37)) { + rc = amd_pmc_idlemask_read(dev, NULL, s); + if (rc) + return rc; + } else { + seq_puts(s, "Unsupported SMU version for Idlemask\n"); + } + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(amd_pmc_idlemask); + static void amd_pmc_dbgfs_unregister(struct amd_pmc_dev *dev) { debugfs_remove_recursive(dev->dbgfs_dir); @@ -213,6 +284,8 @@ static void amd_pmc_dbgfs_register(struct amd_pmc_dev *dev) &smu_fw_info_fops); debugfs_create_file("s0ix_stats", 0644, dev->dbgfs_dir, dev, &s0ix_stats_fops); + debugfs_create_file("amd_pmc_idlemask", 0644, dev->dbgfs_dir, dev, + &amd_pmc_idlemask_fops); } #else static inline void amd_pmc_dbgfs_register(struct amd_pmc_dev *dev) @@ -270,6 +343,7 @@ static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, bool set, u32 *data, u8 msg u32 val; mutex_lock(&dev->lock); + amd_pmc_dump_registers(dev); /* Wait until we get a valid response */ rc = readx_poll_timeout(ioread32, dev->regbase + AMD_PMC_REGISTER_RESPONSE, val, val != 0, PMC_MSG_DELAY_MIN_US, @@ -349,6 +423,8 @@ static int __maybe_unused amd_pmc_suspend(struct device *dev) amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_RESET, 0); amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_START, 0); + /* Dump the IdleMask before we send hint to SMU */ + amd_pmc_idlemask_read(pdev, dev, NULL); msg = amd_pmc_get_os_hint(pdev); rc = amd_pmc_send_cmd(pdev, 1, NULL, msg, 0); if (rc) @@ -363,14 +439,17 @@ static int __maybe_unused amd_pmc_resume(struct device *dev) int rc; u8 msg; - /* Let SMU know that we are looking for stats */ - amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_DUMP_DATA, 0); - msg = amd_pmc_get_os_hint(pdev); rc = amd_pmc_send_cmd(pdev, 0, NULL, msg, 0); if (rc) dev_err(pdev->dev, "resume failed\n"); + /* Let SMU know that we are looking for stats */ + amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_DUMP_DATA, 0); + + /* Dump the IdleMask to see the blockers */ + amd_pmc_idlemask_read(pdev, dev, NULL); + return 0; } @@ -457,6 +536,7 @@ static int amd_pmc_probe(struct platform_device *pdev) if (err) dev_err(dev->dev, "SMU debugging info not supported on this platform\n"); + amd_pmc_get_smu_version(dev); platform_set_drvdata(pdev, dev); amd_pmc_dbgfs_register(dev); return 0; -- 2.33.0