blob: 2b374d7ba6e4b8f95ea7c41d9d47d87bc6b227a0 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
|
pkgbase = verilator-git
pkgdesc = The fastest free Verilog HDL simulator
pkgver = r5482.f6f13c7fd
pkgrel = 1
url = https://www.veripool.org/projects/verilator/wiki/Intro
arch = x86_64
license = LGPL
makedepends = python
makedepends = systemc
makedepends = lsb-release
makedepends = git
depends = perl
optdepends = systemc
provides = verilator
conflicts = verilator
source = verilator::git+https://github.com/verilator/verilator.git
source = 3694.diff
sha512sums = SKIP
sha512sums = bc9a86041442a2dd14f2de6dbce3b29601998599b0054c5e23173ac909bbb5ef6da8c35c28121eac7155ccdee88cf42b3e0ab2addebd6d20ba89cf0729e5f25e
pkgname = verilator-git
|