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pkgbase = vitis
pkgdesc = FPGA/CPLD design suite for Xilinx devices
pkgver = 2022.2
pkgrel = 1
url = https://www.xilinx.com/products/design-tools/vitis.html
arch = x86_64
license = custom
makedepends = python
depends = ncurses5-compat-libs
depends = libxcrypt-compat
depends = libpng12
depends = lib32-libpng12
depends = gtk2
depends = xorg-xlsclients
depends = cpio
optdepends = fxload
optdepends = digilent.adept.runtime
optdepends = digilent.adept.utilities
optdepends = matlab: Model Composer
optdepends = qt4: Model Composer
optdepends = python
optdepends = gcc
optdepends = git
optdepends = graphviz
optdepends = make
optdepends = net-tools
optdepends = openssl
provides = vivado
conflicts = vivado
options = !strip
source = file:///Xilinx_Unified_2022.2_1014_8888.tar.gz
source = spoof_homedir.c
md5sums = 4b4e84306eb631fe67d3efb469122671
md5sums = 69d14ad64f6ec44e041eaa8ffcb6f87c
pkgname = vitis
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