summarylogtreecommitdiffstats
path: root/.SRCINFO
blob: c88b0ff27cca22f8ae99486924d2eed4464b12f9 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
pkgbase = yosys-uhdm-plugin
	pkgdesc = UDHM plugin for Yosys (SystemVerilog support)
	pkgver = 1061066
	pkgrel = 1
	url = https://github.com/antmicro/yosys-uhdm-plugin-integration/releases
	arch = x86_64
	license = ISC License
	makedepends = jq
	makedepends = curl
	makedepends = wget
	depends = oss-cad-suite-build-bin
	provides = yosys-uhdm-plugin
	source = https://api.github.com/repos/antmicro/yosys-uhdm-plugin-integration/releases/latest
	sha512sums = SKIP

pkgname = yosys-uhdm-plugin