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--- a/plat/mediatek/mt7622/bl2_plat_setup.c 2021-09-15 13:35:58.536925357 +0200
+++ b/plat/mediatek/mt7622/bl2_plat_setup.c 2021-09-15 14:00:52.439937687 +0200
@@ -72,7 +72,31 @@
SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2,
image_info_t, 0),
.image_info.image_base = BL33_BASE,
- .image_info.image_max_size = 0x200000 /* 2MB */,
+ .image_info.image_max_size = 0x4000000 /* 64MB */,
+
+ .next_handoff_image_id = BL32_EXTRA2_IMAGE_ID,
+ },
+ /* Fill BL32_EXTRA2_IMAGE_ID related information */
+ {
+ .image_id = BL32_EXTRA2_IMAGE_ID,
+ SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
+ VERSION_2, entry_point_info_t, NON_SECURE | NON_EXECUTABLE),
+ SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
+ VERSION_2, image_info_t, 0),
+ .image_info.image_base = BL33_BASE + 0x4000000,
+ .image_info.image_max_size = 0x4000000,
+
+ .next_handoff_image_id = NT_FW_CONFIG_ID,
+ },
+ /* Fill NT_FW_CONFIG related information */
+ {
+ .image_id = NT_FW_CONFIG_ID,
+ SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
+ VERSION_2, entry_point_info_t, NON_SECURE | NON_EXECUTABLE),
+ SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
+ VERSION_2, image_info_t, 0),
+ .image_info.image_base = BL32_BASE,
+ .image_info.image_max_size = BL32_LIMIT,
.next_handoff_image_id = INVALID_IMAGE_ID,
}
@@ -126,6 +140,14 @@
.uuid = UUID_EL3_RUNTIME_FIRMWARE_BL31,
};
+static const io_uuid_spec_t ntfwconf_uuid_spec = {
+ .uuid = UUID_NT_FW_CONFIG,
+};
+
+static const io_uuid_spec_t tosfwEXTRA2_uuid_spec = {
+ .uuid = UUID_SECURE_PAYLOAD_BL32_EXTRA2,
+};
+
static const io_uuid_spec_t bl32_uuid_spec = {
.uuid = UUID_SECURE_PAYLOAD_BL32,
};
@@ -183,6 +201,16 @@
(uintptr_t)&bl31_uuid_spec,
check_fip
},
+ [NT_FW_CONFIG_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&ntfwconf_uuid_spec,
+ check_fip
+ },
+ [BL32_EXTRA2_IMAGE_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&tosfwEXTRA2_uuid_spec,
+ check_fip
+ },
[BL32_IMAGE_ID] = {
&fip_dev_handle,
(uintptr_t)&bl32_uuid_spec,
|