Package Details: litex-git 4143-3

Git Clone URL: https://aur.archlinux.org/litex-git.git (read-only)
Package Base: litex-git
Description: Migen based SoC
Upstream URL: https://github.com/enjoy-digital/litex
Licenses: MIT
Provides: litex
Submitter: cbjamo
Maintainer: cbjamo
Last Packager: cbjamo
Votes: 0
Popularity: 0.000000
First Submitted: 2018-06-10 12:03
Last Updated: 2019-03-28 12:13

Dependencies (6)

Required by (10)

Sources (1)

Latest Comments

cbjamo commented on 2019-03-28 12:21

It looks like those python errors are unrelated to the vexriscv core's missing verilog. They are are from some python2 submodules in upstream. And can safely be ignored.

I'm not sure why those verilog files aren't being copied over. For now I'm manually copying them into the package. When I've got some more time I'll take another look, or if you have any ideas let me know. In any case, the package now installs the verilog correctly.

andres commented on 2019-03-25 20:02

This PKGBUILD generates multiple errors and silently ignores them, resulting in /usr/lib/python3.7/site-packages/litex/soc/cores/cpu/vexriscv missing verilog files. It looks like some confusion between python2 and python3. https://paste.sr.ht/~andres/f933bc23e1a2640740a2a176c97619a5dc21fa86