Binary files are built and tested with my build scripts on GitHub: https://github.com/ResRipper/Xyce-Builder
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Package Details: xyce-serial-bin 7.10.0-1
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| Git Clone URL: | https://aur.archlinux.org/xyce-serial-bin.git (read-only, click to copy) |
|---|---|
| Package Base: | xyce-serial-bin |
| Description: | Open-source, SPICE-compatible, high-performance analog circuit simulator |
| Upstream URL: | https://xyce.sandia.gov/ |
| Licenses: | GPL-3.0-or-later |
| Conflicts: | xyce-serial, xyce-shylu |
| Submitter: | ResRipper |
| Maintainer: | ResRipper |
| Last Packager: | ResRipper |
| Votes: | 0 |
| Popularity: | 0.000000 |
| First Submitted: | 2026-01-08 09:55 (UTC) |
| Last Updated: | 2026-01-08 09:55 (UTC) |
Dependencies (7)
- blas-openblas
- fftw (fftw-amdAUR)
- gcc-libs (gcc-libs-gitAUR, gccrs-libs-gitAUR, gcc-libs-snapshotAUR)
- suitesparse
- tar (tar-gitAUR, uutils-tar-gitAUR) (make)
- zstd (zstd-gitAUR, zstd-staticAUR) (make)
- admsAUR (adms-gitAUR) (optional) – Convert Verilog-A models to C++ for Xyce
Pinned Comments
ResRipper commented on 2026-01-20 01:34 (UTC)
Binary files are built and tested with my build scripts on GitHub: https://github.com/ResRipper/Xyce-Builder