diff options
| author | Jiuyang liu | 2019-06-25 08:43:59 +0000 |
|---|---|---|
| committer | Jiuyang liu | 2019-06-25 08:44:27 +0000 |
| commit | 41560dadd1fdd27009dbe157bc6689ad8cbb2c5e (patch) | |
| tree | 6785aabec1c3c25023d91e0588b45ff28eee8971 /.SRCINFO | |
| download | aur-riscv-sifive-elf-gcc.tar.gz | |
init
Diffstat (limited to '.SRCINFO')
| -rw-r--r-- | .SRCINFO | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/.SRCINFO b/.SRCINFO new file mode 100644 index 000000000000..0ccebccf01d8 --- /dev/null +++ b/.SRCINFO @@ -0,0 +1,29 @@ +pkgbase = riscv-sifive-elf-gcc + pkgdesc = Cross compiler for 32-bit and 64-bit RISC-V + pkgver = 9.1.0 + pkgrel = 1 + url = https://gcc.gnu.org/ + arch = x86_64 + groups = risc-v + license = GPL + license = LGPL + license = FDL + makedepends = python + depends = riscv-sifive-elf-binutils + depends = libmpc + depends = riscv-sifive-elf-newlib + options = !emptydirs + options = !strip + source = https://gcc.gnu.org/pub/gcc/releases/gcc-9.1.0/gcc-9.1.0.tar.xz + source = 0001-SiFive-CLIC-patches-for-preemptible-and-stack-swappi.patch + source = 0002-Finish-CLIC-support-resolving-patch-merge-error-and-.patch + source = 0003-RISC-V-Add-short-forward-branch-optimization-for-sif.patch + source = 0004-Remove-libgloss.patch + md5sums = 6069ae3737cf02bf2cb44a391ef0e937 + md5sums = SKIP + md5sums = SKIP + md5sums = SKIP + md5sums = SKIP + +pkgname = riscv-sifive-elf-gcc + |