summarylogtreecommitdiffstats
path: root/0014-drm-amdgpu-Add-DC-feature-mask-to-disable-fractional.patch
diff options
context:
space:
mode:
authorDavid Runge2020-01-21 11:23:57 +0100
committerDavid Runge2020-01-21 12:01:18 +0100
commitff97d1f036cf85f816ae9a0b09d0d1314934c79e (patch)
tree6ed83892655a8b38acaf6300c30f62a13b68a32f /0014-drm-amdgpu-Add-DC-feature-mask-to-disable-fractional.patch
parentfb91ab0e05fa09120e71bbe92c86446635be6c37 (diff)
downloadaur-ff97d1f036cf85f816ae9a0b09d0d1314934c79e.tar.gz
Upgrading to 5.4.13.7. Adding all current patches from [core] linux. .gitignore: Adding .zst files.
PKGBUILD: Upgrding to 5.4.13.7. Adding all current patches from [core] linux. .gitignore: Adding .zst files.
Diffstat (limited to '0014-drm-amdgpu-Add-DC-feature-mask-to-disable-fractional.patch')
-rw-r--r--0014-drm-amdgpu-Add-DC-feature-mask-to-disable-fractional.patch80
1 files changed, 80 insertions, 0 deletions
diff --git a/0014-drm-amdgpu-Add-DC-feature-mask-to-disable-fractional.patch b/0014-drm-amdgpu-Add-DC-feature-mask-to-disable-fractional.patch
new file mode 100644
index 000000000000..a12039123a67
--- /dev/null
+++ b/0014-drm-amdgpu-Add-DC-feature-mask-to-disable-fractional.patch
@@ -0,0 +1,80 @@
+From f247d4a6fe42acc60b775457e3c35b8289532590 Mon Sep 17 00:00:00 2001
+From: Leo Li <sunpeng.li@amd.com>
+Date: Mon, 21 Oct 2019 14:58:47 -0400
+Subject: [PATCH 14/16] drm/amdgpu: Add DC feature mask to disable fractional
+ pwm
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+[Why]
+
+Some LED panel drivers might not like fractional PWM. In such cases,
+backlight flickering may be observed.
+
+[How]
+
+Add a DC feature mask to disable fractional PWM, and associate it with
+the preexisting dc_config flag.
+
+The flag is only plumbed through the dmcu firmware, so plumb it through
+the driver path as well.
+
+To disable, add the following to the linux cmdline:
+amdgpu.dcfeaturemask=0x4
+
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204957
+Signed-off-by: Leo Li <sunpeng.li@amd.com>
+Reviewed-by: Anthony Koo <anthony.koo@amd.com>
+Tested-by: Lukáš Krejčí <lskrejci@gmail.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +++
+ drivers/gpu/drm/amd/display/dc/dce/dce_abm.c | 4 ++++
+ drivers/gpu/drm/amd/include/amd_shared.h | 1 +
+ 3 files changed, 8 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+index 4e9c15c409ba..25b72eb76add 100644
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -697,6 +697,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
+ if (amdgpu_dc_feature_mask & DC_MULTI_MON_PP_MCLK_SWITCH_MASK)
+ init_data.flags.multi_mon_pp_mclk_switch = true;
+
++ if (amdgpu_dc_feature_mask & DC_DISABLE_FRACTIONAL_PWM_MASK)
++ init_data.flags.disable_fractional_pwm = true;
++
+ init_data.flags.power_down_display_on_boot = true;
+
+ #ifdef CONFIG_DRM_AMD_DC_DCN2_0
+diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c
+index 7700a855d77c..698b84acc44f 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c
++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c
+@@ -404,6 +404,10 @@ static bool dce_abm_init_backlight(struct abm *abm)
+ /* Enable the backlight output */
+ REG_UPDATE(BL_PWM_CNTL, BL_PWM_EN, 1);
+
++ /* Disable fractional pwm if configured */
++ REG_UPDATE(BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN,
++ abm->ctx->dc->config.disable_fractional_pwm ? 0 : 1);
++
+ /* Unlock group 2 backlight registers */
+ REG_UPDATE(BL_PWM_GRP1_REG_LOCK,
+ BL_PWM_GRP1_REG_LOCK, 0);
+diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
+index 8889aaceec60..5450ed762b7a 100644
+--- a/drivers/gpu/drm/amd/include/amd_shared.h
++++ b/drivers/gpu/drm/amd/include/amd_shared.h
+@@ -143,6 +143,7 @@ enum PP_FEATURE_MASK {
+ enum DC_FEATURE_MASK {
+ DC_FBC_MASK = 0x1,
+ DC_MULTI_MON_PP_MCLK_SWITCH_MASK = 0x2,
++ DC_DISABLE_FRACTIONAL_PWM_MASK = 0x4,
+ };
+
+ enum amd_dpm_forced_level;
+--
+2.25.0
+