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author | Jiuyang liu | 2020-06-21 13:31:02 +0000 |
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committer | Jiuyang liu | 2020-06-21 13:31:02 +0000 |
commit | 4ca2f8c79cd16041545914e6e1a5af022e3031ac (patch) | |
tree | 43d050cadb5d4eddfae1d18983f37dd89b4ba5c4 | |
parent | 114554af16e4789776590343d0ab6e3da7230c5e (diff) | |
download | aur-eda-meta.tar.gz |
add rv toolchain
-rw-r--r-- | .SRCINFO | 4 | ||||
-rw-r--r-- | PKGBUILD | 3 |
2 files changed, 7 insertions, 0 deletions
@@ -24,6 +24,10 @@ pkgbase = eda-meta depends = verilator depends = mill depends = sbt + depends = riscv64-linux-gnu-binutils + depends = riscv64-linux-gnu-gcc + depends = riscv64-linux-gnu-gdb + depends = riscv64-linux-gnu-glibc depends = python-jsonschema depends = python-jsonschema-objects depends = python-yaml @@ -13,6 +13,9 @@ depends=( # chisel/verilog IDE and simulation 'intellij-idea-community-edition' 'verilator' 'mill' 'sbt' + + # riscv + 'riscv64-linux-gnu-binutils' 'riscv64-linux-gnu-gcc' 'riscv64-linux-gnu-gdb' 'riscv64-linux-gnu-glibc' # Hammer 'python-jsonschema' 'python-jsonschema-objects' 'python-yaml' 'python-gdspy' |