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authorgraysky2019-12-24 10:27:22 -0500
committergraysky2019-12-24 10:27:22 -0500
commit389a9ca5485e70279c9e111a45a373156abd9019 (patch)
tree48a2e945190714be89b00038ff939a3fae8007d5
parent316968bbc7eed39df26e3eaeb193f2e0b4960aa1 (diff)
downloadaur-389a9ca5485e70279c9e111a45a373156abd9019.tar.gz
Update to 5.4.6-2
-rw-r--r--.SRCINFO40
-rw-r--r--0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch4
-rw-r--r--0002-lib-devres-add-a-helper-function-for-ioremap_uc.patch4
-rw-r--r--0003-mfd-intel-lpss-Use-devm_ioremap_uc-for-MMIO.patch4
-rw-r--r--0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch4
-rw-r--r--0005-PCI-pciehp-Prevent-deadlock-on-disconnect.patch12
-rw-r--r--0006-ACPI-PM-s2idle-Rework-ACPI-events-synchronization.patch4
-rw-r--r--0007-x86-MCE-AMD-Do-not-use-rdmsr_safe_on_cpu-in-smca_con.patch73
-rw-r--r--0008-x86-MCE-AMD-Allow-Reserved-types-to-be-overwritten-i.patch96
-rw-r--r--0009-x86-mce-Fix-possibly-incorrect-severity-calculation-.patch47
-rw-r--r--0010-Revert-iwlwifi-assign-directly-to-iwl_trans-cfg-in-Q.patch61
-rw-r--r--0011-iwlwifi-pcie-move-power-gating-workaround-earlier-in.patch120
-rw-r--r--0012-x86-intel-Disable-HPET-on-Intel-Coffee-Lake-H-platfo.patch41
-rw-r--r--0013-x86-intel-Disable-HPET-on-Intel-Ice-Lake-platforms.patch38
-rw-r--r--0014-drm-i915-save-AUD_FREQ_CNTRL-state-at-audio-domain-s.patch87
-rw-r--r--0015-drm-i915-Fix-audio-power-up-sequence-for-gen10-displ.patch57
-rw-r--r--0016-drm-i915-extend-audio-CDCLK-2-BCLK-constraint-to-mor.patch41
-rw-r--r--0017-ASoC-SOF-enable-sync_write-in-hdac_bus.patch39
-rw-r--r--0018-xhci-pci-Allow-host-runtime-PM-as-default-also-for-I.patch48
-rw-r--r--0019-iwlwifi-pcie-restore-support-for-Killer-Qu-C0-NICs.patch36
-rw-r--r--PKGBUILD40
21 files changed, 866 insertions, 30 deletions
diff --git a/.SRCINFO b/.SRCINFO
index 9de5ebc10f2..61d97088ad6 100644
--- a/.SRCINFO
+++ b/.SRCINFO
@@ -1,6 +1,6 @@
pkgbase = linux-ck
pkgver = 5.4.6
- pkgrel = 1
+ pkgrel = 2
url = https://wiki.archlinux.org/index.php/Linux-ck
arch = x86_64
license = GPL2
@@ -20,6 +20,19 @@ pkgbase = linux-ck
source = 0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch
source = 0005-PCI-pciehp-Prevent-deadlock-on-disconnect.patch
source = 0006-ACPI-PM-s2idle-Rework-ACPI-events-synchronization.patch
+ source = 0007-x86-MCE-AMD-Do-not-use-rdmsr_safe_on_cpu-in-smca_con.patch
+ source = 0008-x86-MCE-AMD-Allow-Reserved-types-to-be-overwritten-i.patch
+ source = 0009-x86-mce-Fix-possibly-incorrect-severity-calculation-.patch
+ source = 0010-Revert-iwlwifi-assign-directly-to-iwl_trans-cfg-in-Q.patch
+ source = 0011-iwlwifi-pcie-move-power-gating-workaround-earlier-in.patch
+ source = 0012-x86-intel-Disable-HPET-on-Intel-Coffee-Lake-H-platfo.patch
+ source = 0013-x86-intel-Disable-HPET-on-Intel-Ice-Lake-platforms.patch
+ source = 0014-drm-i915-save-AUD_FREQ_CNTRL-state-at-audio-domain-s.patch
+ source = 0015-drm-i915-Fix-audio-power-up-sequence-for-gen10-displ.patch
+ source = 0016-drm-i915-extend-audio-CDCLK-2-BCLK-constraint-to-mor.patch
+ source = 0017-ASoC-SOF-enable-sync_write-in-hdac_bus.patch
+ source = 0018-xhci-pci-Allow-host-runtime-PM-as-default-also-for-I.patch
+ source = 0019-iwlwifi-pcie-restore-support-for-Killer-Qu-C0-NICs.patch
validpgpkeys = ABAF11C65A2970B130ABE3C479BE3E4300411886
validpgpkeys = 647F28654894E3BD457199BE38DBBDC86092693E
sha256sums = fda561bcdea397ddd59656319c53871002938b19b554f30efed90affa30989c8
@@ -27,12 +40,25 @@ pkgbase = linux-ck
sha256sums = 5d58a2115892839997ae7dcca226697c34b656de7685cb3eb8696451dc5100a0
sha256sums = 8c11086809864b5cef7d079f930bd40da8d0869c091965fa62e95de9a0fe13b5
sha256sums = f445eea4d0ec2015a25f1ad625c848f4f2252099795966fa4105e0aa29674c5c
- sha256sums = 71908105e1606cee9e62c99ac89aca98e8a26ff3f9796c8ab36858632614e85a
- sha256sums = 6765399f9d0de2daf7121f96a09eafc646731eb2058a01420d882297e10dfae5
- sha256sums = f922696f10cfbe7e5b0a95fb3d9333006d63a1c4dbfc280ae3b5d10c8c7208fb
- sha256sums = 8496a9be2c3b2e3cefa292d00d3f43a4e7c3b03c4508f9d38a6b21fa4684240d
- sha256sums = e5a3ed9c900b7e69cec1090ff76171a1c00cf723a2fa9a07fdf95c194ef3738b
- sha256sums = 760b60334eff05b1ef20c800fdb1e2ff6c7f9264f5e5c396f644720a824a92d7
+ sha256sums = c404647c64cb7b2ab6aae5333cffe072725fe1a3e3f863646656591af7b55078
+ sha256sums = fe6d125c1101b8ec6e01783598b7a9a34130447b28239d47ee6cafd76f9806ae
+ sha256sums = e021b7d4cfb26e851b5b55250fd4e635b66237a8863c962ede4f51022f9927cc
+ sha256sums = 5ccbf49c1f588f344b120750d63bf42be5b8cda4946ebe256d5d69df3fce96ac
+ sha256sums = 514088ce473a7160e1a906aaf44adac4389de48ba8bfaffb28ef2efaff5b2a41
+ sha256sums = 5fcddf32bc5017afcf20c52430febf08c4f4de2a13aa838298eb8ff982fbda77
+ sha256sums = 2ffc236ad41c40ec5d622ff2c8d6ae3a22e545dbeb3a0cc0f63a70d2438bb507
+ sha256sums = 90bb284a19e9dd8aab105a80632170e58d818200965f51cb98ee4849d9cd2594
+ sha256sums = d573611616cb24b6c240c57321b3de6c2e51c49a3f8df52ef63009aeea5eb60e
+ sha256sums = 04c6d2408452b907b12a6ee149cc023998545199cd3e9793b555682ad99aae35
+ sha256sums = c974abd5df781b303a6cfaa1685a5b1556b4104441804d14963e8a2893fcc548
+ sha256sums = 6556d1dfa848566774fb1014c451809fb6dfab39336b27197d1b3a23d427d1ca
+ sha256sums = 6b7f016aa55b9ba7ce7425b9a2f0c8b3bd8d4a4bbf703db9701c0974dc24162c
+ sha256sums = 02f8992b6b6c467f561dd9aa309fc00695276d11227a2fc6816860c896bd206d
+ sha256sums = 227668904e0d363c43e756dd08aec15accc5ebbc045b9d7b2068f27801009b63
+ sha256sums = 97ab714be54e5516dcd4df051c8f7b551b87a0ca85c0e6b1f50f4eb1226d95d1
+ sha256sums = 09749254d63826dd3ddf6451882adc91deb1a79561593a7c399a41b623310c19
+ sha256sums = c81691927b5c7e36f492d5d922051fb2b26dd1b24033c3a483f40045621e3960
+ sha256sums = 2bde1e65dec65394c26cfe5f0ba0256d807047f7720cd3ce9367667d885fc7bd
pkgname = linux-ck
pkgdesc = The Linux-ck kernel and modules with the ck1 patchset featuring MuQSS CPU scheduler
diff --git a/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch b/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
index 3c532251030..79fe302a047 100644
--- a/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
+++ b/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
@@ -1,7 +1,7 @@
-From 53026cc7697cc30c08a2ff4841e851d927da24ef Mon Sep 17 00:00:00 2001
+From ad4dbce36dd2083de69815f613342257535f6274 Mon Sep 17 00:00:00 2001
From: "Jan Alexander Steffens (heftig)" <jan.steffens@gmail.com>
Date: Mon, 16 Sep 2019 04:53:20 +0200
-Subject: [PATCH 1/9] ZEN: Add sysctl and CONFIG to disallow unprivileged
+Subject: [PATCH 01/20] ZEN: Add sysctl and CONFIG to disallow unprivileged
CLONE_NEWUSER
Our default behavior continues to match the vanilla kernel.
diff --git a/0002-lib-devres-add-a-helper-function-for-ioremap_uc.patch b/0002-lib-devres-add-a-helper-function-for-ioremap_uc.patch
index 4566aeb758c..71b5414bd3b 100644
--- a/0002-lib-devres-add-a-helper-function-for-ioremap_uc.patch
+++ b/0002-lib-devres-add-a-helper-function-for-ioremap_uc.patch
@@ -1,7 +1,7 @@
-From d56ae3b8201b4634648de6a0df959d936c9fc0e6 Mon Sep 17 00:00:00 2001
+From 5925138606a245d43d8a6db47b754cea6f6049ae Mon Sep 17 00:00:00 2001
From: Tuowen Zhao <ztuowen@gmail.com>
Date: Wed, 16 Oct 2019 15:06:28 -0600
-Subject: [PATCH 2/9] lib: devres: add a helper function for ioremap_uc
+Subject: [PATCH 02/20] lib: devres: add a helper function for ioremap_uc
Implement a resource managed strongly uncachable ioremap function.
diff --git a/0003-mfd-intel-lpss-Use-devm_ioremap_uc-for-MMIO.patch b/0003-mfd-intel-lpss-Use-devm_ioremap_uc-for-MMIO.patch
index eece60c66a7..e83308b7c2f 100644
--- a/0003-mfd-intel-lpss-Use-devm_ioremap_uc-for-MMIO.patch
+++ b/0003-mfd-intel-lpss-Use-devm_ioremap_uc-for-MMIO.patch
@@ -1,7 +1,7 @@
-From 328396ba88d7080612a52f5e0d9f848e40ab57f3 Mon Sep 17 00:00:00 2001
+From 3cec19068653e77d311382d7467728f5d424d4a3 Mon Sep 17 00:00:00 2001
From: Tuowen Zhao <ztuowen@gmail.com>
Date: Wed, 16 Oct 2019 15:06:29 -0600
-Subject: [PATCH 3/9] mfd: intel-lpss: Use devm_ioremap_uc for MMIO
+Subject: [PATCH 03/20] mfd: intel-lpss: Use devm_ioremap_uc for MMIO
Some BIOS erroneously specifies write-combining BAR for intel-lpss-pci
in MTRR. This will cause the system to hang during boot. If possible,
diff --git a/0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch b/0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch
index 245f6a75a5e..d26660b4b8f 100644
--- a/0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch
+++ b/0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch
@@ -1,7 +1,7 @@
-From b4622df1bc8927968b38f591e5d31091ea9b5383 Mon Sep 17 00:00:00 2001
+From 271c8fe698d3ba5b3b135ffacfd1dc0c87243e32 Mon Sep 17 00:00:00 2001
From: Mika Westerberg <mika.westerberg@linux.intel.com>
Date: Tue, 29 Oct 2019 20:00:21 +0300
-Subject: [PATCH 4/9] PCI: pciehp: Do not disable interrupt twice on suspend
+Subject: [PATCH 04/20] PCI: pciehp: Do not disable interrupt twice on suspend
We try to keep PCIe hotplug ports runtime suspended when entering system
suspend. Because the PCIe portdrv sets the DPM_FLAG_NEVER_SKIP flag, the PM
diff --git a/0005-PCI-pciehp-Prevent-deadlock-on-disconnect.patch b/0005-PCI-pciehp-Prevent-deadlock-on-disconnect.patch
index ad867c3017f..73637c093ba 100644
--- a/0005-PCI-pciehp-Prevent-deadlock-on-disconnect.patch
+++ b/0005-PCI-pciehp-Prevent-deadlock-on-disconnect.patch
@@ -1,7 +1,7 @@
-From afad84fc6acaed69089d70da12594a6c3f68841f Mon Sep 17 00:00:00 2001
+From 8d032e7fc1d1d37974785ccdb994524d60201ca3 Mon Sep 17 00:00:00 2001
From: Mika Westerberg <mika.westerberg@linux.intel.com>
Date: Tue, 29 Oct 2019 20:00:22 +0300
-Subject: [PATCH 5/9] PCI: pciehp: Prevent deadlock on disconnect
+Subject: [PATCH 05/20] PCI: pciehp: Prevent deadlock on disconnect
This addresses deadlocks in these common cases in hierarchies containing
two switches:
@@ -96,10 +96,10 @@ Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
4 files changed, 61 insertions(+), 19 deletions(-)
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
-index 654c972b8ea0..afea59a3aad2 100644
+index 882ce82c4699..aa61d4c219d7 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
-@@ -172,10 +172,10 @@ void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn);
+@@ -174,10 +174,10 @@ void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn);
void pciehp_get_latch_status(struct controller *ctrl, u8 *status);
int pciehp_query_power_fault(struct controller *ctrl);
@@ -151,7 +151,7 @@ index 56daad828c9e..312cc45c44c7 100644
(!occupied && (ctrl->state == ON_STATE ||
ctrl->state == BLINKINGOFF_STATE)))
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c
-index 21af7b16d7a4..c760a13ec7b1 100644
+index dd8e4a5fb282..6503d15effbb 100644
--- a/drivers/pci/hotplug/pciehp_ctrl.c
+++ b/drivers/pci/hotplug/pciehp_ctrl.c
@@ -226,7 +226,7 @@ void pciehp_handle_disable_request(struct controller *ctrl)
@@ -173,7 +173,7 @@ index 21af7b16d7a4..c760a13ec7b1 100644
return;
}
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
-index 1a522c1c4177..526a8f70bac5 100644
+index 86d97f3112f0..a2a263764ef8 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -201,17 +201,29 @@ static void pcie_write_cmd_nowait(struct controller *ctrl, u16 cmd, u16 mask)
diff --git a/0006-ACPI-PM-s2idle-Rework-ACPI-events-synchronization.patch b/0006-ACPI-PM-s2idle-Rework-ACPI-events-synchronization.patch
index 5feceed2f72..e2b20e3f926 100644
--- a/0006-ACPI-PM-s2idle-Rework-ACPI-events-synchronization.patch
+++ b/0006-ACPI-PM-s2idle-Rework-ACPI-events-synchronization.patch
@@ -1,7 +1,7 @@
-From 3c3e5ada50e5a54dd267deef040365b8c1c59529 Mon Sep 17 00:00:00 2001
+From 9888be9033e8e79a055df2ae8d388baf5970f83b Mon Sep 17 00:00:00 2001
From: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
Date: Thu, 28 Nov 2019 23:50:40 +0100
-Subject: [PATCH 6/9] ACPI: PM: s2idle: Rework ACPI events synchronization
+Subject: [PATCH 06/20] ACPI: PM: s2idle: Rework ACPI events synchronization
Note that the EC GPE processing need not be synchronized in
acpi_s2idle_wake() after invoking acpi_ec_dispatch_gpe(), because
diff --git a/0007-x86-MCE-AMD-Do-not-use-rdmsr_safe_on_cpu-in-smca_con.patch b/0007-x86-MCE-AMD-Do-not-use-rdmsr_safe_on_cpu-in-smca_con.patch
new file mode 100644
index 00000000000..36644e88054
--- /dev/null
+++ b/0007-x86-MCE-AMD-Do-not-use-rdmsr_safe_on_cpu-in-smca_con.patch
@@ -0,0 +1,73 @@
+From 1a95a3417bdadb0528e16745802688c393aa0afd Mon Sep 17 00:00:00 2001
+From: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
+Date: Thu, 31 Oct 2019 16:04:48 +0300
+Subject: [PATCH 07/20] x86/MCE/AMD: Do not use rdmsr_safe_on_cpu() in
+ smca_configure()
+
+... because interrupts are disabled that early and sending IPIs can
+deadlock:
+
+ BUG: sleeping function called from invalid context at kernel/sched/completion.c:99
+ in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 0, name: swapper/1
+ no locks held by swapper/1/0.
+ irq event stamp: 0
+ hardirqs last enabled at (0): [<0000000000000000>] 0x0
+ hardirqs last disabled at (0): [<ffffffff8106dda9>] copy_process+0x8b9/0x1ca0
+ softirqs last enabled at (0): [<ffffffff8106dda9>] copy_process+0x8b9/0x1ca0
+ softirqs last disabled at (0): [<0000000000000000>] 0x0
+ Preemption disabled at:
+ [<ffffffff8104703b>] start_secondary+0x3b/0x190
+ CPU: 1 PID: 0 Comm: swapper/1 Not tainted 5.5.0-rc2+ #1
+ Hardware name: GIGABYTE MZ01-CE1-00/MZ01-CE1-00, BIOS F02 08/29/2018
+ Call Trace:
+ dump_stack
+ ___might_sleep.cold.92
+ wait_for_completion
+ ? generic_exec_single
+ rdmsr_safe_on_cpu
+ ? wrmsr_on_cpus
+ mce_amd_feature_init
+ mcheck_cpu_init
+ identify_cpu
+ identify_secondary_cpu
+ smp_store_cpu_info
+ start_secondary
+ secondary_startup_64
+
+The function smca_configure() is called only on the current CPU anyway,
+therefore replace rdmsr_safe_on_cpu() with atomic rdmsr_safe() and avoid
+the IPI.
+
+ [ bp: Update commit message. ]
+
+Signed-off-by: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
+Signed-off-by: Borislav Petkov <bp@suse.de>
+Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>
+Cc: "H. Peter Anvin" <hpa@zytor.com>
+Cc: Ingo Molnar <mingo@redhat.com>
+Cc: linux-edac <linux-edac@vger.kernel.org>
+Cc: <stable@vger.kernel.org>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: Tony Luck <tony.luck@intel.com>
+Cc: x86-ml <x86@kernel.org>
+Link: https://lkml.kernel.org/r/157252708836.3876.4604398213417262402.stgit@buzz
+---
+ arch/x86/kernel/cpu/mce/amd.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
+index 6ea7fdc82f3c..c7ab0d38af79 100644
+--- a/arch/x86/kernel/cpu/mce/amd.c
++++ b/arch/x86/kernel/cpu/mce/amd.c
+@@ -269,7 +269,7 @@ static void smca_configure(unsigned int bank, unsigned int cpu)
+ if (smca_banks[bank].hwid)
+ return;
+
+- if (rdmsr_safe_on_cpu(cpu, MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) {
++ if (rdmsr_safe(MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) {
+ pr_warn("Failed to read MCA_IPID for bank %d\n", bank);
+ return;
+ }
+--
+2.24.1
+
diff --git a/0008-x86-MCE-AMD-Allow-Reserved-types-to-be-overwritten-i.patch b/0008-x86-MCE-AMD-Allow-Reserved-types-to-be-overwritten-i.patch
new file mode 100644
index 00000000000..67d5d92c709
--- /dev/null
+++ b/0008-x86-MCE-AMD-Allow-Reserved-types-to-be-overwritten-i.patch
@@ -0,0 +1,96 @@
+From 14e0c3a2f956421e0731a1b5e474b3428c8bda24 Mon Sep 17 00:00:00 2001
+From: Yazen Ghannam <yazen.ghannam@amd.com>
+Date: Thu, 21 Nov 2019 08:15:08 -0600
+Subject: [PATCH 08/20] x86/MCE/AMD: Allow Reserved types to be overwritten in
+ smca_banks[]
+
+Each logical CPU in Scalable MCA systems controls a unique set of MCA
+banks in the system. These banks are not shared between CPUs. The bank
+types and ordering will be the same across CPUs on currently available
+systems.
+
+However, some CPUs may see a bank as Reserved/Read-as-Zero (RAZ) while
+other CPUs do not. In this case, the bank seen as Reserved on one CPU is
+assumed to be the same type as the bank seen as a known type on another
+CPU.
+
+In general, this occurs when the hardware represented by the MCA bank
+is disabled, e.g. disabled memory controllers on certain models, etc.
+The MCA bank is disabled in the hardware, so there is no possibility of
+getting an MCA/MCE from it even if it is assumed to have a known type.
+
+For example:
+
+Full system:
+ Bank | Type seen on CPU0 | Type seen on CPU1
+ ------------------------------------------------
+ 0 | LS | LS
+ 1 | UMC | UMC
+ 2 | CS | CS
+
+System with hardware disabled:
+ Bank | Type seen on CPU0 | Type seen on CPU1
+ ------------------------------------------------
+ 0 | LS | LS
+ 1 | UMC | RAZ
+ 2 | CS | CS
+
+For this reason, there is a single, global struct smca_banks[] that is
+initialized at boot time. This array is initialized on each CPU as it
+comes online. However, the array will not be updated if an entry already
+exists.
+
+This works as expected when the first CPU (usually CPU0) has all
+possible MCA banks enabled. But if the first CPU has a subset, then it
+will save a "Reserved" type in smca_banks[]. Successive CPUs will then
+not be able to update smca_banks[] even if they encounter a known bank
+type.
+
+This may result in unexpected behavior. Depending on the system
+configuration, a user may observe issues enumerating the MCA
+thresholding sysfs interface. The issues may be as trivial as sysfs
+entries not being available, or as severe as system hangs.
+
+For example:
+
+ Bank | Type seen on CPU0 | Type seen on CPU1
+ ------------------------------------------------
+ 0 | LS | LS
+ 1 | RAZ | UMC
+ 2 | CS | CS
+
+Extend the smca_banks[] entry check to return if the entry is a
+non-reserved type. Otherwise, continue so that CPUs that encounter a
+known bank type can update smca_banks[].
+
+Fixes: 68627a697c19 ("x86/mce/AMD, EDAC/mce_amd: Enumerate Reserved SMCA bank type")
+Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
+Signed-off-by: Borislav Petkov <bp@suse.de>
+Cc: "H. Peter Anvin" <hpa@zytor.com>
+Cc: Ingo Molnar <mingo@kernel.org>
+Cc: linux-edac <linux-edac@vger.kernel.org>
+Cc: <stable@vger.kernel.org>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: Tony Luck <tony.luck@intel.com>
+Cc: x86-ml <x86@kernel.org>
+Link: https://lkml.kernel.org/r/20191121141508.141273-1-Yazen.Ghannam@amd.com
+---
+ arch/x86/kernel/cpu/mce/amd.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
+index c7ab0d38af79..259f3f4e2e5f 100644
+--- a/arch/x86/kernel/cpu/mce/amd.c
++++ b/arch/x86/kernel/cpu/mce/amd.c
+@@ -266,7 +266,7 @@ static void smca_configure(unsigned int bank, unsigned int cpu)
+ smca_set_misc_banks_map(bank, cpu);
+
+ /* Return early if this bank was already initialized. */
+- if (smca_banks[bank].hwid)
++ if (smca_banks[bank].hwid && smca_banks[bank].hwid->hwid_mcatype != 0)
+ return;
+
+ if (rdmsr_safe(MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) {
+--
+2.24.1
+
diff --git a/0009-x86-mce-Fix-possibly-incorrect-severity-calculation-.patch b/0009-x86-mce-Fix-possibly-incorrect-severity-calculation-.patch
new file mode 100644
index 00000000000..fb753c4443e
--- /dev/null
+++ b/0009-x86-mce-Fix-possibly-incorrect-severity-calculation-.patch
@@ -0,0 +1,47 @@
+From 583bb4015fc2279dc8e482dacb9ba30bcb738be1 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Jan=20H=2E=20Sch=C3=B6nherr?= <jschoenh@amazon.de>
+Date: Tue, 10 Dec 2019 01:07:30 +0100
+Subject: [PATCH 09/20] x86/mce: Fix possibly incorrect severity calculation on
+ AMD
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The function mce_severity_amd_smca() requires m->bank to be initialized
+for correct operation. Fix the one case, where mce_severity() is called
+without doing so.
+
+Fixes: 6bda529ec42e ("x86/mce: Grade uncorrected errors for SMCA-enabled systems")
+Fixes: d28af26faa0b ("x86/MCE: Initialize mce.bank in the case of a fatal error in mce_no_way_out()")
+Signed-off-by: Jan H. Schönherr <jschoenh@amazon.de>
+Signed-off-by: Borislav Petkov <bp@suse.de>
+Reviewed-by: Tony Luck <tony.luck@intel.com>
+Cc: "H. Peter Anvin" <hpa@zytor.com>
+Cc: Ingo Molnar <mingo@kernel.org>
+Cc: linux-edac <linux-edac@vger.kernel.org>
+Cc: <stable@vger.kernel.org>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: x86-ml <x86@kernel.org>
+Cc: Yazen Ghannam <Yazen.Ghannam@amd.com>
+Link: https://lkml.kernel.org/r/20191210000733.17979-4-jschoenh@amazon.de
+---
+ arch/x86/kernel/cpu/mce/core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
+index 743370ee4983..aecb15ba66cd 100644
+--- a/arch/x86/kernel/cpu/mce/core.c
++++ b/arch/x86/kernel/cpu/mce/core.c
+@@ -814,8 +814,8 @@ static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp,
+ if (quirk_no_way_out)
+ quirk_no_way_out(i, m, regs);
+
++ m->bank = i;
+ if (mce_severity(m, mca_cfg.tolerant, &tmp, true) >= MCE_PANIC_SEVERITY) {
+- m->bank = i;
+ mce_read_aux(m, i);
+ *msg = tmp;
+ return 1;
+--
+2.24.1
+
diff --git a/0010-Revert-iwlwifi-assign-directly-to-iwl_trans-cfg-in-Q.patch b/0010-Revert-iwlwifi-assign-directly-to-iwl_trans-cfg-in-Q.patch
new file mode 100644
index 00000000000..e644463b01e
--- /dev/null
+++ b/0010-Revert-iwlwifi-assign-directly-to-iwl_trans-cfg-in-Q.patch
@@ -0,0 +1,61 @@
+From 5cedf4aa8f59ed7c8fa1cf129731fbe86205cbea Mon Sep 17 00:00:00 2001
+From: Anders Kaseorg <andersk@mit.edu>
+Date: Mon, 2 Dec 2019 17:09:20 -0500
+Subject: [PATCH 10/20] Revert "iwlwifi: assign directly to iwl_trans->cfg in
+ QuZ detection"
+
+This reverts commit 968dcfb4905245dc64d65312c0d17692fa087b99.
+
+Both that commit and commit 809805a820c6445f7a701ded24fdc6bbc841d1e4
+attempted to fix the same bug (dead assignments to the local variable
+cfg), but they did so in incompatible ways. When they were both merged,
+independently of each other, the combination actually caused the bug to
+reappear, leading to a firmware crash on boot for some cards.
+
+https://bugzilla.kernel.org/show_bug.cgi?id=205719
+
+Signed-off-by: Anders Kaseorg <andersk@mit.edu>
+Acked-by: Luca Coelho <luciano.coelho@intel.com>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+---
+ drivers/net/wireless/intel/iwlwifi/pcie/drv.c | 24 +++++++++----------
+ 1 file changed, 12 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c
+index 040cec17d3ad..b0b7eca1754e 100644
+--- a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c
++++ b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c
+@@ -1111,18 +1111,18 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+
+ /* same thing for QuZ... */
+ if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QUZ) {
+- if (iwl_trans->cfg == &iwl_ax101_cfg_qu_hr)
+- iwl_trans->cfg = &iwl_ax101_cfg_quz_hr;
+- else if (iwl_trans->cfg == &iwl_ax201_cfg_qu_hr)
+- iwl_trans->cfg = &iwl_ax201_cfg_quz_hr;
+- else if (iwl_trans->cfg == &iwl9461_2ac_cfg_qu_b0_jf_b0)
+- iwl_trans->cfg = &iwl9461_2ac_cfg_quz_a0_jf_b0_soc;
+- else if (iwl_trans->cfg == &iwl9462_2ac_cfg_qu_b0_jf_b0)
+- iwl_trans->cfg = &iwl9462_2ac_cfg_quz_a0_jf_b0_soc;
+- else if (iwl_trans->cfg == &iwl9560_2ac_cfg_qu_b0_jf_b0)
+- iwl_trans->cfg = &iwl9560_2ac_cfg_quz_a0_jf_b0_soc;
+- else if (iwl_trans->cfg == &iwl9560_2ac_160_cfg_qu_b0_jf_b0)
+- iwl_trans->cfg = &iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc;
++ if (cfg == &iwl_ax101_cfg_qu_hr)
++ cfg = &iwl_ax101_cfg_quz_hr;
++ else if (cfg == &iwl_ax201_cfg_qu_hr)
++ cfg = &iwl_ax201_cfg_quz_hr;
++ else if (cfg == &iwl9461_2ac_cfg_qu_b0_jf_b0)
++ cfg = &iwl9461_2ac_cfg_quz_a0_jf_b0_soc;
++ else if (cfg == &iwl9462_2ac_cfg_qu_b0_jf_b0)
++ cfg = &iwl9462_2ac_cfg_quz_a0_jf_b0_soc;
++ else if (cfg == &iwl9560_2ac_cfg_qu_b0_jf_b0)
++ cfg = &iwl9560_2ac_cfg_quz_a0_jf_b0_soc;
++ else if (cfg == &iwl9560_2ac_160_cfg_qu_b0_jf_b0)
++ cfg = &iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc;
+ }
+
+ #endif
+--
+2.24.1
+
diff --git a/0011-iwlwifi-pcie-move-power-gating-workaround-earlier-in.patch b/0011-iwlwifi-pcie-move-power-gating-workaround-earlier-in.patch
new file mode 100644
index 00000000000..04a7ea6e2dd
--- /dev/null
+++ b/0011-iwlwifi-pcie-move-power-gating-workaround-earlier-in.patch
@@ -0,0 +1,120 @@
+From 9894b27702c2e6090213f84db3e3d47f191253cd Mon Sep 17 00:00:00 2001
+From: Luca Coelho <luciano.coelho@intel.com>
+Date: Thu, 5 Dec 2019 09:03:54 +0200
+Subject: [PATCH 11/20] iwlwifi: pcie: move power gating workaround earlier in
+ the flow
+
+We need to reset the NIC after setting the bits to enable power
+gating and that cannot be done too late in the flow otherwise it
+cleans other registers and things that were already configured,
+causing initialization to fail.
+
+In order to fix this, move the function to the common code in trans.c
+so it can be called directly from there at an earlier point, just
+after the reset we already do during initialization.
+
+Fixes: 9a47cb988338 ("iwlwifi: pcie: add workaround for power gating in integrated 22000")
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=205719
+Cc: stable@ver.kernel.org # 5.4+
+Reported-by: Anders Kaseorg <andersk@mit.edu>
+Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+---
+ .../wireless/intel/iwlwifi/pcie/trans-gen2.c | 25 ----------------
+ .../net/wireless/intel/iwlwifi/pcie/trans.c | 30 +++++++++++++++++++
+ 2 files changed, 30 insertions(+), 25 deletions(-)
+
+diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c b/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c
+index ca3bb4d65b00..df8455f14e4d 100644
+--- a/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c
++++ b/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c
+@@ -57,24 +57,6 @@
+ #include "internal.h"
+ #include "fw/dbg.h"
+
+-static int iwl_pcie_gen2_force_power_gating(struct iwl_trans *trans)
+-{
+- iwl_set_bits_prph(trans, HPM_HIPM_GEN_CFG,
+- HPM_HIPM_GEN_CFG_CR_FORCE_ACTIVE);
+- udelay(20);
+- iwl_set_bits_prph(trans, HPM_HIPM_GEN_CFG,
+- HPM_HIPM_GEN_CFG_CR_PG_EN |
+- HPM_HIPM_GEN_CFG_CR_SLP_EN);
+- udelay(20);
+- iwl_clear_bits_prph(trans, HPM_HIPM_GEN_CFG,
+- HPM_HIPM_GEN_CFG_CR_FORCE_ACTIVE);
+-
+- iwl_trans_sw_reset(trans);
+- iwl_clear_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
+-
+- return 0;
+-}
+-
+ /*
+ * Start up NIC's basic functionality after it has been reset
+ * (e.g. after platform boot, or shutdown via iwl_pcie_apm_stop())
+@@ -110,13 +92,6 @@ int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
+
+ iwl_pcie_apm_config(trans);
+
+- if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000 &&
+- trans->cfg->integrated) {
+- ret = iwl_pcie_gen2_force_power_gating(trans);
+- if (ret)
+- return ret;
+- }
+-
+ ret = iwl_finish_nic_init(trans, trans->trans_cfg);
+ if (ret)
+ return ret;
+diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/trans.c b/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
+index 6961f00ff812..d3db38c3095b 100644
+--- a/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
++++ b/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
+@@ -1783,6 +1783,29 @@ static int iwl_trans_pcie_clear_persistence_bit(struct iwl_trans *trans)
+ return 0;
+ }
+
++static int iwl_pcie_gen2_force_power_gating(struct iwl_trans *trans)
++{
++ int ret;
++
++ ret = iwl_finish_nic_init(trans, trans->trans_cfg);
++ if (ret < 0)
++ return ret;
++
++ iwl_set_bits_prph(trans, HPM_HIPM_GEN_CFG,
++ HPM_HIPM_GEN_CFG_CR_FORCE_ACTIVE);
++ udelay(20);
++ iwl_set_bits_prph(trans, HPM_HIPM_GEN_CFG,
++ HPM_HIPM_GEN_CFG_CR_PG_EN |
++ HPM_HIPM_GEN_CFG_CR_SLP_EN);
++ udelay(20);
++ iwl_clear_bits_prph(trans, HPM_HIPM_GEN_CFG,
++ HPM_HIPM_GEN_CFG_CR_FORCE_ACTIVE);
++
++ iwl_trans_pcie_sw_reset(trans);
++
++ return 0;
++}
++
+ static int _iwl_trans_pcie_start_hw(struct iwl_trans *trans)
+ {
+ struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
+@@ -1802,6 +1825,13 @@ static int _iwl_trans_pcie_start_hw(struct iwl_trans *trans)
+
+ iwl_trans_pcie_sw_reset(trans);
+
++ if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000 &&
++ trans->cfg->integrated) {
++ err = iwl_pcie_gen2_force_power_gating(trans);
++ if (err)
++ return err;
++ }
++
+ err = iwl_pcie_apm_init(trans);
+ if (err)
+ return err;
+--
+2.24.1
+
diff --git a/0012-x86-intel-Disable-HPET-on-Intel-Coffee-Lake-H-platfo.patch b/0012-x86-intel-Disable-HPET-on-Intel-Coffee-Lake-H-platfo.patch
new file mode 100644
index 00000000000..ca7fa04fb7f
--- /dev/null
+++ b/0012-x86-intel-Disable-HPET-on-Intel-Coffee-Lake-H-platfo.patch
@@ -0,0 +1,41 @@
+From d112ebe17985ec073ae6edd0d46fa7a18fbe50cd Mon Sep 17 00:00:00 2001
+From: Kai-Heng Feng <kai.heng.feng@canonical.com>
+Date: Fri, 29 Nov 2019 14:23:02 +0800
+Subject: [PATCH 12/20] x86/intel: Disable HPET on Intel Coffee Lake H
+ platforms
+
+Coffee Lake H SoC has similar behavior as Coffee Lake, skewed HPET timer
+once the SoCs entered PC10.
+
+So let's disable HPET on CFL-H platforms.
+
+Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
+Cc: Linus Torvalds <torvalds@linux-foundation.org>
+Cc: Peter Zijlstra <peterz@infradead.org>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: bp@alien8.de
+Cc: feng.tang@intel.com
+Cc: harry.pan@intel.com
+Cc: hpa@zytor.com
+Link: https://lkml.kernel.org/r/20191129062303.18982-1-kai.heng.feng@canonical.com
+Signed-off-by: Ingo Molnar <mingo@kernel.org>
+---
+ arch/x86/kernel/early-quirks.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
+index 4cba91ec8049..606711f5ebf8 100644
+--- a/arch/x86/kernel/early-quirks.c
++++ b/arch/x86/kernel/early-quirks.c
+@@ -710,6 +710,8 @@ static struct chipset early_qrk[] __initdata = {
+ */
+ { PCI_VENDOR_ID_INTEL, 0x0f00,
+ PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
++ { PCI_VENDOR_ID_INTEL, 0x3e20,
++ PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
+ { PCI_VENDOR_ID_INTEL, 0x3ec4,
+ PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
+ { PCI_VENDOR_ID_BROADCOM, 0x4331,
+--
+2.24.1
+
diff --git a/0013-x86-intel-Disable-HPET-on-Intel-Ice-Lake-platforms.patch b/0013-x86-intel-Disable-HPET-on-Intel-Ice-Lake-platforms.patch
new file mode 100644
index 00000000000..83fd9a45cbf
--- /dev/null
+++ b/0013-x86-intel-Disable-HPET-on-Intel-Ice-Lake-platforms.patch
@@ -0,0 +1,38 @@
+From de022ec5134c060ee735424ed3d0f9a663b73c53 Mon Sep 17 00:00:00 2001
+From: Kai-Heng Feng <kai.heng.feng@canonical.com>
+Date: Fri, 29 Nov 2019 14:23:03 +0800
+Subject: [PATCH 13/20] x86/intel: Disable HPET on Intel Ice Lake platforms
+
+Like CFL and CFL-H, ICL SoC has skewed HPET timer once it hits PC10.
+So let's disable HPET on ICL.
+
+Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
+Cc: Linus Torvalds <torvalds@linux-foundation.org>
+Cc: Peter Zijlstra <peterz@infradead.org>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: bp@alien8.de
+Cc: feng.tang@intel.com
+Cc: harry.pan@intel.com
+Cc: hpa@zytor.com
+Link: https://lkml.kernel.org/r/20191129062303.18982-2-kai.heng.feng@canonical.com
+Signed-off-by: Ingo Molnar <mingo@kernel.org>
+---
+ arch/x86/kernel/early-quirks.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
+index 606711f5ebf8..2f9ec14be3b1 100644
+--- a/arch/x86/kernel/early-quirks.c
++++ b/arch/x86/kernel/early-quirks.c
+@@ -714,6 +714,8 @@ static struct chipset early_qrk[] __initdata = {
+ PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
+ { PCI_VENDOR_ID_INTEL, 0x3ec4,
+ PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
++ { PCI_VENDOR_ID_INTEL, 0x8a12,
++ PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
+ { PCI_VENDOR_ID_BROADCOM, 0x4331,
+ PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset},
+ {}
+--
+2.24.1
+
diff --git a/0014-drm-i915-save-AUD_FREQ_CNTRL-state-at-audio-domain-s.patch b/0014-drm-i915-save-AUD_FREQ_CNTRL-state-at-audio-domain-s.patch
new file mode 100644
index 00000000000..a4956cd71d3
--- /dev/null
+++ b/0014-drm-i915-save-AUD_FREQ_CNTRL-state-at-audio-domain-s.patch
@@ -0,0 +1,87 @@
+From c0da4d4ee458208d5427d0a284173bd39a95d040 Mon Sep 17 00:00:00 2001
+From: Kai Vehmanen <kai.vehmanen@linux.intel.com>
+Date: Fri, 20 Sep 2019 11:39:18 +0300
+Subject: [PATCH 14/20] drm/i915: save AUD_FREQ_CNTRL state at audio domain
+ suspend
+
+When audio power domain is suspended, the display driver must
+save state of AUD_FREQ_CNTRL on Tiger Lake and Ice Lake
+systems. The initial value of the register is set by BIOS and
+is read by driver during the audio component init sequence.
+
+Cc: Jani Nikula <jani.nikula@intel.com>
+Cc: Imre Deak <imre.deak@intel.com>
+Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190920083918.27057-1-kai.vehmanen@linux.intel.com
+---
+ drivers/gpu/drm/i915/display/intel_audio.c | 17 +++++++++++++++--
+ drivers/gpu/drm/i915/i915_drv.h | 1 +
+ drivers/gpu/drm/i915/i915_reg.h | 2 ++
+ 3 files changed, 18 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
+index ddcccf4408c3..439bc0a93410 100644
+--- a/drivers/gpu/drm/i915/display/intel_audio.c
++++ b/drivers/gpu/drm/i915/display/intel_audio.c
+@@ -850,10 +850,17 @@ static unsigned long i915_audio_component_get_power(struct device *kdev)
+
+ ret = intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO);
+
+- /* Force CDCLK to 2*BCLK as long as we need audio to be powered. */
+- if (dev_priv->audio_power_refcount++ == 0)
++ if (dev_priv->audio_power_refcount++ == 0) {
++ if (IS_TIGERLAKE(dev_priv) || IS_ICELAKE(dev_priv)) {
++ I915_WRITE(AUD_FREQ_CNTRL, dev_priv->audio_freq_cntrl);
++ DRM_DEBUG_KMS("restored AUD_FREQ_CNTRL to 0x%x\n",
++ dev_priv->audio_freq_cntrl);
++ }
++
++ /* Force CDCLK to 2*BCLK as long as we need audio powered. */
+ if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
+ glk_force_audio_cdclk(dev_priv, true);
++ }
+
+ return ret;
+ }
+@@ -1114,6 +1121,12 @@ static void i915_audio_component_init(struct drm_i915_private *dev_priv)
+ return;
+ }
+
++ if (IS_TIGERLAKE(dev_priv) || IS_ICELAKE(dev_priv)) {
++ dev_priv->audio_freq_cntrl = I915_READ(AUD_FREQ_CNTRL);
++ DRM_DEBUG_KMS("init value of AUD_FREQ_CNTRL of 0x%x\n",
++ dev_priv->audio_freq_cntrl);
++ }
++
+ dev_priv->audio_component_registered = true;
+ }
+
+diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
+index 89b6112bd66b..043ce1b47aeb 100644
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -1530,6 +1530,7 @@ struct drm_i915_private {
+ */
+ struct mutex av_mutex;
+ int audio_power_refcount;
++ u32 audio_freq_cntrl;
+
+ struct {
+ struct mutex mutex;
+diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
+index f8ee9aba3955..e1fe356463ec 100644
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -9104,6 +9104,8 @@ enum {
+ #define HSW_AUD_CHICKENBIT _MMIO(0x65f10)
+ #define SKL_AUD_CODEC_WAKE_SIGNAL (1 << 15)
+
++#define AUD_FREQ_CNTRL _MMIO(0x65900)
++
+ /*
+ * HSW - ICL power wells
+ *
+--
+2.24.1
+
diff --git a/0015-drm-i915-Fix-audio-power-up-sequence-for-gen10-displ.patch b/0015-drm-i915-Fix-audio-power-up-sequence-for-gen10-displ.patch
new file mode 100644
index 00000000000..f4cacb1da68
--- /dev/null
+++ b/0015-drm-i915-Fix-audio-power-up-sequence-for-gen10-displ.patch
@@ -0,0 +1,57 @@
+From 6e149a5538676e885561f1dfc18bbb4dd104c1f6 Mon Sep 17 00:00:00 2001
+From: Kai Vehmanen <kai.vehmanen@linux.intel.com>
+Date: Thu, 3 Oct 2019 11:55:30 +0300
+Subject: [PATCH 15/20] drm/i915: Fix audio power up sequence for gen10+
+ display
+
+On platfroms with gen10+ display, driver must set the enable bit of
+AUDIO_PIN_BUF_CTL register before transactions with the HDA controller
+can proceed. Add setting this bit to the audio power up sequence.
+
+Failing to do this resulted in errors during display audio codec probe,
+and failures during resume from suspend.
+
+Note: We may also need to disable the bit afterwards, but there are
+still unresolved issues with that.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111214
+Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20191003085531.30990-1-kai.vehmanen@linux.intel.com
+---
+ drivers/gpu/drm/i915/display/intel_audio.c | 5 +++++
+ drivers/gpu/drm/i915/i915_reg.h | 2 ++
+ 2 files changed, 7 insertions(+)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
+index 439bc0a93410..440b33762fef 100644
+--- a/drivers/gpu/drm/i915/display/intel_audio.c
++++ b/drivers/gpu/drm/i915/display/intel_audio.c
+@@ -860,6 +860,11 @@ static unsigned long i915_audio_component_get_power(struct device *kdev)
+ /* Force CDCLK to 2*BCLK as long as we need audio powered. */
+ if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
+ glk_force_audio_cdclk(dev_priv, true);
++
++ if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
++ I915_WRITE(AUD_PIN_BUF_CTL,
++ (I915_READ(AUD_PIN_BUF_CTL) |
++ AUD_PIN_BUF_ENABLE));
+ }
+
+ return ret;
+diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
+index e1fe356463ec..ccfea9c2b8bf 100644
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -9105,6 +9105,8 @@ enum {
+ #define SKL_AUD_CODEC_WAKE_SIGNAL (1 << 15)
+
+ #define AUD_FREQ_CNTRL _MMIO(0x65900)
++#define AUD_PIN_BUF_CTL _MMIO(0x48414)
++#define AUD_PIN_BUF_ENABLE REG_BIT(31)
+
+ /*
+ * HSW - ICL power wells
+--
+2.24.1
+
diff --git a/0016-drm-i915-extend-audio-CDCLK-2-BCLK-constraint-to-mor.patch b/0016-drm-i915-extend-audio-CDCLK-2-BCLK-constraint-to-mor.patch
new file mode 100644
index 00000000000..7542373b742
--- /dev/null
+++ b/0016-drm-i915-extend-audio-CDCLK-2-BCLK-constraint-to-mor.patch
@@ -0,0 +1,41 @@
+From 975d5a884b3c80155808c2ac39e6bb6d51450dea Mon Sep 17 00:00:00 2001
+From: Kai Vehmanen <kai.vehmanen@linux.intel.com>
+Date: Thu, 3 Oct 2019 11:55:31 +0300
+Subject: [PATCH 16/20] drm/i915: extend audio CDCLK>=2*BCLK constraint to more
+ platforms
+
+The CDCLK>=2*BCLK constraint applies to all generations since gen10.
+Extend the constraint logic in audio get/put_power().
+
+Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20191003085531.30990-2-kai.vehmanen@linux.intel.com
+---
+ drivers/gpu/drm/i915/display/intel_audio.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
+index 440b33762fef..05ef43b13d1c 100644
+--- a/drivers/gpu/drm/i915/display/intel_audio.c
++++ b/drivers/gpu/drm/i915/display/intel_audio.c
+@@ -858,7 +858,7 @@ static unsigned long i915_audio_component_get_power(struct device *kdev)
+ }
+
+ /* Force CDCLK to 2*BCLK as long as we need audio powered. */
+- if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
++ if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+ glk_force_audio_cdclk(dev_priv, true);
+
+ if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+@@ -877,7 +877,7 @@ static void i915_audio_component_put_power(struct device *kdev,
+
+ /* Stop forcing CDCLK to 2*BCLK if no need for audio to be powered. */
+ if (--dev_priv->audio_power_refcount == 0)
+- if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
++ if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+ glk_force_audio_cdclk(dev_priv, false);
+
+ intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO, cookie);
+--
+2.24.1
+
diff --git a/0017-ASoC-SOF-enable-sync_write-in-hdac_bus.patch b/0017-ASoC-SOF-enable-sync_write-in-hdac_bus.patch
new file mode 100644
index 00000000000..828883f136b
--- /dev/null
+++ b/0017-ASoC-SOF-enable-sync_write-in-hdac_bus.patch
@@ -0,0 +1,39 @@
+From 7699523eeae2b47440faa96cbed32c5e23db0e75 Mon Sep 17 00:00:00 2001
+From: Kai Vehmanen <kai.vehmanen@linux.intel.com>
+Date: Tue, 8 Oct 2019 11:44:35 -0500
+Subject: [PATCH 17/20] ASoC: SOF: enable sync_write in hdac_bus
+
+Align SOF HDA implementation with snd-hda-intel driver and enable
+sync_write flag for all supported Intel platforms in SOF. When set,
+a sync is issued after each verb write.
+
+Sync after write has helped to overcome intermittent delays in
+system resume flow on Intel Coffee Lake systems, and most recently
+probe errors related to the HDMI codec on Ice Lake systems.
+
+Matches the snd-hda-intel driver change done in commit 2756d9143aa5
+("ALSA: hda - Fix intermittent CORB/RIRB stall on Intel chips").
+
+Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
+Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
+Link: https://lore.kernel.org/r/20191008164443.1358-2-pierre-louis.bossart@linux.intel.com
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ sound/soc/sof/intel/hda.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c
+index 06e84679087b..5a5163eef2ef 100644
+--- a/sound/soc/sof/intel/hda.c
++++ b/sound/soc/sof/intel/hda.c
+@@ -268,6 +268,7 @@ static int hda_init(struct snd_sof_dev *sdev)
+
+ bus->use_posbuf = 1;
+ bus->bdl_pos_adj = 0;
++ bus->sync_write = 1;
+
+ mutex_init(&hbus->prepare_mutex);
+ hbus->pci = pci;
+--
+2.24.1
+
diff --git a/0018-xhci-pci-Allow-host-runtime-PM-as-default-also-for-I.patch b/0018-xhci-pci-Allow-host-runtime-PM-as-default-also-for-I.patch
new file mode 100644
index 00000000000..9fe021788f9
--- /dev/null
+++ b/0018-xhci-pci-Allow-host-runtime-PM-as-default-also-for-I.patch
@@ -0,0 +1,48 @@
+From 74641e1ede93144485509cb7c2c682602107ec6b Mon Sep 17 00:00:00 2001
+From: Mika Westerberg <mika.westerberg@linux.intel.com>
+Date: Fri, 15 Nov 2019 18:50:03 +0200
+Subject: [PATCH 18/20] xhci-pci: Allow host runtime PM as default also for
+ Intel Ice Lake xHCI
+
+Intel Ice Lake has two xHCI controllers one on PCH and the other as part
+of the CPU itself. The latter is also part of the so called Type C
+Subsystem (TCSS) sharing ACPI power resources with the PCIe root ports
+and the Thunderbolt controllers. In order to put the whole TCSS block
+into D3cold the xHCI needs to be runtime suspended as well when idle.
+
+For this reason allow runtime PM as default for Ice Lake TCSS xHCI
+controller.
+
+Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Link: https://lore.kernel.org/r/1573836603-10871-5-git-send-email-mathias.nyman@linux.intel.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/host/xhci-pci.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
+index 1904ef56f61c..2907fe4d78dd 100644
+--- a/drivers/usb/host/xhci-pci.c
++++ b/drivers/usb/host/xhci-pci.c
+@@ -48,6 +48,7 @@
+ #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI 0x15e9
+ #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI 0x15ec
+ #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI 0x15f0
++#define PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI 0x8a13
+
+ #define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9
+ #define PCI_DEVICE_ID_AMD_PROMONTORYA_3 0x43ba
+@@ -212,7 +213,8 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
+ pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_XHCI ||
+ pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI ||
+ pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI ||
+- pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI))
++ pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI ||
++ pdev->device == PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI))
+ xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
+
+ if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
+--
+2.24.1
+
diff --git a/0019-iwlwifi-pcie-restore-support-for-Killer-Qu-C0-NICs.patch b/0019-iwlwifi-pcie-restore-support-for-Killer-Qu-C0-NICs.patch
new file mode 100644
index 00000000000..9d15e69e305
--- /dev/null
+++ b/0019-iwlwifi-pcie-restore-support-for-Killer-Qu-C0-NICs.patch
@@ -0,0 +1,36 @@
+From fd1d146698d09aaac6709ae4fde90d80dbd153cd Mon Sep 17 00:00:00 2001
+From: "Jan Alexander Steffens (heftig)" <jan.steffens@gmail.com>
+Date: Tue, 24 Dec 2019 05:18:47 +0100
+Subject: [PATCH 19/20] iwlwifi: pcie: restore support for Killer Qu C0 NICs
+
+Commit 809805a820c6 refactored the cfg mangling. Unfortunately, in this
+process the lines which picked the right cfg for Killer Qu C0 NICs after
+C0 detection were lost. These lines were added by commit b9500577d361.
+
+I suspect this is more of the "merge damage" which commit 7cded5658329
+talks about.
+
+Fixes: 809805a820c6 ("iwlwifi: pcie: move some cfg mangling from trans_pcie_alloc to probe")
+Signed-off-by: Jan Alexander Steffens (heftig) <jan.steffens@gmail.com>
+---
+ drivers/net/wireless/intel/iwlwifi/pcie/drv.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c
+index b0b7eca1754e..de62a6dc4e73 100644
+--- a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c
++++ b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c
+@@ -1107,6 +1107,10 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+ cfg = &iwl9560_2ac_cfg_qu_c0_jf_b0;
+ else if (cfg == &iwl9560_2ac_160_cfg_qu_b0_jf_b0)
+ cfg = &iwl9560_2ac_160_cfg_qu_c0_jf_b0;
++ else if (cfg == &killer1650s_2ax_cfg_qu_b0_hr_b0)
++ cfg = &killer1650s_2ax_cfg_qu_c0_hr_b0;
++ else if (cfg == &killer1650i_2ax_cfg_qu_b0_hr_b0)
++ cfg = &killer1650i_2ax_cfg_qu_c0_hr_b0;
+ }
+
+ /* same thing for QuZ... */
+--
+2.24.1
+
diff --git a/PKGBUILD b/PKGBUILD
index caa71a22bc5..82655b36e9a 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -63,7 +63,7 @@ _localmodcfg=
pkgbase=linux-ck
_srcver=5.4.6-arch1
pkgver=${_srcver%-*}
-pkgrel=1
+pkgrel=2
_ckpatchversion=1
arch=(x86_64)
url="https://wiki.archlinux.org/index.php/Linux-ck"
@@ -83,6 +83,19 @@ source=(
0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch
0005-PCI-pciehp-Prevent-deadlock-on-disconnect.patch
0006-ACPI-PM-s2idle-Rework-ACPI-events-synchronization.patch
+ 0007-x86-MCE-AMD-Do-not-use-rdmsr_safe_on_cpu-in-smca_con.patch
+ 0008-x86-MCE-AMD-Allow-Reserved-types-to-be-overwritten-i.patch
+ 0009-x86-mce-Fix-possibly-incorrect-severity-calculation-.patch
+ 0010-Revert-iwlwifi-assign-directly-to-iwl_trans-cfg-in-Q.patch
+ 0011-iwlwifi-pcie-move-power-gating-workaround-earlier-in.patch
+ 0012-x86-intel-Disable-HPET-on-Intel-Coffee-Lake-H-platfo.patch
+ 0013-x86-intel-Disable-HPET-on-Intel-Ice-Lake-platforms.patch
+ 0014-drm-i915-save-AUD_FREQ_CNTRL-state-at-audio-domain-s.patch
+ 0015-drm-i915-Fix-audio-power-up-sequence-for-gen10-displ.patch
+ 0016-drm-i915-extend-audio-CDCLK-2-BCLK-constraint-to-mor.patch
+ 0017-ASoC-SOF-enable-sync_write-in-hdac_bus.patch
+ 0018-xhci-pci-Allow-host-runtime-PM-as-default-also-for-I.patch
+ 0019-iwlwifi-pcie-restore-support-for-Killer-Qu-C0-NICs.patch
)
validpgpkeys=(
'ABAF11C65A2970B130ABE3C479BE3E4300411886' # Linus Torvalds
@@ -93,12 +106,25 @@ sha256sums=('fda561bcdea397ddd59656319c53871002938b19b554f30efed90affa30989c8'
'5d58a2115892839997ae7dcca226697c34b656de7685cb3eb8696451dc5100a0'
'8c11086809864b5cef7d079f930bd40da8d0869c091965fa62e95de9a0fe13b5'
'f445eea4d0ec2015a25f1ad625c848f4f2252099795966fa4105e0aa29674c5c'
- '71908105e1606cee9e62c99ac89aca98e8a26ff3f9796c8ab36858632614e85a'
- '6765399f9d0de2daf7121f96a09eafc646731eb2058a01420d882297e10dfae5'
- 'f922696f10cfbe7e5b0a95fb3d9333006d63a1c4dbfc280ae3b5d10c8c7208fb'
- '8496a9be2c3b2e3cefa292d00d3f43a4e7c3b03c4508f9d38a6b21fa4684240d'
- 'e5a3ed9c900b7e69cec1090ff76171a1c00cf723a2fa9a07fdf95c194ef3738b'
- '760b60334eff05b1ef20c800fdb1e2ff6c7f9264f5e5c396f644720a824a92d7')
+ 'c404647c64cb7b2ab6aae5333cffe072725fe1a3e3f863646656591af7b55078'
+ 'fe6d125c1101b8ec6e01783598b7a9a34130447b28239d47ee6cafd76f9806ae'
+ 'e021b7d4cfb26e851b5b55250fd4e635b66237a8863c962ede4f51022f9927cc'
+ '5ccbf49c1f588f344b120750d63bf42be5b8cda4946ebe256d5d69df3fce96ac'
+ '514088ce473a7160e1a906aaf44adac4389de48ba8bfaffb28ef2efaff5b2a41'
+ '5fcddf32bc5017afcf20c52430febf08c4f4de2a13aa838298eb8ff982fbda77'
+ '2ffc236ad41c40ec5d622ff2c8d6ae3a22e545dbeb3a0cc0f63a70d2438bb507'
+ '90bb284a19e9dd8aab105a80632170e58d818200965f51cb98ee4849d9cd2594'
+ 'd573611616cb24b6c240c57321b3de6c2e51c49a3f8df52ef63009aeea5eb60e'
+ '04c6d2408452b907b12a6ee149cc023998545199cd3e9793b555682ad99aae35'
+ 'c974abd5df781b303a6cfaa1685a5b1556b4104441804d14963e8a2893fcc548'
+ '6556d1dfa848566774fb1014c451809fb6dfab39336b27197d1b3a23d427d1ca'
+ '6b7f016aa55b9ba7ce7425b9a2f0c8b3bd8d4a4bbf703db9701c0974dc24162c'
+ '02f8992b6b6c467f561dd9aa309fc00695276d11227a2fc6816860c896bd206d'
+ '227668904e0d363c43e756dd08aec15accc5ebbc045b9d7b2068f27801009b63'
+ '97ab714be54e5516dcd4df051c8f7b551b87a0ca85c0e6b1f50f4eb1226d95d1'
+ '09749254d63826dd3ddf6451882adc91deb1a79561593a7c399a41b623310c19'
+ 'c81691927b5c7e36f492d5d922051fb2b26dd1b24033c3a483f40045621e3960'
+ '2bde1e65dec65394c26cfe5f0ba0256d807047f7720cd3ce9367667d885fc7bd')
export KBUILD_BUILD_HOST=archlinux
export KBUILD_BUILD_USER=$pkgbase