5.7.11

3 files changed, 118 insertions, 7 deletions

diff --git a/PKGBUILD b/PKGBUILD
index ebe98e01e116..9a8c6907e741 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -2,8 +2,8 @@
 
 pkgbase=linux-zen-g14
 _pkgbase=linux-zen
-pkgver=5.7.10.zen1
-pkgrel=3
+pkgver=5.7.11.zen1
+pkgrel=1
 pkgdesc='Linux ZEN with patch for Zephyrus G14 (GA401IV)'
 _srctag=v${pkgver%.*}-${pkgver##*.}
 url="https://github.com/zen-kernel/zen-kernel/commits/$_srctag"
@@ -22,6 +22,7 @@ source=(
   i8042.patch
   asus-nb-wmi.patch
   "https://github.com/dolohow/uksm/raw/master/v5.x/uksm-5.7.patch"
+  amdgpu.patch
 )
 validpgpkeys=(
   'ABAF11C65A2970B130ABE3C479BE3E4300411886'  # Linus Torvalds
@@ -29,10 +30,11 @@ validpgpkeys=(
   'A2FF3A36AAA56654109064AB19802F8B0D70FC30'  # Jan Alexander Steffens (heftig)
 )
 sha256sums=('SKIP'
-            '4c278bafc2e5a04fd584ca45ddfe8bdacf52d8f5a2aac9df17d7a20479e893bf'
+            '819af2e06eff69f16fdf202a5ee5104d7f656d9293bb14800f32f47a0a6c7974'
             '2273fae30f712aa554dd10294a072b4934265b56e6146493a07c22c7df4af61d'
             'c1fab4cb53995dd87daa3772aca1b9b24bf4033fc6cecd319819a8e4ee59a10d'
-            'c28dc0d30bba3eedae9f5cf98a686bdfb25a0326df4e8c417d37a36597d21b37')
+            'c28dc0d30bba3eedae9f5cf98a686bdfb25a0326df4e8c417d37a36597d21b37'
+            'a1c008c481295a6c583d2defa8e66f394af26c441f330622df4a43dd2e776214')
 
 export KBUILD_BUILD_HOST=archlinux
 export KBUILD_BUILD_USER=$pkgbase
diff --git a/amdgpu.patch b/amdgpu.patch
new file mode 100644
index 000000000000..c239592c705e
--- /dev/null
+++ b/amdgpu.patch
@@ -0,0 +1,102 @@
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+@@ -1892,7 +1892,7 @@
+ 			return r;
+ 	}
+ 
+-	if (adev->asic_type == CHIP_RAVEN || adev->asic_type == CHIP_RENOIR) {
++	if (adev->flags & AMD_IS_APU) {
+ 		/* TODO: double check the cp_table_size for RV */
+ 		adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 * 1024); /* JT + GDS */
+ 		r = amdgpu_gfx_rlc_init_cpt(adev);
+@@ -2382,7 +2382,7 @@
+ 
+ 	gfx_v9_0_mec_fini(adev);
+ 	amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj);
+-	if (adev->asic_type == CHIP_RAVEN || adev->asic_type == CHIP_RENOIR) {
++	if (adev->flags & AMD_IS_APU) {
+ 		amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj,
+ 				&adev->gfx.rlc.cp_table_gpu_addr,
+ 				(void **)&adev->gfx.rlc.cp_table_ptr);
+@@ -2854,7 +2854,8 @@
+ 		/* program GRBM_REG_SAVE_GFX_IDLE_THRESHOLD to 0x55f0 */
+ 		data |= (0x55f0 << RLC_AUTO_PG_CTRL__GRBM_REG_SAVE_GFX_IDLE_THRESHOLD__SHIFT);
+ 		WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_AUTO_PG_CTRL), data);
+ 
+-		pwr_10_0_gfxip_control_over_cgpg(adev, true);
++		if (adev->asic_type != CHIP_RENOIR)
++			pwr_10_0_gfxip_control_over_cgpg(adev, true);
+ 	}
+ }
+
+--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
+@@ -415,6 +415,7 @@
+ 	*value = 0;
+ 	for (i = 0; i < ARRAY_SIZE(soc15_allowed_read_registers); i++) {
+ 		en = &soc15_allowed_read_registers[i];
+-		if (reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
++		if (adev->reg_offset[en->hwip][en->inst] &&
++			reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
+ 					+ en->reg_offset))
+ 			continue;
+@@ -670,14 +671,25 @@
+ 
+ int soc15_set_ip_blocks(struct amdgpu_device *adev)
+ {
++	int r;
++
+ 	/* Set IP register base before any HW register access */
+ 	switch (adev->asic_type) {
+ 	case CHIP_VEGA10:
+ 	case CHIP_VEGA12:
+ 	case CHIP_RAVEN:
+-	case CHIP_RENOIR:
+ 		vega10_reg_base_init(adev);
+ 		break;
++	case CHIP_RENOIR:
++		if (amdgpu_discovery) {
++			r = amdgpu_discovery_reg_base_init(adev);
++			if (r) {
++				DRM_WARN("failed to init reg base from ip discovery table, "
++					 "fallback to legacy init method\n");
++				vega10_reg_base_init(adev);
++			}
++		}
++		break;
+ 	case CHIP_VEGA20:
+ 		vega20_reg_base_init(adev);
+ 		break;
+
+--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+@@ -1763,7 +1763,7 @@
+ 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+ 	int r;
+ 
+-	if (adev->asic_type == CHIP_RAVEN || adev->asic_type == CHIP_RENOIR)
++	if (adev->flags & AMD_IS_APU)
+ 		adev->sdma.num_instances = 1;
+ 	else if (adev->asic_type == CHIP_ARCTURUS)
+ 		adev->sdma.num_instances = 8;
+@@ -2189,6 +2189,7 @@
+ 
+ 	switch (adev->asic_type) {
+ 	case CHIP_RAVEN:
++	case CHIP_RENOIR:
+ 		sdma_v4_1_update_power_gating(adev,
+ 				state == AMD_PG_STATE_GATE ? true : false);
+ 		break;
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+@@ -1697,8 +1697,7 @@
+ 	case CHIP_RAVEN:
+ 	case CHIP_ARCTURUS:
+ 	case CHIP_RENOIR:
+-		if (adev->asic_type == CHIP_RAVEN ||
+-		    adev->asic_type == CHIP_RENOIR)
++		if (adev->flags & AMD_IS_APU)
+ 			adev->family = AMDGPU_FAMILY_RV;
+ 		else
+ 			adev->family = AMDGPU_FAMILY_AI;
diff --git a/config b/config
index 394c613d4b65..34cb837c9c4c 100644
--- a/config
+++ b/config
@@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/x86 5.7.10-zen1 Kernel Configuration
+# Linux/x86 5.7.11-zen1 Kernel Configuration
 #
 
 #
@@ -33,12 +33,14 @@ CONFIG_HAVE_KERNEL_LZMA=y
 CONFIG_HAVE_KERNEL_XZ=y
 CONFIG_HAVE_KERNEL_LZO=y
 CONFIG_HAVE_KERNEL_LZ4=y
+CONFIG_HAVE_KERNEL_ZSTD=y
 # CONFIG_KERNEL_GZIP is not set
 # CONFIG_KERNEL_BZIP2 is not set
 # CONFIG_KERNEL_LZMA is not set
-CONFIG_KERNEL_XZ=y
+# CONFIG_KERNEL_XZ is not set
 # CONFIG_KERNEL_LZO is not set
 # CONFIG_KERNEL_LZ4 is not set
+CONFIG_KERNEL_ZSTD=y
 CONFIG_DEFAULT_HOSTNAME="archlinux"
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
@@ -208,6 +210,7 @@ CONFIG_RD_LZMA=y
 CONFIG_RD_XZ=y
 CONFIG_RD_LZO=y
 CONFIG_RD_LZ4=y
+CONFIG_RD_ZSTD=y
 CONFIG_BOOT_CONFIG=y
 # CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
 CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3=y
@@ -1656,7 +1659,10 @@ CONFIG_VLAN_8021Q_MVRP=y
 # CONFIG_DECNET is not set
 CONFIG_LLC=m
 CONFIG_LLC2=m
-# CONFIG_ATALK is not set
+CONFIG_ATALK=m
+CONFIG_DEV_APPLETALK=m
+CONFIG_IPDDP=m
+CONFIG_IPDDP_ENCAP=y
 # CONFIG_X25 is not set
 # CONFIG_LAPB is not set
 CONFIG_PHONET=m
@@ -10504,6 +10510,7 @@ CONFIG_DECOMPRESS_LZMA=y
 CONFIG_DECOMPRESS_XZ=y
 CONFIG_DECOMPRESS_LZO=y
 CONFIG_DECOMPRESS_LZ4=y
+CONFIG_DECOMPRESS_ZSTD=y
 CONFIG_GENERIC_ALLOCATOR=y
 CONFIG_REED_SOLOMON=y
 CONFIG_REED_SOLOMON_ENC8=y