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author | Cayetano Santos | 2020-07-09 12:57:24 +0200 |
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committer | Cayetano Santos | 2020-07-09 12:57:24 +0200 |
commit | 534642070c470d021d499a7721542a3618bbe0fc (patch) | |
tree | db8681e1a8e3ae634df9618400ad1777eb7569b7 | |
parent | 6afdee6fda107666d764cefd9cbe26a556582939 (diff) | |
download | aur-534642070c470d021d499a7721542a3618bbe0fc.tar.gz |
update to 1.3.2
-rw-r--r-- | .SRCINFO | 4 | ||||
-rw-r--r-- | PKGBUILD | 2 |
2 files changed, 3 insertions, 3 deletions
@@ -1,7 +1,7 @@ pkgbase = python-cocotb pkgdesc = Coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python pkgver = 1.3 - pkgrel = 1 + pkgrel = 2 url = http://github.com/cocotb/cocotb/ arch = any license = BSD @@ -15,7 +15,7 @@ pkgbase = python-cocotb provides = python-cocotb conflicts = python-cocotb-git options = !emptydirs - source = git+https://github.com/cocotb/cocotb#tag=v1.3.1 + source = git+https://github.com/cocotb/cocotb#tag=v1.3.2 md5sums = SKIP pkgname = python-cocotb @@ -1,7 +1,7 @@ # Maintainer: csantosb <csantosb dot inventati dot org> pkgname=python-cocotb pkgver=1.3 -pkgrel=1 +pkgrel=2 pkgdesc="Coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python" arch=('any') url="http://github.com/cocotb/cocotb/" |