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author | Cayetano Santos | 2021-03-12 19:49:50 +0100 |
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committer | Cayetano Santos | 2021-03-12 19:49:50 +0100 |
commit | 9e7435f04aa70d025e1a1e1356f25e1ac6ea8c9d (patch) | |
tree | b37e723e553844e639332458fb44bc6abb5c02b5 | |
parent | 3828a938f3772a739e71f1f145aee3eb54a12768 (diff) | |
download | aur-9e7435f04aa70d025e1a1e1356f25e1ac6ea8c9d.tar.gz |
Release update to 1.5
-rw-r--r-- | .SRCINFO | 4 | ||||
-rw-r--r-- | PKGBUILD | 2 |
2 files changed, 3 insertions, 3 deletions
@@ -1,6 +1,6 @@ pkgbase = python-cocotb pkgdesc = Coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python - pkgver = 1.4 + pkgver = 1.5 pkgrel = 0 url = http://github.com/cocotb/cocotb/ arch = any @@ -13,7 +13,7 @@ pkgbase = python-cocotb optdepends = ghdl: for simulating VHDL designs optdepends = gtkwave: for visualizing waveforms options = !emptydirs - source = git+https://github.com/cocotb/cocotb#tag=v1.4.0 + source = git+https://github.com/cocotb/cocotb#tag=v1.5.0 md5sums = SKIP pkgname = python-cocotb @@ -1,6 +1,6 @@ # Maintainer: csantosb <csantosb dot inventati dot org> pkgname=python-cocotb -pkgver=1.4 +pkgver=1.5 pkgrel=0 pkgdesc="Coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python" arch=('any') |