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author | Stefan Biereigel | 2020-05-05 18:23:02 +0200 |
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committer | Stefan Biereigel | 2020-05-05 18:23:02 +0200 |
commit | 8eb3e853aa0a807f1b2d9200a52716a7dff4bf08 (patch) | |
tree | 139530860c9d11d608e8914bc19d77225659ec98 | |
parent | ea6ccdfa28c88250d51058f28acdd33223d1ae92 (diff) | |
download | aur-8eb3e853aa0a807f1b2d9200a52716a7dff4bf08.tar.gz |
update repo sources for yosys and abc
-rw-r--r-- | .SRCINFO | 6 | ||||
-rw-r--r-- | PKGBUILD | 6 |
2 files changed, 6 insertions, 6 deletions
@@ -1,6 +1,6 @@ pkgbase = yosys-git pkgdesc = A framework for RTL synthesis - pkgver = r8895.af84e5ac + pkgver = r9464.283b1130 pkgrel = 1 url = http://www.clifford.at/yosys/ arch = x86_64 @@ -19,8 +19,8 @@ pkgbase = yosys-git optdepends = xdot: Design netlist display support provides = yosys conflicts = yosys - source = git+https://github.com/cliffordwolf/yosys.git - source = git+https://github.com/berkeley-abc/abc.git + source = git+https://github.com/YosysHQ/yosys.git + source = git+https://github.com/YosysHQ/abc.git sha512sums = SKIP sha512sums = SKIP @@ -6,7 +6,7 @@ pkgname=yosys-git pkgrel=1 -pkgver=r8895.af84e5ac +pkgver=r9464.283b1130 pkgdesc='A framework for RTL synthesis' arch=('x86_64' 'i686') url='http://www.clifford.at/yosys/' @@ -17,8 +17,8 @@ depends=('tcl' 'libffi' 'python' 'boost-libs') optdepends=('graphviz: Schematics display support' 'xdot: Design netlist display support') makedepends=('git' 'mercurial' 'boost') checkdepends=('iverilog' 'clang') -source=('git+https://github.com/cliffordwolf/yosys.git' - 'git+https://github.com/berkeley-abc/abc.git') +source=('git+https://github.com/YosysHQ/yosys.git' + 'git+https://github.com/YosysHQ/abc.git') sha512sums=('SKIP' 'SKIP') |