upgpkg: beignet 1.2.0-2

Fix compilation with libdrm 2.4.71 (patch credits: m45t3r)

3 files changed, 34 insertions, 6 deletions

diff --git a/.SRCINFO b/.SRCINFO
index 209227c6c158..a82c407af1c1 100644
--- a/.SRCINFO
+++ b/.SRCINFO
@@ -1,7 +1,7 @@
 pkgbase = beignet
 	pkgdesc = A GPGPU System for Intel Ivybridge GPUs
 	pkgver = 1.2.0
-	pkgrel = 1
+	pkgrel = 2
 	url = https://01.org/beignet
 	arch = x86_64
 	license = LGPL2.1
@@ -19,7 +19,9 @@ pkgbase = beignet
 	conflicts = opencl-headers
 	conflicts = opencl-headers12
 	source = https://01.org/sites/default/files/beignet-1.2.0-source.tar.gz
+	source = libdrm2471.patch
 	sha256sums = fc7af19efb7596b04510d26c558a576eba3e95e1ef86fd6951213c6a4bf58bff
+	sha256sums = a71ddc57c943f02a73fff24de190f078f0f6864a5c66fd5f859d63ea9d5daf54
 
 pkgname = beignet
 
diff --git a/PKGBUILD b/PKGBUILD
index 45161ee6f8bd..7f6806e77b76 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -5,7 +5,7 @@
 
 pkgname=beignet
 pkgver=1.2.0
-pkgrel=1
+pkgrel=2
 pkgdesc='A GPGPU System for Intel Ivybridge GPUs'
 arch=('x86_64')
 url="https://01.org/beignet"
@@ -14,13 +14,16 @@ depends=('glu' 'llvm' 'mesa' 'ocl-icd')
 makedepends=('clang' 'cmake' 'python2')
 provides=('opencl-intel' 'opencl-headers' 'opencl-headers12')
 conflicts=('opencl-intel' 'opencl-headers' 'opencl-headers12')
-source=("https://01.org/sites/default/files/beignet-${pkgver}-source.tar.gz")
-sha256sums=('fc7af19efb7596b04510d26c558a576eba3e95e1ef86fd6951213c6a4bf58bff')
+source=("https://01.org/sites/default/files/beignet-${pkgver}-source.tar.gz" 'libdrm2471.patch')
+sha256sums=('fc7af19efb7596b04510d26c558a576eba3e95e1ef86fd6951213c6a4bf58bff'
+            'a71ddc57c943f02a73fff24de190f078f0f6864a5c66fd5f859d63ea9d5daf54')
 
-#prepare() {
+prepare() {
+	cd "${srcdir}/Beignet-${pkgver}-Source"
+    patch -p1 < "${srcdir}/libdrm2471.patch"
 #	cd "${srcdir}/Beignet-${pkgver}-Source/include/CL"
 #	rm cl.h cl.hpp cl_d3d10.h cl_d3d11.h cl_dx9_media_sharing.h cl_egl.h cl_ext.h cl_gl.h cl_gl_ext.h cl_platform.h opencl.h
-#}
+}
 
 build() {
 	mkdir -p "${srcdir}/Beignet-${pkgver}-Source/build"
diff --git a/libdrm2471.patch b/libdrm2471.patch
new file mode 100644
index 000000000000..232a92fec530
--- /dev/null
+++ b/libdrm2471.patch
@@ -0,0 +1,23 @@
+diff --git a/src/intel/intel_driver.c b/src/intel/intel_driver.c
+index f503b55..484346c 100644
+--- a/src/intel/intel_driver.c
++++ b/src/intel/intel_driver.c
+@@ -957,14 +957,14 @@ intel_update_device_info(cl_device_id device)
+
+ #ifdef HAS_POOLED_EU
+   /* BXT pooled eu, 3*6 to 2*9, like sub slice count is 2 */
+-  unsigned int has_pooled_eu = 0;
+-  if(!drm_intel_get_pooled_eu(driver->fd, &has_pooled_eu) && has_pooled_eu)
++  int has_pooled_eu;
++  if((has_pooled_eu = drm_intel_get_pooled_eu(driver->fd)) > 0)
+     device->sub_slice_count = 2;
+
+ #ifdef HAS_MIN_EU_IN_POOL
+-  unsigned int min_eu;
++  int min_eu;
+   /* for fused down 2x6 devices, beignet don't support. */
+-  if (has_pooled_eu && !drm_intel_get_min_eu_in_pool(driver->fd, &min_eu)) {
++  if (has_pooled_eu > 0 && (min_eu = drm_intel_get_min_eu_in_pool(driver->fd)) > 0) {
+     assert(min_eu == 9); //don't support fuse down device.
+   }
+ #endif //HAS_MIN_EU_IN_POOL