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| author | Vi0L0 | 2015-06-08 20:34:33 +0200 |
|---|---|---|
| committer | Vi0L0 | 2015-06-08 20:34:33 +0200 |
| commit | 322f3b965050832bdb8ccbc6dd6322e58e7bbcbf (patch) | |
| tree | 992efc3d28037051c78f7a73ee84bb43739e058c /lano1106_fglrx_intel_iommu.patch | |
| download | aur-catalyst-total-pxp.tar.gz | |
Initial import
Diffstat (limited to 'lano1106_fglrx_intel_iommu.patch')
| -rw-r--r-- | lano1106_fglrx_intel_iommu.patch | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/lano1106_fglrx_intel_iommu.patch b/lano1106_fglrx_intel_iommu.patch new file mode 100644 index 000000000000..101654c41c68 --- /dev/null +++ b/lano1106_fglrx_intel_iommu.patch @@ -0,0 +1,11 @@ +--- 13.4/common/lib/modules/fglrx/build_mod/firegl_public.c 2013-04-16 23:29:55.000000000 +0200 ++++ 13.4/common/lib/modules/fglrx/build_mod/firegl_public.c 2013-05-21 17:05:34.726681102 +0200 +@@ -93,7 +93,7 @@ + and they use different config options. These options can only be enabled + on x86_64 with newer 2.6 kernels (2.6.23 for intel, 2.6.26 for amd). + */ +-#if defined(CONFIG_AMD_IOMMU) || defined(CONFIG_DMAR) ++#if defined(CONFIG_AMD_IOMMU) || defined(CONFIG_INTEL_IOMMU) + #define FIREGL_DMA_REMAPPING + #endif + |