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Diffstat (limited to '.SRCINFO')
| -rw-r--r-- | .SRCINFO | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/.SRCINFO b/.SRCINFO new file mode 100644 index 000000000000..b3b31d404b14 --- /dev/null +++ b/.SRCINFO @@ -0,0 +1,19 @@ +pkgbase = cocotb + pkgdesc = Coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python + pkgver = 1.1 + pkgrel = 1 + epoch = 0 + url = http://potential.ventures/cocotb/ + install = cocotb.install + arch = x86_64 + license = BSD + makedepends = git + depends = python + depends = swig + optdepends = iverilog: for simulating verilog designs + optdepends = ghdl: for simulating VHDL designs + source = https://github.com/potentialventures/cocotb/archive/v1.1.tar.gz + md5sums = 94483fb042f9b645acecdfab20d460a4 + +pkgname = cocotb + |