diff options
Diffstat (limited to '0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch')
| -rw-r--r-- | 0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch | 107 |
1 files changed, 0 insertions, 107 deletions
diff --git a/0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch b/0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch deleted file mode 100644 index e8d116c25262..000000000000 --- a/0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 1b5f96a934af463ddb037b78871afe8a3524e665 Mon Sep 17 00:00:00 2001 -From: Imre Deak <imre.deak@intel.com> -Date: Wed, 17 Mar 2021 20:48:59 +0200 -Subject: [PATCH 3/6] drm/i915/ilk-glk: Fix link training on links with LTTPRs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Cherry-picked from intel-drm-next 984982f3ef7b240cd24c2feb2762d81d9d8da3c2 - -The spec requires to use at least 3.2ms for the AUX timeout period if -there are LT-tunable PHY Repeaters on the link (2.11.2). An upcoming -spec update makes this more specific, by requiring a 3.2ms minimum -timeout period for the LTTPR detection reading the 0xF0000-0xF0007 -range (3.6.5.1). - -Accordingly disable LTTPR detection until GLK, where the maximum timeout -we can set is only 1.6ms. - -Link training in the non-transparent mode is known to fail at least on -some SKL systems with a WD19 dock on the link, which exposes an LTTPR -(see the References below). While this could have different reasons -besides the too short AUX timeout used, not detecting LTTPRs (and so not -using the non-transparent LT mode) fixes link training on these systems. - -While at it add a code comment about the platform specific maximum -timeout values. - -v2: Add a comment about the g4x maximum timeout as well. (Ville) - -Reported-by: Takashi Iwai <tiwai@suse.de> -Reported-and-tested-by: Santiago Zarate <santiago.zarate@suse.com> -Reported-and-tested-by: Bodo Graumann <mail@bodograumann.de> -References: https://gitlab.freedesktop.org/drm/intel/-/issues/3166 -Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode link training") -Cc: <stable@vger.kernel.org> # v5.11 -Cc: Takashi Iwai <tiwai@suse.de> -Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> -Signed-off-by: Imre Deak <imre.deak@intel.com> -Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> -Link: https://patchwork.freedesktop.org/patch/msgid/20210317184901.4029798-2-imre.deak@intel.com ---- - drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++++ - .../gpu/drm/i915/display/intel_dp_link_training.c | 15 ++++++++++++--- - 2 files changed, 19 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c -index 8a26307c4896..1930df9a8bcc 100644 ---- a/drivers/gpu/drm/i915/display/intel_dp.c -+++ b/drivers/gpu/drm/i915/display/intel_dp.c -@@ -1400,6 +1400,7 @@ static u32 g4x_get_aux_send_ctl(struct intel_dp *intel_dp, - else - precharge = 5; - -+ /* Max timeout value on G4x-BDW: 1.6ms */ - if (IS_BROADWELL(dev_priv)) - timeout = DP_AUX_CH_CTL_TIME_OUT_600us; - else -@@ -1426,6 +1427,12 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp, - enum phy phy = intel_port_to_phy(i915, dig_port->base.port); - u32 ret; - -+ /* -+ * Max timeout values: -+ * SKL-GLK: 1.6ms -+ * CNL: 3.2ms -+ * ICL+: 4ms -+ */ - ret = DP_AUX_CH_CTL_SEND_BUSY | - DP_AUX_CH_CTL_DONE | - DP_AUX_CH_CTL_INTERRUPT | -diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c -index d8c6d7054d11..f916b9f04b6b 100644 ---- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c -+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c -@@ -93,6 +93,18 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp, - - static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp) - { -+ struct drm_i915_private *i915 = dp_to_i915(intel_dp); -+ -+ if (intel_dp_is_edp(intel_dp)) -+ return false; -+ -+ /* -+ * Detecting LTTPRs must be avoided on platforms with an AUX timeout -+ * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1). -+ */ -+ if (INTEL_GEN(i915) < 10) -+ return false; -+ - if (drm_dp_read_lttpr_common_caps(&intel_dp->aux, - intel_dp->lttpr_common_caps) < 0) { - memset(intel_dp->lttpr_common_caps, 0, -@@ -138,9 +150,6 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp) - bool ret; - int i; - -- if (intel_dp_is_edp(intel_dp)) -- return 0; -- - ret = intel_dp_read_lttpr_common_caps(intel_dp); - - /* --- -2.31.1 - |