diff options
Diffstat (limited to '0005-drm-sched-add-DRM_SCHED_FENCE_DONT_PIPELINE-flag.patch')
| -rw-r--r-- | 0005-drm-sched-add-DRM_SCHED_FENCE_DONT_PIPELINE-flag.patch | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/0005-drm-sched-add-DRM_SCHED_FENCE_DONT_PIPELINE-flag.patch b/0005-drm-sched-add-DRM_SCHED_FENCE_DONT_PIPELINE-flag.patch new file mode 100644 index 000000000000..1d9f5e94cfcf --- /dev/null +++ b/0005-drm-sched-add-DRM_SCHED_FENCE_DONT_PIPELINE-flag.patch @@ -0,0 +1,55 @@ +From 64ebb671ffc4cbfd548e4f1b4aeb98155fd386dc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Fri, 7 Oct 2022 09:51:13 +0200 +Subject: [PATCH 5/9] drm/sched: add DRM_SCHED_FENCE_DONT_PIPELINE flag +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Setting this flag on a scheduler fence prevents pipelining of jobs +depending on this fence. In other words we always insert a full CPU +round trip before dependen jobs are pushed to the pipeline. + +Signed-off-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/scheduler/sched_entity.c | 3 ++- + include/drm/gpu_scheduler.h | 9 +++++++++ + 2 files changed, 11 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/scheduler/sched_entity.c b/drivers/gpu/drm/scheduler/sched_entity.c +index 6b25b2f4f5a3..6137537aaea4 100644 +--- a/drivers/gpu/drm/scheduler/sched_entity.c ++++ b/drivers/gpu/drm/scheduler/sched_entity.c +@@ -385,7 +385,8 @@ static bool drm_sched_entity_add_dependency_cb(struct drm_sched_entity *entity) + } + + s_fence = to_drm_sched_fence(fence); +- if (s_fence && s_fence->sched == sched) { ++ if (s_fence && s_fence->sched == sched && ++ !test_bit(DRM_SCHED_FENCE_DONT_PIPELINE, &fence->flags)) { + + /* + * Fence is from the same scheduler, only need to wait for +diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h +index addb135eeea6..289a33e80639 100644 +--- a/include/drm/gpu_scheduler.h ++++ b/include/drm/gpu_scheduler.h +@@ -32,6 +32,15 @@ + + #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000) + ++/** ++ * DRM_SCHED_FENCE_DONT_PIPELINE - Prefent dependency pipelining ++ * ++ * Setting this flag on a scheduler fence prevents pipelining of jobs depending ++ * on this fence. In other words we always insert a full CPU round trip before ++ * dependen jobs are pushed to the hw queue. ++ */ ++#define DRM_SCHED_FENCE_DONT_PIPELINE DMA_FENCE_FLAG_USER_BITS ++ + struct drm_gem_object; + + struct drm_gpu_scheduler; +-- +2.38.1 + |